test_i2s.c 19 KB

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  1. /**
  2. * I2S test environment UT_T1_I2S:
  3. * We use internal signals instead of external wiring, but please keep the following IO connections, or connect nothing to prevent the signal from being disturbed.
  4. * connect GPIO15 and GPIO19, GPIO25(ESP32)/GPIO17(ESP32-S2) and GPIO26, GPIO21 and GPIO22(ESP32)/GPIO20(ESP32-S2)
  5. * Please do not connect GPIO32(ESP32) any pull-up resistors externally, it will be used to test i2s adc function.
  6. */
  7. #include <stdio.h>
  8. #include <string.h>
  9. #include "freertos/FreeRTOS.h"
  10. #include "freertos/task.h"
  11. #include "driver/i2s.h"
  12. #include "driver/gpio.h"
  13. #include "unity.h"
  14. #include "math.h"
  15. #include "esp_rom_gpio.h"
  16. #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
  17. #define SAMPLE_RATE (36000)
  18. #define SAMPLE_BITS (16)
  19. #define MASTER_BCK_IO 15
  20. #define SLAVE_BCK_IO 19
  21. #define SLAVE_WS_IO 26
  22. #define DATA_IN_IO 21
  23. #if CONFIG_IDF_TARGET_ESP32
  24. #define MASTER_WS_IO 25
  25. #define DATA_OUT_IO 22
  26. #define ADC1_CHANNEL_4_IO 32
  27. #elif CONFIG_IDF_TARGET_ESP32S2
  28. #define MASTER_WS_IO 28
  29. #define DATA_OUT_IO 20
  30. #endif
  31. #define PERCENT_DIFF 0.0001
  32. #define I2S_TEST_MODE_SLAVE_TO_MAXTER 0
  33. #define I2S_TEST_MODE_MASTER_TO_SLAVE 1
  34. #define I2S_TEST_MODE_LOOPBACK 2
  35. // mode: 0, master rx, slave tx. mode: 1, master tx, slave rx. mode: 2, master tx rx loopback
  36. // Since ESP32-S2 has only one I2S, only loop back test can be tested.
  37. static void i2s_test_io_config(int mode)
  38. {
  39. // Connect internal signals using IO matrix.
  40. PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[MASTER_BCK_IO], PIN_FUNC_GPIO);
  41. PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[MASTER_WS_IO], PIN_FUNC_GPIO);
  42. PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[DATA_OUT_IO], PIN_FUNC_GPIO);
  43. gpio_set_direction(MASTER_BCK_IO, GPIO_MODE_INPUT_OUTPUT);
  44. gpio_set_direction(MASTER_WS_IO, GPIO_MODE_INPUT_OUTPUT);
  45. gpio_set_direction(DATA_OUT_IO, GPIO_MODE_INPUT_OUTPUT);
  46. switch (mode) {
  47. #if SOC_I2S_NUM > 1
  48. case I2S_TEST_MODE_SLAVE_TO_MAXTER: {
  49. esp_rom_gpio_connect_out_signal(MASTER_BCK_IO, I2S0I_BCK_OUT_IDX, 0, 0);
  50. esp_rom_gpio_connect_in_signal(MASTER_BCK_IO, I2S1O_BCK_IN_IDX, 0);
  51. esp_rom_gpio_connect_out_signal(MASTER_WS_IO, I2S0I_WS_OUT_IDX, 0, 0);
  52. esp_rom_gpio_connect_in_signal(MASTER_WS_IO, I2S1O_WS_IN_IDX, 0);
  53. esp_rom_gpio_connect_out_signal(DATA_OUT_IO, I2S1O_DATA_OUT23_IDX, 0, 0);
  54. esp_rom_gpio_connect_in_signal(DATA_OUT_IO, I2S0I_DATA_IN15_IDX, 0);
  55. }
  56. break;
  57. case I2S_TEST_MODE_MASTER_TO_SLAVE: {
  58. esp_rom_gpio_connect_out_signal(MASTER_BCK_IO, I2S0O_BCK_OUT_IDX, 0, 0);
  59. esp_rom_gpio_connect_in_signal(MASTER_BCK_IO, I2S1I_BCK_IN_IDX, 0);
  60. esp_rom_gpio_connect_out_signal(MASTER_WS_IO, I2S0O_WS_OUT_IDX, 0, 0);
  61. esp_rom_gpio_connect_in_signal(MASTER_WS_IO, I2S1I_WS_IN_IDX, 0);
  62. esp_rom_gpio_connect_out_signal(DATA_OUT_IO, I2S0O_DATA_OUT23_IDX, 0, 0);
  63. esp_rom_gpio_connect_in_signal(DATA_OUT_IO, I2S1I_DATA_IN15_IDX, 0);
  64. }
  65. break;
  66. #endif
  67. case I2S_TEST_MODE_LOOPBACK: {
  68. esp_rom_gpio_connect_out_signal(DATA_OUT_IO, I2S0O_DATA_OUT23_IDX, 0, 0);
  69. esp_rom_gpio_connect_in_signal(DATA_OUT_IO, I2S0I_DATA_IN15_IDX, 0);
  70. }
  71. break;
  72. default: {
  73. TEST_FAIL_MESSAGE("error: mode not supported");
  74. }
  75. break;
  76. }
  77. }
  78. /**
  79. * i2s initialize test
  80. * 1. i2s_driver_install
  81. * 2. i2s_set_pin
  82. */
  83. TEST_CASE("I2S basic driver install, uninstall, set pin test", "[i2s]")
  84. {
  85. // dac, adc i2s
  86. i2s_config_t i2s_config = {
  87. .mode = I2S_MODE_MASTER | I2S_MODE_TX,
  88. .sample_rate = SAMPLE_RATE,
  89. .bits_per_sample = SAMPLE_BITS,
  90. .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
  91. .communication_format = I2S_COMM_FORMAT_STAND_I2S,
  92. .dma_buf_count = 6,
  93. .dma_buf_len = 60,
  94. .use_apll = 0,
  95. .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
  96. };
  97. #if CONFIG_IDF_TARGET_ESP32
  98. //install and start i2s driver
  99. TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
  100. //for internal DAC, this will enable both of the internal channels
  101. TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, NULL));
  102. //stop & destroy i2s driver
  103. TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
  104. #endif
  105. // normal i2s
  106. i2s_pin_config_t pin_config = {
  107. .bck_io_num = MASTER_BCK_IO,
  108. .ws_io_num = MASTER_WS_IO,
  109. .data_out_num = DATA_OUT_IO,
  110. .data_in_num = -1
  111. };
  112. TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
  113. TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &pin_config));
  114. TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
  115. //error param test
  116. TEST_ASSERT(i2s_driver_install(I2S_NUM_MAX, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG);
  117. TEST_ASSERT(i2s_driver_install(I2S_NUM_0, NULL, 0, NULL) == ESP_ERR_INVALID_ARG);
  118. i2s_config.dma_buf_count = 1;
  119. TEST_ASSERT(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG);
  120. i2s_config.dma_buf_count = 129;
  121. TEST_ASSERT(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG);
  122. TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
  123. }
  124. TEST_CASE("I2S Loopback test(master tx and rx)", "[i2s]")
  125. {
  126. // master driver installed and send data
  127. i2s_config_t master_i2s_config = {
  128. .mode = I2S_MODE_MASTER | I2S_MODE_TX | I2S_MODE_RX,
  129. .sample_rate = SAMPLE_RATE,
  130. .bits_per_sample = SAMPLE_BITS,
  131. .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
  132. .communication_format = I2S_COMM_FORMAT_STAND_I2S,
  133. .dma_buf_count = 6,
  134. .dma_buf_len = 100,
  135. .use_apll = 0,
  136. .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
  137. };
  138. i2s_pin_config_t master_pin_config = {
  139. .bck_io_num = MASTER_BCK_IO,
  140. .ws_io_num = MASTER_WS_IO,
  141. .data_out_num = DATA_OUT_IO,
  142. .data_in_num = DATA_IN_IO
  143. };
  144. TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
  145. TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
  146. i2s_test_io_config(I2S_TEST_MODE_LOOPBACK);
  147. printf("\r\nheap size: %d\n", esp_get_free_heap_size());
  148. uint8_t* data_wr = (uint8_t*)malloc(sizeof(uint8_t)*400);
  149. size_t i2s_bytes_write = 0;
  150. size_t bytes_read = 0;
  151. int length = 0;
  152. uint8_t *i2s_read_buff = (uint8_t*)malloc(sizeof(uint8_t)*10000);
  153. for(int i=0; i<100; i++) {
  154. data_wr[i] = i+1;
  155. }
  156. int flag=0; // break loop flag
  157. int end_position = 0;
  158. // write data to slave
  159. i2s_write(I2S_NUM_0, data_wr, sizeof(uint8_t)*400, &i2s_bytes_write, 1000 / portTICK_PERIOD_MS);
  160. while(!flag){
  161. if (length >= 10000 - 500) {
  162. break;
  163. }
  164. i2s_read(I2S_NUM_0, i2s_read_buff + length, sizeof(uint8_t)*500, &bytes_read, 1000/portMAX_DELAY);
  165. if(bytes_read>0) {
  166. printf("read data size: %d\n", bytes_read);
  167. for(int i=length; i<length + bytes_read; i++) {
  168. if(i2s_read_buff[i] == 100) {
  169. flag=1;
  170. end_position = i;
  171. break;
  172. }
  173. }
  174. }
  175. length = length + bytes_read;
  176. }
  177. // test the read data right or not
  178. for(int i=end_position-99; i<=end_position; i++) {
  179. TEST_ASSERT_EQUAL_UINT8((i-end_position+100), *(i2s_read_buff + i));
  180. }
  181. free(data_wr);
  182. free(i2s_read_buff);
  183. i2s_driver_uninstall(I2S_NUM_0);
  184. }
  185. #if !DISABLED_FOR_TARGETS(ESP32S2)
  186. /* ESP32S2 has only single I2S port and hence following test cases are not applicable */
  187. TEST_CASE("I2S adc test", "[i2s]")
  188. {
  189. // init I2S ADC
  190. i2s_config_t i2s_config = {
  191. .mode = I2S_MODE_MASTER | I2S_MODE_RX | I2S_MODE_ADC_BUILT_IN,
  192. .sample_rate = SAMPLE_RATE,
  193. .bits_per_sample = SAMPLE_BITS,
  194. .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
  195. .intr_alloc_flags = 0,
  196. .dma_buf_count = 2,
  197. .dma_buf_len = 1024,
  198. .use_apll = 0,
  199. };
  200. // install and start I2S driver
  201. i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL);
  202. // init ADC pad
  203. i2s_set_adc_mode(ADC_UNIT_1, ADC1_CHANNEL_4);
  204. // enable adc sampling, ADC_WIDTH_BIT_12, ADC_ATTEN_DB_11 hard-coded in adc_i2s_mode_init
  205. i2s_adc_enable(I2S_NUM_0);
  206. // init read buffer
  207. uint16_t* i2sReadBuffer = (uint16_t*)calloc(1024, sizeof(uint16_t));
  208. size_t bytesRead;
  209. for (int loop = 0; loop < 10; loop++) {
  210. for (int level = 0; level <= 1; level++) {
  211. if (level == 0) {
  212. gpio_set_pull_mode(ADC1_CHANNEL_4_IO, GPIO_PULLDOWN_ONLY);
  213. } else {
  214. gpio_set_pull_mode(ADC1_CHANNEL_4_IO, GPIO_PULLUP_ONLY);
  215. }
  216. vTaskDelay(200 / portTICK_RATE_MS);
  217. // read data from adc, will block until buffer is full
  218. i2s_read(I2S_NUM_0, (void*)i2sReadBuffer, 1024 * sizeof(uint16_t), &bytesRead, portMAX_DELAY);
  219. // calc average
  220. int64_t adcSumValue = 0;
  221. for (size_t i = 0; i < 1024; i++) {
  222. adcSumValue += i2sReadBuffer[i] & 0xfff;
  223. }
  224. int adcAvgValue = adcSumValue / 1024;
  225. printf("adc average val: %d\n", adcAvgValue);
  226. if (level == 0) {
  227. TEST_ASSERT_LESS_THAN(100, adcAvgValue);
  228. } else {
  229. TEST_ASSERT_GREATER_THAN(4000, adcAvgValue);
  230. }
  231. }
  232. }
  233. i2s_adc_disable(I2S_NUM_0);
  234. free(i2sReadBuffer);
  235. i2s_driver_uninstall(I2S_NUM_0);
  236. }
  237. TEST_CASE("I2S write and read test(master tx and slave rx)", "[i2s]")
  238. {
  239. // master driver installed and send data
  240. i2s_config_t master_i2s_config = {
  241. .mode = I2S_MODE_MASTER | I2S_MODE_TX,
  242. .sample_rate = SAMPLE_RATE,
  243. .bits_per_sample = SAMPLE_BITS,
  244. .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
  245. .communication_format = I2S_COMM_FORMAT_STAND_I2S,
  246. .dma_buf_count = 6,
  247. .dma_buf_len = 100,
  248. .use_apll = 0,
  249. .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
  250. };
  251. i2s_pin_config_t master_pin_config = {
  252. .bck_io_num = MASTER_BCK_IO,
  253. .ws_io_num = MASTER_WS_IO,
  254. .data_out_num = DATA_OUT_IO,
  255. .data_in_num = -1
  256. };
  257. TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
  258. TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
  259. i2s_test_io_config(I2S_TEST_MODE_MASTER_TO_SLAVE);
  260. printf("\r\nheap size: %d\n", esp_get_free_heap_size());
  261. i2s_config_t slave_i2s_config = {
  262. .mode = I2S_MODE_SLAVE | I2S_MODE_RX,
  263. .sample_rate = SAMPLE_RATE,
  264. .bits_per_sample = SAMPLE_BITS,
  265. .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
  266. .communication_format = I2S_COMM_FORMAT_STAND_I2S,
  267. .dma_buf_count = 6,
  268. .dma_buf_len = 100,
  269. .use_apll = 0,
  270. .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
  271. };
  272. i2s_pin_config_t slave_pin_config = {
  273. .bck_io_num = SLAVE_BCK_IO,
  274. .ws_io_num = SLAVE_WS_IO,
  275. .data_out_num = -1,
  276. .data_in_num = DATA_IN_IO,
  277. };
  278. // slave driver installed and receive data
  279. TEST_ESP_OK(i2s_driver_install(I2S_NUM_1, &slave_i2s_config, 0, NULL));
  280. TEST_ESP_OK(i2s_set_pin(I2S_NUM_1, &slave_pin_config));
  281. i2s_test_io_config(I2S_TEST_MODE_MASTER_TO_SLAVE);
  282. printf("\r\nheap size: %d\n", esp_get_free_heap_size());
  283. uint8_t* data_wr = (uint8_t*)malloc(sizeof(uint8_t)*400);
  284. size_t i2s_bytes_write = 0;
  285. size_t bytes_read = 0;
  286. int length = 0;
  287. uint8_t *i2s_read_buff = (uint8_t*)malloc(sizeof(uint8_t)*10000);
  288. for(int i=0; i<100; i++) {
  289. data_wr[i] = i+1;
  290. }
  291. int flag=0; // break loop flag
  292. int end_position = 0;
  293. // write data to slave
  294. i2s_write(I2S_NUM_0, data_wr, sizeof(uint8_t)*400, &i2s_bytes_write, 1000 / portTICK_PERIOD_MS);
  295. while(!flag){
  296. i2s_read(I2S_NUM_1, i2s_read_buff + length, sizeof(uint8_t)*500, &bytes_read, 1000/portMAX_DELAY);
  297. if(bytes_read>0) {
  298. printf("read data size: %d\n", bytes_read);
  299. for(int i=length; i<length + bytes_read; i++) {
  300. if(i2s_read_buff[i] == 100) {
  301. flag=1;
  302. end_position = i;
  303. break;
  304. }
  305. }
  306. }
  307. length = length + bytes_read;
  308. }
  309. // test the readed data right or not
  310. for(int i=end_position-99; i<=end_position; i++) {
  311. TEST_ASSERT_EQUAL_UINT8((i-end_position+100), *(i2s_read_buff + i));
  312. }
  313. free(data_wr);
  314. free(i2s_read_buff);
  315. i2s_driver_uninstall(I2S_NUM_0);
  316. i2s_driver_uninstall(I2S_NUM_1);
  317. }
  318. TEST_CASE("I2S write and read test(master rx and slave tx)", "[i2s]")
  319. {
  320. // master driver installed and send data
  321. i2s_config_t master_i2s_config = {
  322. .mode = I2S_MODE_MASTER | I2S_MODE_RX,
  323. .sample_rate = SAMPLE_RATE,
  324. .bits_per_sample = SAMPLE_BITS,
  325. .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
  326. .communication_format = I2S_COMM_FORMAT_STAND_I2S,
  327. .dma_buf_count = 6,
  328. .dma_buf_len = 100,
  329. .use_apll = 1,
  330. .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
  331. };
  332. i2s_pin_config_t master_pin_config = {
  333. .bck_io_num = MASTER_BCK_IO,
  334. .ws_io_num = MASTER_WS_IO,
  335. .data_out_num = -1,
  336. .data_in_num = DATA_IN_IO,
  337. };
  338. TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
  339. TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
  340. i2s_test_io_config(I2S_TEST_MODE_SLAVE_TO_MAXTER);
  341. printf("\r\nheap size: %d\n", esp_get_free_heap_size());
  342. i2s_config_t slave_i2s_config = {
  343. .mode = I2S_MODE_SLAVE | I2S_MODE_TX, // Only RX
  344. .sample_rate = SAMPLE_RATE,
  345. .bits_per_sample = SAMPLE_BITS,
  346. .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, //2-channels
  347. .communication_format = I2S_COMM_FORMAT_STAND_I2S,
  348. .dma_buf_count = 6,
  349. .dma_buf_len = 100,
  350. .use_apll = 1,
  351. .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
  352. };
  353. i2s_pin_config_t slave_pin_config = {
  354. .bck_io_num = SLAVE_BCK_IO,
  355. .ws_io_num = SLAVE_WS_IO,
  356. .data_out_num = DATA_OUT_IO,
  357. .data_in_num = -1
  358. };
  359. // slave driver installed and receive data
  360. TEST_ESP_OK(i2s_driver_install(I2S_NUM_1, &slave_i2s_config, 0, NULL));
  361. TEST_ESP_OK(i2s_set_pin(I2S_NUM_1, &slave_pin_config));
  362. i2s_test_io_config(I2S_TEST_MODE_SLAVE_TO_MAXTER);
  363. uint8_t* data_wr = (uint8_t*)malloc(sizeof(uint8_t)*400);
  364. size_t i2s_bytes_write = 0;
  365. size_t bytes_read = 0;
  366. int length = 0;
  367. uint8_t *i2s_read_buff = (uint8_t*)malloc(sizeof(uint8_t)*100000);
  368. for(int i=0; i<100; i++) {
  369. data_wr[i] = i+1;
  370. }
  371. // slave write data to master
  372. i2s_write(I2S_NUM_1, data_wr, sizeof(uint8_t)*400, &i2s_bytes_write, 1000 / portTICK_PERIOD_MS);
  373. int flag=0; // break loop flag
  374. int end_position = 0;
  375. // write data to slave
  376. while(!flag){
  377. TEST_ESP_OK(i2s_read(I2S_NUM_0, i2s_read_buff + length, 10000-length, &bytes_read, 1000/portMAX_DELAY));
  378. if(bytes_read > 0) {
  379. for(int i=length; i<length+bytes_read; i++) {
  380. if(i2s_read_buff[i] == 100) {
  381. flag=1;
  382. end_position = i;
  383. break;
  384. }
  385. }
  386. }
  387. length = length + bytes_read;
  388. }
  389. // test the readed data right or not
  390. for(int i=end_position-99; i<=end_position; i++) {
  391. TEST_ASSERT_EQUAL_UINT8((i-end_position+100), *(i2s_read_buff + i));
  392. }
  393. free(data_wr);
  394. free(i2s_read_buff);
  395. i2s_driver_uninstall(I2S_NUM_0);
  396. i2s_driver_uninstall(I2S_NUM_1);
  397. }
  398. #endif
  399. TEST_CASE("I2S memory leaking test", "[i2s]")
  400. {
  401. i2s_config_t master_i2s_config = {
  402. .mode = I2S_MODE_MASTER | I2S_MODE_RX,
  403. .sample_rate = SAMPLE_RATE,
  404. .bits_per_sample = SAMPLE_BITS,
  405. .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
  406. .communication_format = I2S_COMM_FORMAT_STAND_I2S,
  407. .dma_buf_count = 6,
  408. .dma_buf_len = 100,
  409. .use_apll = 0,
  410. .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
  411. };
  412. i2s_pin_config_t master_pin_config = {
  413. .bck_io_num = MASTER_BCK_IO,
  414. .ws_io_num = MASTER_WS_IO,
  415. .data_out_num = -1,
  416. .data_in_num = DATA_IN_IO
  417. };
  418. TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
  419. TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
  420. i2s_driver_uninstall(I2S_NUM_0);
  421. int initial_size = esp_get_free_heap_size();
  422. for(int i=0; i<100; i++) {
  423. TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
  424. TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
  425. i2s_driver_uninstall(I2S_NUM_0);
  426. TEST_ASSERT(initial_size == esp_get_free_heap_size());
  427. }
  428. vTaskDelay(100 / portTICK_PERIOD_MS);
  429. TEST_ASSERT(initial_size == esp_get_free_heap_size());
  430. }
  431. /*
  432. * The I2S APLL clock variation test used to test the difference between the different sample rates, different bits per sample
  433. * and the APLL clock generate for it. The TEST_CASE passes PERCENT_DIFF variation from the provided sample rate in APLL generated clock
  434. * The percentage difference calculated as (mod((obtained clock rate - desired clock rate)/(desired clock rate))) * 100.
  435. */
  436. TEST_CASE("I2S APLL clock variation test", "[i2s]")
  437. {
  438. i2s_pin_config_t pin_config = {
  439. .bck_io_num = MASTER_BCK_IO,
  440. .ws_io_num = MASTER_WS_IO,
  441. .data_out_num = DATA_OUT_IO,
  442. .data_in_num = -1
  443. };
  444. i2s_config_t i2s_config = {
  445. .mode = I2S_MODE_MASTER | I2S_MODE_TX,
  446. .sample_rate = SAMPLE_RATE,
  447. .bits_per_sample = SAMPLE_BITS,
  448. .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
  449. .communication_format = I2S_COMM_FORMAT_STAND_I2S,
  450. .dma_buf_count = 6,
  451. .dma_buf_len = 60,
  452. .use_apll = true,
  453. .intr_alloc_flags = 0,
  454. };
  455. TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
  456. TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &pin_config));
  457. TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
  458. int initial_size = esp_get_free_heap_size();
  459. uint32_t sample_rate_arr[8] = { 10675, 11025, 16000, 22050, 32000, 44100, 48000, 96000 };
  460. int bits_per_sample_arr[3] = { 16, 24, 32 };
  461. for (int i = 0; i < (sizeof(sample_rate_arr)/sizeof(sample_rate_arr[0])); i++) {
  462. for (int j = 0; j < (sizeof(bits_per_sample_arr)/sizeof(bits_per_sample_arr[0])); j++) {
  463. i2s_config.sample_rate = sample_rate_arr[i];
  464. i2s_config.bits_per_sample = bits_per_sample_arr[j];
  465. TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
  466. TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &pin_config));
  467. TEST_ASSERT((fabs((i2s_get_clk(I2S_NUM_0) - sample_rate_arr[i]))/(sample_rate_arr[i]))*100 < PERCENT_DIFF);
  468. TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
  469. TEST_ASSERT(initial_size == esp_get_free_heap_size());
  470. }
  471. }
  472. vTaskDelay(100 / portTICK_PERIOD_MS);
  473. TEST_ASSERT(initial_size == esp_get_free_heap_size());
  474. }
  475. #endif