cpu.h 2.8 KB

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  1. // Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. // http://www.apache.org/licenses/LICENSE-2.0
  7. //
  8. // Unless required by applicable law or agreed to in writing, software
  9. // distributed under the License is distributed on an "AS IS" BASIS,
  10. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  11. // See the License for the specific language governing permissions and
  12. // limitations under the License.
  13. #ifndef _SOC_CPU_H
  14. #define _SOC_CPU_H
  15. #include <stdint.h>
  16. #include <stdbool.h>
  17. #include <stddef.h>
  18. #if __XTENSA__
  19. #include "xt_instr_macros.h"
  20. // [refactor-todo] not actually needed in this header now,
  21. // but kept for compatibility
  22. #include "xtensa/corebits.h"
  23. #include "xtensa/config/core.h"
  24. #include "xtensa/config/specreg.h"
  25. #endif
  26. #include "hal/cpu_hal.h"
  27. #ifdef __cplusplus
  28. extern "C" {
  29. #endif
  30. /** @brief Read current stack pointer address
  31. *
  32. */
  33. static inline void *get_sp(void)
  34. {
  35. return cpu_hal_get_sp();
  36. }
  37. /**
  38. * @brief Stall CPU using RTC controller
  39. * @param cpu_id ID of the CPU to stall (0 = PRO, 1 = APP)
  40. */
  41. void esp_cpu_stall(int cpu_id);
  42. /**
  43. * @brief Un-stall CPU using RTC controller
  44. * @param cpu_id ID of the CPU to un-stall (0 = PRO, 1 = APP)
  45. */
  46. void esp_cpu_unstall(int cpu_id);
  47. /**
  48. * @brief Reset CPU using RTC controller
  49. * @param cpu_id ID of the CPU to reset (0 = PRO, 1 = APP)
  50. */
  51. void esp_cpu_reset(int cpu_id);
  52. /**
  53. * @brief Returns true if a JTAG debugger is attached to CPU
  54. * OCD (on chip debug) port.
  55. *
  56. * @note If "Make exception and panic handlers JTAG/OCD aware"
  57. * is disabled, this function always returns false.
  58. */
  59. bool esp_cpu_in_ocd_debug_mode(void);
  60. /**
  61. * @brief Convert the PC register value to its true address
  62. *
  63. * The address of the current instruction is not stored as an exact uint32_t
  64. * representation in PC register. This function will convert the value stored in
  65. * the PC register to a uint32_t address.
  66. *
  67. * @param pc_raw The PC as stored in register format.
  68. *
  69. * @return Address in uint32_t format
  70. */
  71. static inline uint32_t esp_cpu_process_stack_pc(uint32_t pc)
  72. {
  73. if (pc & 0x80000000) {
  74. //Top two bits of a0 (return address) specify window increment. Overwrite to map to address space.
  75. pc = (pc & 0x3fffffff) | 0x40000000;
  76. }
  77. //Minus 3 to get PC of previous instruction (i.e. instruction executed before return address)
  78. return pc - 3;
  79. }
  80. typedef uint32_t esp_cpu_ccount_t;
  81. static inline esp_cpu_ccount_t esp_cpu_get_ccount(void)
  82. {
  83. return cpu_hal_get_cycle_count();
  84. }
  85. /**
  86. * @brief Configure CPU to disable access to invalid memory regions
  87. *
  88. */
  89. void esp_cpu_configure_region_protection(void);
  90. #ifdef __cplusplus
  91. }
  92. #endif
  93. #endif