sdio_slave_hal.c 25 KB

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  1. // Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. //
  7. // http://www.apache.org/licenses/LICENSE-2.0
  8. //
  9. // Unless required by applicable law or agreed to in writing, software
  10. // distributed under the License is distributed on an "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. // See the License for the specific language governing permissions and
  13. // limitations under the License.
  14. // The HAL layer for SDIO slave (common part)
  15. #include <soc/slc_struct.h>
  16. #include <soc/hinf_struct.h>
  17. #include <hal/sdio_slave_types.h>
  18. #include <soc/host_struct.h>
  19. #include <string.h>
  20. #include "hal/sdio_slave_hal.h"
  21. #include "hal/hal_defs.h"
  22. #include "esp_attr.h"
  23. #define SDIO_SLAVE_CHECK(res, str, ret_val) do { if(!(res)){\
  24. HAL_LOGE(TAG, "%s", str);\
  25. return ret_val;\
  26. } }while (0)
  27. static const char TAG[] = "SDIO_HAL";
  28. static esp_err_t init_send_queue(sdio_slave_context_t *hal);
  29. /**************** Ring buffer for SDIO sending use *****************/
  30. typedef enum {
  31. RINGBUF_GET_ONE = 0,
  32. RINGBUF_GET_ALL = 1,
  33. } ringbuf_get_all_t;
  34. typedef enum {
  35. RINGBUF_WRITE_PTR,
  36. RINGBUF_READ_PTR,
  37. RINGBUF_FREE_PTR,
  38. } sdio_ringbuf_pointer_t;
  39. static esp_err_t sdio_ringbuf_send(sdio_ringbuf_t *buf, esp_err_t (*copy_callback)(uint8_t *, void *), void *arg);
  40. static inline esp_err_t sdio_ringbuf_recv(sdio_ringbuf_t *buf, uint8_t **start, uint8_t **end, ringbuf_get_all_t get_all);
  41. static inline int sdio_ringbuf_return(sdio_ringbuf_t* buf, uint8_t *ptr);
  42. #define _SEND_DESC_NEXT(x) STAILQ_NEXT(&((sdio_slave_hal_send_desc_t*)x)->dma_desc, qe)
  43. #define SEND_DESC_NEXT(x) (sdio_slave_hal_send_desc_t*)_SEND_DESC_NEXT(x)
  44. #define SEND_DESC_NEXT_SET(x, target) do { \
  45. _SEND_DESC_NEXT(x)=(lldesc_t*)target; \
  46. }while(0)
  47. static esp_err_t link_desc_to_last(uint8_t* desc, void* arg)
  48. {
  49. SEND_DESC_NEXT_SET(arg, desc);
  50. return ESP_OK;
  51. }
  52. //calculate a pointer with offset to a original pointer of the specific ringbuffer
  53. static inline uint8_t* sdio_ringbuf_offset_ptr(sdio_ringbuf_t *buf, sdio_ringbuf_pointer_t ptr, uint32_t offset)
  54. {
  55. uint8_t *buf_ptr;
  56. switch (ptr) {
  57. case RINGBUF_WRITE_PTR:
  58. buf_ptr = buf->write_ptr;
  59. break;
  60. case RINGBUF_READ_PTR:
  61. buf_ptr = buf->read_ptr;
  62. break;
  63. case RINGBUF_FREE_PTR:
  64. buf_ptr = buf->free_ptr;
  65. break;
  66. default:
  67. abort();
  68. }
  69. uint8_t *offset_ptr=buf_ptr+offset;
  70. if (offset_ptr >= buf->data + buf->size) {
  71. offset_ptr -= buf->size;
  72. }
  73. return offset_ptr;
  74. }
  75. static esp_err_t sdio_ringbuf_send(sdio_ringbuf_t *buf, esp_err_t (*copy_callback)(uint8_t *, void *), void *arg)
  76. {
  77. uint8_t* get_ptr = sdio_ringbuf_offset_ptr(buf, RINGBUF_WRITE_PTR, SDIO_SLAVE_SEND_DESC_SIZE);
  78. esp_err_t err = ESP_OK;
  79. if (copy_callback) {
  80. (*copy_callback)(get_ptr, arg);
  81. }
  82. if (err != ESP_OK) return err;
  83. buf->write_ptr = get_ptr;
  84. return ESP_OK;
  85. }
  86. // this ringbuf is a return-before-recv-again strategy
  87. // since this is designed to be called in the ISR, no parallel logic
  88. static inline esp_err_t sdio_ringbuf_recv(sdio_ringbuf_t *buf, uint8_t **start, uint8_t **end, ringbuf_get_all_t get_all)
  89. {
  90. assert(buf->free_ptr == buf->read_ptr); //must return before recv again
  91. if (start == NULL && end == NULL) return ESP_ERR_INVALID_ARG; // must have a output
  92. if (buf->read_ptr == buf->write_ptr) return ESP_ERR_NOT_FOUND; // no data
  93. uint8_t *get_start = sdio_ringbuf_offset_ptr(buf, RINGBUF_READ_PTR, SDIO_SLAVE_SEND_DESC_SIZE);
  94. if (get_all != RINGBUF_GET_ONE) {
  95. buf->read_ptr = buf->write_ptr;
  96. } else {
  97. buf->read_ptr = get_start;
  98. }
  99. if (start != NULL) {
  100. *start = get_start;
  101. }
  102. if (end != NULL) {
  103. *end = buf->read_ptr;
  104. }
  105. return ESP_OK;
  106. }
  107. static inline int sdio_ringbuf_return(sdio_ringbuf_t* buf, uint8_t *ptr)
  108. {
  109. assert(sdio_ringbuf_offset_ptr(buf, RINGBUF_FREE_PTR, SDIO_SLAVE_SEND_DESC_SIZE) == ptr);
  110. int size = (buf->read_ptr + buf->size - buf->free_ptr) % buf->size;
  111. int count = size / SDIO_SLAVE_SEND_DESC_SIZE;
  112. assert(count * SDIO_SLAVE_SEND_DESC_SIZE==size);
  113. buf->free_ptr = buf->read_ptr;
  114. return count;
  115. }
  116. static inline uint8_t* sdio_ringbuf_peek_front(sdio_ringbuf_t* buf)
  117. {
  118. if (buf->read_ptr != buf->write_ptr) {
  119. return sdio_ringbuf_offset_ptr(buf, RINGBUF_READ_PTR, SDIO_SLAVE_SEND_DESC_SIZE);
  120. } else {
  121. return NULL;
  122. }
  123. }
  124. static inline uint8_t* sdio_ringbuf_peek_rear(sdio_ringbuf_t *buf)
  125. {
  126. return buf->write_ptr;
  127. }
  128. static inline bool sdio_ringbuf_empty(sdio_ringbuf_t* buf)
  129. {
  130. return (buf->read_ptr == buf->write_ptr);
  131. }
  132. /**************** End of Ring buffer *****************/
  133. void sdio_slave_hal_init(sdio_slave_context_t *hal)
  134. {
  135. hal->host = sdio_slave_ll_get_host(0);
  136. hal->slc = sdio_slave_ll_get_slc(0);
  137. hal->hinf = sdio_slave_ll_get_hinf(0);
  138. hal->send_state = STATE_IDLE;
  139. hal->recv_link_list = (sdio_slave_hal_recv_stailq_t)STAILQ_HEAD_INITIALIZER(hal->recv_link_list);
  140. init_send_queue(hal);
  141. }
  142. void sdio_slave_hal_hw_init(sdio_slave_context_t *hal)
  143. {
  144. sdio_slave_ll_init(hal->slc);
  145. sdio_slave_ll_enable_hs(hal->hinf, true);
  146. sdio_slave_ll_set_timing(hal->host, hal->timing);
  147. sdio_slave_ll_slvint_t intr_ena = 0xff;
  148. sdio_slave_ll_slvint_set_ena(hal->slc, &intr_ena);
  149. }
  150. static esp_err_t init_send_queue(sdio_slave_context_t *hal)
  151. {
  152. esp_err_t ret;
  153. esp_err_t rcv_res;
  154. sdio_ringbuf_t *buf = &(hal->send_desc_queue);
  155. //initialize pointers
  156. buf->write_ptr = buf->data;
  157. buf->read_ptr = buf->data;
  158. buf->free_ptr = buf->data;
  159. sdio_slave_hal_send_desc_t *first = NULL, *last = NULL;
  160. //no copy for the first descriptor
  161. ret = sdio_ringbuf_send(buf, NULL, NULL);
  162. if (ret != ESP_OK) return ret;
  163. //loop in the ringbuf to link all the desc one after another as a ring
  164. for (int i = 0; i < hal->send_queue_size + 1; i++) {
  165. rcv_res = sdio_ringbuf_recv(buf, (uint8_t **) &last, NULL, RINGBUF_GET_ONE);
  166. assert (rcv_res == ESP_OK);
  167. ret = sdio_ringbuf_send(buf, link_desc_to_last, last);
  168. if (ret != ESP_OK) return ret;
  169. sdio_ringbuf_return(buf, (uint8_t *) last);
  170. }
  171. first = NULL;
  172. last = NULL;
  173. //clear the queue
  174. rcv_res = sdio_ringbuf_recv(buf, (uint8_t **) &first, (uint8_t **) &last, RINGBUF_GET_ALL);
  175. assert (rcv_res == ESP_OK);
  176. assert(first == last); //there should be only one desc remain
  177. sdio_ringbuf_return(buf, (uint8_t *) first);
  178. return ESP_OK;
  179. }
  180. void sdio_slave_hal_set_ioready(sdio_slave_context_t *hal, bool ready)
  181. {
  182. sdio_slave_ll_set_ioready(hal->hinf, ready); //set IO ready to 1 to allow host to use
  183. }
  184. /*---------------------------------------------------------------------------
  185. * Send
  186. *
  187. * The hardware has a cache, so that once a descriptor is loaded onto the linked-list, it cannot be modified
  188. * until returned (used) by the hardware. This forbids us from loading descriptors onto the linked list during
  189. * the transfer (or the time waiting for host to start a transfer). However, we use a "ringbuffer" (different from
  190. * the one in ``freertos/`` folder) holding descriptors to solve this:
  191. * 1. The driver allocates continuous memory for several buffer descriptors (the maximum buffer number) during
  192. * initialization. Then the driver points the STAILQ_NEXT pointer of all the descriptors except the last one
  193. * to the next descriptor of each of them. Then the pointer of the last descriptor points back to the first one:
  194. * now the descriptor is in a ring.
  195. * 2. The "ringbuffer" has a write pointer points to where app can write new descriptor. The app writes the new descriptor
  196. * indicated by the write pointer without touching the STAILQ_NEXT pointer so that the descriptors are always in a
  197. * ring-like linked-list. The app never touches the part of linked-list being used by the hardware.
  198. * 3. When the hardware needs some data to send, it automatically pick a part of linked descriptors. According to the mode:
  199. * - Buffer mode: only pick the next one to the last one sent;
  200. * - Stream mode: pick the whole unsent linked list, starting from the one above, to the latest linked one.
  201. * The driver removes the STAILQ_NEXT pointer of the last descriptor and put the head of the part to the DMA controller so
  202. * that it looks like just a linear linked-list rather than a ring to the hardware.
  203. * 4. The counter of sending FIFO can increase when app load new buffers (in STREAM_MODE) or when new transfer should
  204. * start (in PACKET_MODE).
  205. * 5. When the sending transfer is finished, the driver goes through the descriptors just send in the ISR and push all
  206. * the ``arg`` member of descriptors to the queue back to the app, so that the app can handle finished buffers. The
  207. * driver also fix the STAILQ_NEXT pointer of the last descriptor so that the descriptors are now in a ring again.
  208. ----------------------------------------------------------------------------*/
  209. static inline void send_set_state(sdio_slave_context_t *hal, send_state_t state)
  210. {
  211. hal->send_state = state;
  212. }
  213. static inline send_state_t send_get_state(sdio_slave_context_t* hal)
  214. {
  215. return hal->send_state;
  216. }
  217. DMA_ATTR static const lldesc_t start_desc = {
  218. .owner = 1,
  219. .buf = (void*)0x3ffbbbbb, //assign a dma-capable pointer other than NULL, which will not be used
  220. .size = 1,
  221. .length = 1,
  222. .eof = 1,
  223. };
  224. //force trigger rx_done interrupt. the interrupt is abused to invoke ISR from the app by the enable bit and never cleared.
  225. static void send_isr_invoker_enable(const sdio_slave_context_t *hal)
  226. {
  227. sdio_slave_ll_send_reset(hal->slc);
  228. sdio_slave_ll_send_start(hal->slc, &start_desc);
  229. //wait for rx_done
  230. while(!sdio_slave_ll_send_invoker_ready(hal->slc));
  231. sdio_slave_ll_send_stop(hal->slc);
  232. sdio_slave_ll_send_hostint_clr(hal->host);
  233. }
  234. static void send_isr_invoker_disable(sdio_slave_context_t *hal)
  235. {
  236. sdio_slave_ll_send_part_done_clear(hal->slc);
  237. }
  238. void sdio_slave_hal_send_handle_isr_invoke(sdio_slave_context_t *hal)
  239. {
  240. sdio_slave_ll_send_part_done_intr_ena(hal->slc, false);
  241. }
  242. //start hw operation with existing data (if exist)
  243. esp_err_t sdio_slave_hal_send_start(sdio_slave_context_t *hal)
  244. {
  245. SDIO_SLAVE_CHECK(send_get_state(hal) == STATE_IDLE,
  246. "already started", ESP_ERR_INVALID_STATE);
  247. send_set_state(hal, STATE_WAIT_FOR_START);
  248. send_isr_invoker_enable(hal);
  249. sdio_slave_ll_send_intr_clr(hal->slc);
  250. sdio_slave_ll_send_intr_ena(hal->slc, true);
  251. return ESP_OK;
  252. }
  253. //only stop hw operations, no touch to data as well as counter
  254. void sdio_slave_hal_send_stop(sdio_slave_context_t *hal)
  255. {
  256. sdio_slave_ll_send_stop(hal->slc);
  257. send_isr_invoker_disable(hal);
  258. sdio_slave_ll_send_intr_ena(hal->slc, false);
  259. send_set_state(hal, STATE_IDLE);
  260. }
  261. static void send_new_packet(sdio_slave_context_t *hal)
  262. {
  263. // since eof is changed, we have to stop and reset the link list,
  264. // and restart new link list operation
  265. sdio_slave_hal_send_desc_t *const start_desc = hal->in_flight_head;
  266. sdio_slave_hal_send_desc_t *const end_desc = hal->in_flight_end;
  267. assert(start_desc != NULL && end_desc != NULL);
  268. sdio_slave_ll_send_stop(hal->slc);
  269. sdio_slave_ll_send_reset(hal->slc);
  270. sdio_slave_ll_send_start(hal->slc, (lldesc_t*)start_desc);
  271. // update pkt_len register to allow host reading.
  272. sdio_slave_ll_send_write_len(hal->slc, end_desc->pkt_len);
  273. ESP_EARLY_LOGV(TAG, "send_length_write: %d, last_len: %08X", end_desc->pkt_len, sdio_slave_ll_send_read_len(hal->host));
  274. send_set_state(hal, STATE_SENDING);
  275. ESP_EARLY_LOGD(TAG, "restart new send: %p->%p, pkt_len: %d", start_desc, end_desc, end_desc->pkt_len);
  276. }
  277. static esp_err_t send_check_new_packet(sdio_slave_context_t *hal)
  278. {
  279. esp_err_t ret;
  280. sdio_slave_hal_send_desc_t *start = NULL;
  281. sdio_slave_hal_send_desc_t *end = NULL;
  282. if (hal->sending_mode == SDIO_SLAVE_SEND_PACKET) {
  283. ret = sdio_ringbuf_recv(&(hal->send_desc_queue), (uint8_t **) &start, (uint8_t **) &end, RINGBUF_GET_ONE);
  284. } else { //stream mode
  285. ret = sdio_ringbuf_recv(&(hal->send_desc_queue), (uint8_t **) &start, (uint8_t **) &end, RINGBUF_GET_ALL);
  286. }
  287. if (ret == ESP_OK) {
  288. hal->in_flight_head = start;
  289. hal->in_flight_end = end;
  290. end->dma_desc.eof = 1;
  291. //temporarily break the link ring here, the ring will be re-connected in ``send_isr_eof()``.
  292. hal->in_flight_next = SEND_DESC_NEXT(end);
  293. SEND_DESC_NEXT_SET(end, NULL);
  294. }
  295. return ESP_OK;
  296. }
  297. bool sdio_slave_hal_send_eof_happened(sdio_slave_context_t* hal)
  298. {
  299. // Goto idle state (cur_start=NULL) if transmission done,
  300. // also update sequence and recycle descs.
  301. if (sdio_slave_ll_send_done(hal->slc)) {
  302. //check current state
  303. assert(send_get_state(hal) == STATE_SENDING);
  304. sdio_slave_ll_send_intr_clr(hal->slc);
  305. return true;
  306. } else {
  307. return false;
  308. }
  309. }
  310. //clear counter but keep data
  311. esp_err_t sdio_slave_hal_send_reset_counter(sdio_slave_context_t* hal)
  312. {
  313. SDIO_SLAVE_CHECK(send_get_state(hal) == STATE_IDLE,
  314. "reset counter when transmission started", ESP_ERR_INVALID_STATE);
  315. sdio_slave_ll_send_write_len(hal->slc, 0);
  316. ESP_EARLY_LOGV(TAG, "last_len: %08X", sdio_slave_ll_send_read_len(hal->host));
  317. hal->tail_pkt_len = 0;
  318. sdio_slave_hal_send_desc_t *desc = hal->in_flight_head;
  319. while(desc != NULL) {
  320. hal->tail_pkt_len += desc->dma_desc.length;
  321. desc->pkt_len = hal->tail_pkt_len;
  322. desc = SEND_DESC_NEXT(desc);
  323. }
  324. // in theory the desc should be the one right next to the last of in_flight_head,
  325. // but the link of last is NULL, so get the desc from the ringbuf directly.
  326. desc = (sdio_slave_hal_send_desc_t*)sdio_ringbuf_peek_front(&(hal->send_desc_queue));
  327. while(desc != NULL) {
  328. hal->tail_pkt_len += desc->dma_desc.length;
  329. desc->pkt_len = hal->tail_pkt_len;
  330. desc = SEND_DESC_NEXT(desc);
  331. }
  332. return ESP_OK;
  333. }
  334. static esp_err_t send_get_inflight_desc(sdio_slave_context_t *hal, void **out_arg, uint32_t *out_returned_cnt,
  335. bool init)
  336. {
  337. esp_err_t ret;
  338. if (init) {
  339. assert(hal->returned_desc == NULL);
  340. hal->returned_desc = hal->in_flight_head;
  341. send_set_state(hal, STATE_GETTING_RESULT);
  342. }
  343. if (hal->returned_desc != NULL) {
  344. *out_arg = hal->returned_desc->arg;
  345. hal->returned_desc = SEND_DESC_NEXT(hal->returned_desc);
  346. ret = ESP_OK;
  347. } else {
  348. if (hal->in_flight_head != NULL) {
  349. // fix the link broken of last desc when being sent
  350. assert(hal->in_flight_end != NULL);
  351. SEND_DESC_NEXT_SET(hal->in_flight_end, hal->in_flight_next);
  352. *out_returned_cnt = sdio_ringbuf_return(&(hal->send_desc_queue), (uint8_t*)hal->in_flight_head);
  353. }
  354. hal->in_flight_head = NULL;
  355. hal->in_flight_end = NULL;
  356. ret = ESP_ERR_NOT_FOUND;
  357. }
  358. return ret;
  359. }
  360. static esp_err_t send_get_unsent_desc(sdio_slave_context_t *hal, void **out_arg, uint32_t *out_return_cnt)
  361. {
  362. esp_err_t ret;
  363. sdio_slave_hal_send_desc_t *head, *tail;
  364. ret = sdio_ringbuf_recv(&(hal->send_desc_queue), (uint8_t **) &head, (uint8_t **) &tail, RINGBUF_GET_ONE);
  365. if (ret == ESP_OK) {
  366. //currently each packet takes only one desc.
  367. assert(head == tail);
  368. (*out_arg) = head->arg;
  369. (*out_return_cnt) = sdio_ringbuf_return(&(hal->send_desc_queue), (uint8_t*) head);
  370. } else if (ret == ESP_ERR_NOT_FOUND) {
  371. // if in wait to send state, set the sequence number of tail to the value last sent, just as if the packet wait to
  372. // send never queued.
  373. // Go to idle state (cur_end!=NULL and cur_start=NULL)
  374. send_set_state(hal, STATE_IDLE);
  375. hal->tail_pkt_len = sdio_slave_ll_send_read_len(hal->host);
  376. }
  377. return ret;
  378. }
  379. esp_err_t sdio_slave_hal_send_get_next_finished_arg(sdio_slave_context_t *hal, void **out_arg, uint32_t* out_returned_cnt)
  380. {
  381. bool init = (send_get_state(hal) == STATE_SENDING);
  382. if (init) {
  383. assert(hal->in_flight_head != NULL);
  384. } else {
  385. assert(send_get_state(hal) == STATE_GETTING_RESULT);
  386. }
  387. *out_returned_cnt = 0;
  388. esp_err_t ret = send_get_inflight_desc(hal, out_arg, out_returned_cnt, init);
  389. if (ret == ESP_ERR_NOT_FOUND) {
  390. // Go to wait for packet state
  391. send_set_state(hal, STATE_WAIT_FOR_START);
  392. }
  393. return ret;
  394. }
  395. esp_err_t sdio_slave_hal_send_flush_next_buffer(sdio_slave_context_t *hal, void **out_arg, uint32_t *out_return_cnt)
  396. {
  397. esp_err_t ret = ESP_OK;
  398. *out_return_cnt = 0;
  399. bool init = (send_get_state(hal) == STATE_IDLE);
  400. if (!init) {
  401. if (send_get_state(hal) != STATE_GETTING_RESULT && send_get_state(hal) != STATE_GETTING_UNSENT_DESC) {
  402. return ESP_ERR_INVALID_STATE;
  403. }
  404. }
  405. if (init || send_get_state(hal) == STATE_GETTING_RESULT) {
  406. ret = send_get_inflight_desc(hal, out_arg, out_return_cnt, init);
  407. if (ret == ESP_ERR_NOT_FOUND) {
  408. send_set_state(hal, STATE_GETTING_UNSENT_DESC);
  409. }
  410. }
  411. if (send_get_state(hal) == STATE_GETTING_UNSENT_DESC) {
  412. ret = send_get_unsent_desc(hal, out_arg, out_return_cnt);
  413. if (ret == ESP_ERR_NOT_FOUND) {
  414. send_set_state(hal, STATE_IDLE);
  415. }
  416. }
  417. return ret;
  418. }
  419. esp_err_t sdio_slave_hal_send_new_packet_if_exist(sdio_slave_context_t *hal)
  420. {
  421. esp_err_t ret;
  422. // Go to wait sending state (cur_start!=NULL && cur_end==NULL) if not sending and new packet ready.
  423. // Note we may also enter this state by stopping sending in the app.
  424. if (send_get_state(hal) == STATE_WAIT_FOR_START) {
  425. if (hal->in_flight_head == NULL) {
  426. send_check_new_packet(hal);
  427. }
  428. // Go to sending state (cur_start and cur_end != NULL) if has packet to send.
  429. if (hal->in_flight_head) {
  430. send_new_packet(hal);
  431. ret = ESP_OK;
  432. } else {
  433. ret = ESP_ERR_NOT_FOUND;
  434. }
  435. } else {
  436. ret = ESP_ERR_INVALID_STATE;
  437. }
  438. return ret;
  439. }
  440. static esp_err_t send_write_desc(uint8_t* desc, void* arg)
  441. {
  442. sdio_slave_hal_send_desc_t* next_desc = SEND_DESC_NEXT(desc);
  443. memcpy(desc, arg, sizeof(sdio_slave_hal_send_desc_t));
  444. SEND_DESC_NEXT_SET(desc, next_desc);
  445. return ESP_OK;
  446. }
  447. static void send_isr_invoke(sdio_slave_context_t *hal)
  448. {
  449. sdio_slave_ll_send_part_done_intr_ena(hal->slc, true);
  450. }
  451. esp_err_t sdio_slave_hal_send_queue(sdio_slave_context_t* hal, uint8_t *addr, size_t len, void *arg)
  452. {
  453. hal->tail_pkt_len += len;
  454. sdio_slave_hal_send_desc_t new_desc = {
  455. .dma_desc = {
  456. .size = len,
  457. .length = len,
  458. .buf = addr,
  459. .owner = 1,
  460. // in stream mode, the eof is only appended (in ISR) when new packet is ready to be sent
  461. .eof = (hal->sending_mode == SDIO_SLAVE_SEND_PACKET),
  462. },
  463. .arg = arg,
  464. .pkt_len = hal->tail_pkt_len,
  465. };
  466. esp_err_t ret = sdio_ringbuf_send(&(hal->send_desc_queue), send_write_desc, &new_desc);
  467. send_isr_invoke(hal);
  468. return ret;
  469. }
  470. /*---------------------------------------------------------------------------
  471. * Receive
  472. *--------------------------------------------------------------------------*/
  473. static lldesc_t* recv_get_first_empty_buf(sdio_slave_context_t* hal)
  474. {
  475. sdio_slave_hal_recv_stailq_t *const queue = &(hal->recv_link_list);
  476. lldesc_t *desc = STAILQ_FIRST(queue);
  477. while(desc && desc->owner == 0) {
  478. desc = STAILQ_NEXT(desc, qe);
  479. }
  480. return desc;
  481. }
  482. void sdio_slave_hal_recv_stop(sdio_slave_context_t* hal)
  483. {
  484. sdio_slave_ll_set_ioready(hal->hinf, false); //set IO ready to 0 to stop host from using
  485. sdio_slave_ll_send_stop(hal->slc);
  486. sdio_slave_ll_recv_stop(hal->slc);
  487. sdio_slave_ll_recv_intr_ena(hal->slc, false);
  488. }
  489. //touching linked list, should be protected by spinlock
  490. bool sdio_slave_hal_recv_has_next_item(sdio_slave_context_t* hal)
  491. {
  492. if (hal->recv_cur_ret == NULL || hal->recv_cur_ret->owner != 0) return false;
  493. // This may cause the ``cur_ret`` pointer to be NULL, indicating the list is empty,
  494. // in this case the ``tx_done`` should happen no longer until new desc is appended.
  495. // The app is responsible to place the pointer to the right place again when appending new desc.
  496. hal->recv_cur_ret = STAILQ_NEXT(hal->recv_cur_ret, qe);
  497. return true;
  498. }
  499. bool sdio_slave_hal_recv_done(sdio_slave_context_t *hal)
  500. {
  501. bool ret = sdio_slave_ll_recv_done(hal->slc);
  502. if (ret) {
  503. sdio_slave_ll_recv_done_clear(hal->slc);
  504. }
  505. return ret;
  506. }
  507. lldesc_t *sdio_slave_hal_recv_unload_desc(sdio_slave_context_t *hal)
  508. {
  509. sdio_slave_hal_recv_stailq_t *const queue = &hal->recv_link_list;
  510. lldesc_t *desc = STAILQ_FIRST(queue);
  511. if (desc) {
  512. STAILQ_REMOVE_HEAD(queue, qe);
  513. }
  514. return desc;
  515. }
  516. void sdio_slave_hal_recv_init_desc(sdio_slave_context_t* hal, lldesc_t *desc, uint8_t *start)
  517. {
  518. *desc = (lldesc_t) {
  519. .size = hal->recv_buffer_size,
  520. .buf = start,
  521. };
  522. }
  523. void sdio_slave_hal_recv_start(sdio_slave_context_t *hal)
  524. {
  525. sdio_slave_ll_recv_reset(hal->slc);
  526. lldesc_t *desc = recv_get_first_empty_buf(hal);
  527. if (!desc) {
  528. HAL_LOGD(TAG, "recv: restart without desc");
  529. } else {
  530. //the counter is handled when add/flush/reset
  531. sdio_slave_ll_recv_start(hal->slc, desc);
  532. sdio_slave_ll_recv_intr_ena(hal->slc, true);
  533. }
  534. }
  535. void sdio_slave_hal_recv_reset_counter(sdio_slave_context_t *hal)
  536. {
  537. sdio_slave_ll_recv_size_reset(hal->slc);
  538. lldesc_t *desc = recv_get_first_empty_buf(hal);
  539. while (desc != NULL) {
  540. sdio_slave_ll_recv_size_inc(hal->slc);
  541. desc = STAILQ_NEXT(desc, qe);
  542. }
  543. }
  544. void sdio_slave_hal_recv_flush_one_buffer(sdio_slave_context_t *hal)
  545. {
  546. sdio_slave_hal_recv_stailq_t *const queue = &hal->recv_link_list;
  547. lldesc_t *desc = STAILQ_FIRST(queue);
  548. assert (desc != NULL && desc->owner == 0);
  549. STAILQ_REMOVE_HEAD(queue, qe);
  550. desc->owner = 1;
  551. STAILQ_INSERT_TAIL(queue, desc, qe);
  552. sdio_slave_ll_recv_size_inc(hal->slc);
  553. //we only add it to the tail here, without start the DMA nor increase buffer num.
  554. }
  555. void sdio_slave_hal_load_buf(sdio_slave_context_t *hal, lldesc_t *desc)
  556. {
  557. sdio_slave_hal_recv_stailq_t *const queue = &(hal->recv_link_list);
  558. desc->owner = 1;
  559. lldesc_t *const tail = STAILQ_LAST(queue, lldesc_s, qe);
  560. STAILQ_INSERT_TAIL(queue, desc, qe);
  561. if (hal->recv_cur_ret == NULL) {
  562. hal->recv_cur_ret = desc;
  563. }
  564. if (tail == NULL) {
  565. //no one in the ll, start new ll operation.
  566. sdio_slave_ll_recv_start(hal->slc, desc);
  567. sdio_slave_ll_recv_intr_ena(hal->slc, true);
  568. HAL_LOGV(TAG, "recv_load_buf: start new");
  569. } else {
  570. //restart former ll operation
  571. sdio_slave_ll_recv_restart(hal->slc);
  572. HAL_LOGV(TAG, "recv_load_buf: restart");
  573. }
  574. sdio_slave_ll_recv_size_inc(hal->slc);
  575. }
  576. static inline void show_queue_item(lldesc_t *item)
  577. {
  578. ESP_EARLY_LOGI(TAG, "=> %p: size: %d(%d), eof: %d, owner: %d", item, item->size, item->length, item->eof, item->owner);
  579. ESP_EARLY_LOGI(TAG, " buf: %p, stqe_next: %p", item->buf, item->qe.stqe_next);
  580. }
  581. static void __attribute((unused)) dump_queue(sdio_slave_hal_recv_stailq_t *queue)
  582. {
  583. int cnt = 0;
  584. lldesc_t *item = NULL;
  585. ESP_EARLY_LOGI(TAG, ">>>>> first: %p, last: %p <<<<<", queue->stqh_first, queue->stqh_last);
  586. STAILQ_FOREACH(item, queue, qe) {
  587. cnt++;
  588. show_queue_item(item);
  589. }
  590. ESP_EARLY_LOGI(TAG, "total: %d", cnt);
  591. }
  592. /*---------------------------------------------------------------------------
  593. * Host
  594. *--------------------------------------------------------------------------*/
  595. void sdio_slave_hal_hostint_get_ena(sdio_slave_context_t *hal, sdio_slave_hostint_t *out_int_mask)
  596. {
  597. *out_int_mask = sdio_slave_ll_host_get_intena(hal->host);
  598. }
  599. void sdio_slave_hal_hostint_clear(sdio_slave_context_t *hal, const sdio_slave_hostint_t *mask)
  600. {
  601. sdio_slave_ll_host_intr_clear(hal->host, mask);//clear all interrupts
  602. }
  603. void sdio_slave_hal_hostint_set_ena(sdio_slave_context_t *hal, const sdio_slave_hostint_t *mask)
  604. {
  605. sdio_slave_ll_host_set_intena(hal->host, mask);
  606. }
  607. void sdio_slave_hal_hostint_send(sdio_slave_context_t *hal, const sdio_slave_hostint_t *mask)
  608. {
  609. sdio_slave_ll_host_send_int(hal->slc, mask);
  610. }
  611. uint8_t sdio_slave_hal_host_get_reg(sdio_slave_context_t *hal, int pos)
  612. {
  613. return sdio_slave_ll_host_get_reg(hal->host, pos);
  614. }
  615. void sdio_slave_hal_host_set_reg(sdio_slave_context_t *hal, int pos, uint8_t reg)
  616. {
  617. sdio_slave_ll_host_set_reg(hal->host, pos, reg);
  618. }
  619. void sdio_slave_hal_slvint_fetch_clear(sdio_slave_context_t *hal, sdio_slave_ll_slvint_t *out_int_mask)
  620. {
  621. sdio_slave_ll_slvint_fetch_clear(hal->slc, out_int_mask);
  622. }