timer_group_struct.h 7.2 KB

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  1. // Copyright 2017-2018 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. //
  7. // http://www.apache.org/licenses/LICENSE-2.0
  8. //
  9. // Unless required by applicable law or agreed to in writing, software
  10. // distributed under the License is distributed on an "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. // See the License for the specific language governing permissions and
  13. // limitations under the License.
  14. #ifndef _SOC_TIMG_STRUCT_H_
  15. #define _SOC_TIMG_STRUCT_H_
  16. #include <stdint.h>
  17. #ifdef __cplusplus
  18. extern "C" {
  19. #endif
  20. typedef volatile struct {
  21. struct {
  22. union {
  23. struct {
  24. uint32_t reserved0: 9;
  25. uint32_t use_xtal: 1;
  26. uint32_t alarm_en: 1;
  27. uint32_t level_int_en: 1;
  28. uint32_t edge_int_en: 1;
  29. uint32_t divider: 16;
  30. uint32_t autoreload: 1;
  31. uint32_t increase: 1;
  32. uint32_t enable: 1;
  33. };
  34. uint32_t val;
  35. } config;
  36. uint32_t cnt_low; /**/
  37. uint32_t cnt_high; /**/
  38. union {
  39. struct {
  40. uint32_t reserved0: 31;
  41. uint32_t update: 1;
  42. };
  43. uint32_t val;
  44. } update;
  45. uint32_t alarm_low; /**/
  46. uint32_t alarm_high; /**/
  47. uint32_t load_low; /**/
  48. uint32_t load_high; /**/
  49. uint32_t reload; /**/
  50. } hw_timer[2];
  51. union {
  52. struct {
  53. uint32_t reserved0: 12;
  54. uint32_t appcpu_reset_en: 1;
  55. uint32_t procpu_reset_en: 1;
  56. uint32_t flashboot_mod_en: 1;
  57. uint32_t sys_reset_length: 3;
  58. uint32_t cpu_reset_length: 3;
  59. uint32_t level_int_en: 1;
  60. uint32_t edge_int_en: 1;
  61. uint32_t stg3: 2;
  62. uint32_t stg2: 2;
  63. uint32_t stg1: 2;
  64. uint32_t stg0: 2;
  65. uint32_t en: 1;
  66. };
  67. uint32_t val;
  68. } wdt_config0;
  69. union {
  70. struct {
  71. uint32_t reserved0: 16;
  72. uint32_t clk_prescale: 16;
  73. };
  74. uint32_t val;
  75. } wdt_config1;
  76. uint32_t wdt_config2; /**/
  77. uint32_t wdt_config3; /**/
  78. uint32_t wdt_config4; /**/
  79. uint32_t wdt_config5; /**/
  80. uint32_t wdt_feed; /**/
  81. uint32_t wdt_wprotect; /**/
  82. union {
  83. struct {
  84. uint32_t reserved0: 12;
  85. uint32_t start_cycling: 1;
  86. uint32_t clk_sel: 2;
  87. uint32_t rdy: 1;
  88. uint32_t max: 15;
  89. uint32_t start: 1;
  90. };
  91. uint32_t val;
  92. } rtc_cali_cfg;
  93. union {
  94. struct {
  95. uint32_t cycling_data_vld: 1;
  96. uint32_t reserved1: 6;
  97. uint32_t value: 25;
  98. };
  99. uint32_t val;
  100. } rtc_cali_cfg1;
  101. union {
  102. struct {
  103. uint32_t reserved0: 6;
  104. uint32_t use_reftick: 1;
  105. uint32_t rtc_only: 1;
  106. uint32_t cpst_en: 1;
  107. uint32_t lac_en: 1;
  108. uint32_t alarm_en: 1;
  109. uint32_t level_int_en: 1;
  110. uint32_t edge_int_en: 1;
  111. uint32_t divider: 16;
  112. uint32_t autoreload: 1;
  113. uint32_t increase: 1;
  114. uint32_t en: 1;
  115. };
  116. uint32_t val;
  117. } lactconfig;
  118. union {
  119. struct {
  120. uint32_t reserved0: 6;
  121. uint32_t step_len: 26;
  122. };
  123. uint32_t val;
  124. } lactrtc;
  125. uint32_t lactlo; /**/
  126. uint32_t lacthi; /**/
  127. uint32_t lactupdate; /**/
  128. uint32_t lactalarmlo; /**/
  129. uint32_t lactalarmhi; /**/
  130. uint32_t lactloadlo; /**/
  131. uint32_t lactloadhi; /**/
  132. uint32_t lactload; /**/
  133. union {
  134. struct {
  135. uint32_t t0: 1;
  136. uint32_t t1: 1;
  137. uint32_t wdt: 1;
  138. uint32_t lact: 1;
  139. uint32_t reserved4: 28;
  140. };
  141. uint32_t val;
  142. } int_ena;
  143. union {
  144. struct {
  145. uint32_t t0: 1;
  146. uint32_t t1: 1;
  147. uint32_t wdt: 1;
  148. uint32_t lact: 1;
  149. uint32_t reserved4: 28;
  150. };
  151. uint32_t val;
  152. } int_raw;
  153. union {
  154. struct {
  155. uint32_t t0: 1;
  156. uint32_t t1: 1;
  157. uint32_t wdt: 1;
  158. uint32_t lact: 1;
  159. uint32_t reserved4: 28;
  160. };
  161. uint32_t val;
  162. } int_st;
  163. union {
  164. struct {
  165. uint32_t t0: 1;
  166. uint32_t t1: 1;
  167. uint32_t wdt: 1;
  168. uint32_t lact: 1;
  169. uint32_t reserved4: 28;
  170. };
  171. uint32_t val;
  172. } int_clr;
  173. union {
  174. struct {
  175. uint32_t timeout: 1; /*timeout indicator*/
  176. uint32_t reserved1: 2;
  177. uint32_t timeout_rst_cnt: 4; /*Cycles that release calibration timeout reset*/
  178. uint32_t timeout_thres: 25; /*timeout if cali value counts over threshold*/
  179. };
  180. uint32_t val;
  181. } rtc_cali_cfg2;
  182. uint32_t reserved_ac;
  183. uint32_t reserved_b0;
  184. uint32_t reserved_b4;
  185. uint32_t reserved_b8;
  186. uint32_t reserved_bc;
  187. uint32_t reserved_c0;
  188. uint32_t reserved_c4;
  189. uint32_t reserved_c8;
  190. uint32_t reserved_cc;
  191. uint32_t reserved_d0;
  192. uint32_t reserved_d4;
  193. uint32_t reserved_d8;
  194. uint32_t reserved_dc;
  195. uint32_t reserved_e0;
  196. uint32_t reserved_e4;
  197. uint32_t reserved_e8;
  198. uint32_t reserved_ec;
  199. uint32_t reserved_f0;
  200. uint32_t reserved_f4;
  201. union {
  202. struct {
  203. uint32_t date: 28;
  204. uint32_t reserved28: 4;
  205. };
  206. uint32_t val;
  207. } timg_date;
  208. union {
  209. struct {
  210. uint32_t reserved0: 31;
  211. uint32_t en: 1;
  212. };
  213. uint32_t val;
  214. } clk;
  215. } timg_dev_t;
  216. extern timg_dev_t TIMERG0;
  217. extern timg_dev_t TIMERG1;
  218. #ifdef __cplusplus
  219. }
  220. #endif
  221. #endif /* _SOC_TIMG_STRUCT_H_ */