esp_slave_protocol.rst 6.7 KB

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  1. Communication with ESP SDIO Slave
  2. ====================================
  3. .. _esp_slave_init:
  4. ESP SDIO slave initialization
  5. ------------------------------
  6. .. only:: esp32s2
  7. .. note::
  8. {IDF_TARGET_NAME} does not have a SDIO peripheral.
  9. The host should initialize the {IDF_TARGET_NAME} SDIO slave according to the standard
  10. SDIO initialization process (Sector 3.1.2 of `SDIO Simplified
  11. Specification <https://www.sdcard.org/downloads/pls/>`_). In this specification
  12. and below, the SDIO slave is also called an (SD)IO card. All the
  13. initialization CMD52 and CMD53 are sent to Func 0 (CIA region). Here is an
  14. brief example on how to do this:
  15. 1. SDIO reset
  16. CMD52 (Write 0x6=0x8)
  17. 2. SD reset
  18. CMD0
  19. 3. Check whether IO card (optional)
  20. CMD8
  21. 4. Send SDIO op cond and wait for card ready
  22. CMD5 arg = 0x00000000
  23. CMD5 arg = 0x00ff8000 (according to the response above, poll until ready)
  24. **Example:**
  25. Arg of R4 after first CMD5 (arg=0x00000000) is 0xXXFFFF00.
  26. Keep sending CMD5 with arg=0x00FFFF00 until the R4 shows card ready (arg bit 31=1).
  27. 5. Set address
  28. CMD3
  29. 6. Select card
  30. CMD7 (arg address according to CMD3 response)
  31. **Example:**
  32. Arg of R6 after CMD3 is 0x0001xxxx.
  33. Arg of CMD7 should be 0x00010000.
  34. 7. Select 4-bit mode (optional)
  35. CMD52 (Write 0x07=0x02)
  36. 8. Enable func1
  37. CMD52 (Write 0x02=0x02)
  38. 9. Enable SDIO interrupt (required if interrupt line (DAT1) is used)
  39. CMD52 (Write 0x04=0x03)
  40. 10. Set Func0 blocksize (optional, default value is 512 (0x200))
  41. CMD52/53 (Read 0x10~0x11)
  42. CMD52/53 (Write 0x10=0x00)
  43. CMD52/53 (Write 0x11=0x02)
  44. CMD52/53 (Read 0x10~0x11, read to check the final value)
  45. 11. Set Func1 blocksize (optional, default value is 512 (0x200))
  46. CMD52/53 (Read 0x110~0x111)
  47. CMD52/53 (Write 0x110=0x00)
  48. CMD52/53 (Write 0x111=0x02)
  49. CMD52/53 (Read 0x110~0x111, read to check the final value)
  50. .. _esp_slave_protocol_layer:
  51. ESP SDIO slave protocol
  52. -----------------------
  53. The protocol is based on Function 1 access by CMD52 and CMD53, offering 3 services: (1) sending and receiving FIFO, (2) 52 8-bit R/W
  54. register shared by host and slave, (3) 8 general purpose interrupt sources from host to slave and 8 in the opposite direction.
  55. There is a component `esp_serial_slave_link` implementing the logic of this protocol for
  56. ESP32 master to communicate with the ESP32 slave. See :doc:`/api-reference/protocols/esp_serial_slave_link`.
  57. The host should access the registers below as described to communicate with slave.
  58. Slave register table
  59. ^^^^^^^^^^^^^^^^^^^^
  60. 32-bit
  61. #######
  62. - 0x044 (TOKEN_RDATA): in which bit 27-16 holds the receiving buffer number.
  63. - 0x058 (INT_ST): holds the interrupt source bits from slave to host.
  64. - 0x060 (PKT_LEN): holds the accumulated length (by byte) to be sent from slave to host.
  65. - 0x0D4 (INT_CLR): write 1 to clear interrupt bits corresponding to INT_ST.
  66. - 0x0DC (INT_ENA): mask bits for interrupts from slave to host.
  67. 8-bit
  68. #####
  69. Shared general purpose registers:
  70. - 0x06C-0x077: R/W registers 0-11 shared by slave and host.
  71. - 0x07A-0x07B: R/W registers 14-15 shared by slave and host.
  72. - 0x07E-0x07F: R/W registers 18-19 shared by slave and host.
  73. - 0x088-0x08B: R/W registers 24-27 shared by slave and host.
  74. - 0x09C-0x0BB: R/W registers 32-63 shared by slave and host.
  75. Interrupt Registers:
  76. - 0x08D (SLAVE_INT): bits for host to interrupt slave. auto clear.
  77. FIFO (sending and receiving)
  78. ############################
  79. 0x090 - 0x1F7FF are reserved for FIFOs.
  80. The address of CMD53 is related to the length requested to read from/write to
  81. the slave in a single transfer:
  82. *requested length = 0x1F800-address*
  83. The slave will respond with the length according to the length field in
  84. CMD53, with the data longer than *requested length* filled with 0 (sending)
  85. or discard (receiving).
  86. .. note:: This includes both the block and the byte mode of CMD53.
  87. The function number should be set to 1, OP Code should be set to 1 (for CMD53).
  88. It is allowed to use CMD53 mode combination of block+byte to get higher
  89. effeciency when accessing the FIFO by arbitrary length. E.g. The block
  90. size is set to 512 by default, you can write/get 1031 bytes of data
  91. to/from the FIFO by:
  92. 1. Send CMD53 in block mode, block count=2 (1024 bytes) to address
  93. 0x1F3F9=0x1F800-**1031**.
  94. 2. Then send CMD53 in byte mode, byte count=8 (or 7 if your controller
  95. supports that) to address 0x1F7F9=0x1F800-**7**.
  96. Interrupts
  97. ^^^^^^^^^^
  98. For the host interrupts, the slave raise the interrupt by pulling DAT1 line down at a proper time (level sensitive).
  99. The host detect this and read the INT_ST register to see the source. Then the host can clear it by writing the INT_CLR
  100. register and do something with the interrupt. The host can also mask unneeded sources by clearing the bits in INT_ENA
  101. register corresponding to the sources. If all the sources are cleared (or masked), the DAT1 line goes inactive.
  102. ``sdio_slave_hostint_t`` (:doc:`sdio_slave`) shows the bit definition corresponding to host interrupt sources.
  103. For the slave interrupts, the host send transfers to write the SLAVE_INT register. Once a bit is written from 0 to 1,
  104. the slave hardware and driver will detect it and inform the app.
  105. Receiving FIFO
  106. ^^^^^^^^^^^^^^
  107. To write the receiving FIFO in the slave, host should work in the following steps:
  108. 1. Read the TOKEN1 field (bits 27-16) of TOKEN_RDATA (0x044) register. The buffer number remaining is TOKEN1 minus
  109. the number of buffers used by host.
  110. 2. Make sure the buffer number is sufficient (*recv_buffer_size* * *buffer_num* is greater than data to write, *recv_buffer_size*
  111. is pre-defined between the host and the slave before the communication starts). Or go back to step 1 until the buffer
  112. is enough.
  113. 3. Write to the FIFO address with CMD53. Note that the *requested length* should not be larger than calculated in step 2,
  114. and the FIFO address is related to *rquested length*.
  115. 4. Calculate used buffers, note that non-full buffer at the tail should be seen as one that is used.
  116. Sending FIFO
  117. ^^^^^^^^^^^^
  118. To read the sending FIFO in the slave, host should work in the following steps:
  119. 1. Wait for the interrupt line to be active (optional, low by default).
  120. 2. Read (poll) the interrupt bits in INT_ST register to see whether new packets exists.
  121. 3. If new packets are ready, reads the PKT_LEN reg. The data length to read from slave is PKT_LEN minuses the length
  122. that has been read from the host. If the PKT_LEN is not larger than used, wait and poll until the slave is ready and
  123. update the PKT_LEN.
  124. 4. Read from the FIFO with CMD53. Note that the *requested length* should not be larger than calculated in step3, and
  125. the FIFO address is related to *requested length*.
  126. 5. Recored read length.