efuse.h 12 KB

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  1. // Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. //
  7. // http://www.apache.org/licenses/LICENSE-2.0
  8. //
  9. // Unless required by applicable law or agreed to in writing, software
  10. // distributed under the License is distributed on an "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. // See the License for the specific language governing permissions and
  13. // limitations under the License.
  14. #pragma once
  15. #ifdef __cplusplus
  16. extern "C" {
  17. #endif
  18. #include <stdint.h>
  19. #include <stddef.h>
  20. #include <stdbool.h>
  21. /** \defgroup efuse_APIs efuse APIs
  22. * @brief ESP32 efuse read/write APIs
  23. * @attention
  24. *
  25. */
  26. /** @addtogroup efuse_APIs
  27. * @{
  28. */
  29. typedef enum {
  30. ETS_EFUSE_KEY_PURPOSE_USER = 0,
  31. ETS_EFUSE_KEY_PURPOSE_RESERVED = 1,
  32. ETS_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1 = 2,
  33. ETS_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2 = 3,
  34. ETS_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY = 4,
  35. ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_ALL = 5,
  36. ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_JTAG = 6,
  37. ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_DIGITAL_SIGNATURE = 7,
  38. ETS_EFUSE_KEY_PURPOSE_HMAC_UP = 8,
  39. ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST0 = 9,
  40. ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST1 = 10,
  41. ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST2 = 11,
  42. ETS_EFUSE_KEY_PURPOSE_MAX,
  43. } ets_efuse_purpose_t;
  44. typedef enum {
  45. ETS_EFUSE_BLOCK0 = 0,
  46. ETS_EFUSE_MAC_SPI_SYS_0 = 1,
  47. ETS_EFUSE_BLOCK_SYS_DATA = 2,
  48. ETS_EFUSE_BLOCK_USR_DATA = 3,
  49. ETS_EFUSE_BLOCK_KEY0 = 4,
  50. ETS_EFUSE_BLOCK_KEY1 = 5,
  51. ETS_EFUSE_BLOCK_KEY2 = 6,
  52. ETS_EFUSE_BLOCK_KEY3 = 7,
  53. ETS_EFUSE_BLOCK_KEY4 = 8,
  54. ETS_EFUSE_BLOCK_KEY5 = 9,
  55. ETS_EFUSE_BLOCK_KEY6 = 10,
  56. ETS_EFUSE_BLOCK_MAX,
  57. } ets_efuse_block_t;
  58. /**
  59. * @brief set timing accroding the apb clock, so no read error or write error happens.
  60. *
  61. * @param clock: apb clock in HZ, only accept 5M(in FPGA), 10M(in FPGA), 20M, 40M, 80M.
  62. *
  63. * @return : 0 if success, others if clock not accepted
  64. */
  65. int ets_efuse_set_timing(uint32_t clock);
  66. /**
  67. * @brief Enable efuse subsystem. Called after reset. Doesn't need to be called again.
  68. */
  69. void ets_efuse_start(void);
  70. /**
  71. * @brief Efuse read operation: copies data from physical efuses to efuse read registers.
  72. *
  73. * @param null
  74. *
  75. * @return : 0 if success, others if apb clock is not accepted
  76. */
  77. int ets_efuse_read(void);
  78. /**
  79. * @brief Efuse write operation: Copies data from efuse write registers to efuse. Operates on a single block of efuses at a time.
  80. *
  81. * @note This function does not update read efuses, call ets_efuse_read() once all programming is complete.
  82. *
  83. * @return : 0 if success, others if apb clock is not accepted
  84. */
  85. int ets_efuse_program(ets_efuse_block_t block);
  86. /**
  87. * @brief Set all Efuse program registers to zero.
  88. *
  89. * Call this before writing new data to the program registers.
  90. */
  91. void ets_efuse_clear_program_registers(void);
  92. /**
  93. * @brief Program a block of key data to an efuse block
  94. *
  95. * @param key_block Block to read purpose for. Must be in range ETS_EFUSE_BLOCK_KEY0 to ETS_EFUSE_BLOCK_KEY6. Key block must be unused (@ref ets_efuse_key_block_unused).
  96. * @param purpose Purpose to set for this key. Purpose must be already unset.
  97. * @param data Pointer to data to write.
  98. * @param data_len Length of data to write.
  99. *
  100. * @note This function also calls ets_efuse_program() for the specified block, and for block 0 (setting the purpose)
  101. */
  102. int ets_efuse_write_key(ets_efuse_block_t key_block, ets_efuse_purpose_t purpose, const void *data, size_t data_len);
  103. /* @brief Return the address of a particular efuse block's first read register
  104. *
  105. * @param block Index of efuse block to look up
  106. *
  107. * @return 0 if block is invalid, otherwise a numeric read register address
  108. * of the first word in the block.
  109. */
  110. uint32_t ets_efuse_get_read_register_address(ets_efuse_block_t block);
  111. /**
  112. * @brief Return the current purpose set for an efuse key block
  113. *
  114. * @param key_block Block to read purpose for. Must be in range ETS_EFUSE_BLOCK_KEY0 to ETS_EFUSE_BLOCK_KEY6.
  115. */
  116. ets_efuse_purpose_t ets_efuse_get_key_purpose(ets_efuse_block_t key_block);
  117. /**
  118. * @brief Find a key block with the particular purpose set
  119. *
  120. * @param purpose Purpose to search for.
  121. * @param[out] key_block Pointer which will be set to the key block if found. Can be NULL, if only need to test the key block exists.
  122. * @return true if found, false if not found. If false, value at key_block pointer is unchanged.
  123. */
  124. bool ets_efuse_find_purpose(ets_efuse_purpose_t purpose, ets_efuse_block_t *key_block);
  125. /**
  126. * Return true if the key block is unused, false otherwise.
  127. *
  128. * An unused key block is all zero content, not read or write protected,
  129. * and has purpose 0 (ETS_EFUSE_KEY_PURPOSE_USER)
  130. *
  131. * @param key_block key block to check.
  132. *
  133. * @return true if key block is unused, false if key block or used
  134. * or the specified block index is not a key block.
  135. */
  136. bool ets_efuse_key_block_unused(ets_efuse_block_t key_block);
  137. /**
  138. * @brief Search for an unused key block and return the first one found.
  139. *
  140. * See @ref ets_efuse_key_block_unused for a description of an unused key block.
  141. *
  142. * @return First unused key block, or ETS_EFUSE_BLOCK_MAX if no unused key block is found.
  143. */
  144. ets_efuse_block_t ets_efuse_find_unused_key_block(void);
  145. /**
  146. * @brief Return the number of unused efuse key blocks (0-6)
  147. */
  148. unsigned ets_efuse_count_unused_key_blocks(void);
  149. /**
  150. * @brief Calculate Reed-Solomon Encoding values for a block of efuse data.
  151. *
  152. * @param data Pointer to data buffer (length 32 bytes)
  153. * @param rs_values Pointer to write encoded data to (length 12 bytes)
  154. */
  155. void ets_efuse_rs_calculate(const void *data, void *rs_values);
  156. /**
  157. * @brief Read spi flash pads configuration from Efuse
  158. *
  159. * @return
  160. * - 0 for default SPI pins.
  161. * - 1 for default HSPI pins.
  162. * - Other values define a custom pin configuration mask. Pins are encoded as per the EFUSE_SPICONFIG_RET_SPICLK,
  163. * EFUSE_SPICONFIG_RET_SPIQ, EFUSE_SPICONFIG_RET_SPID, EFUSE_SPICONFIG_RET_SPICS0, EFUSE_SPICONFIG_RET_SPIHD macros.
  164. * WP pin (for quad I/O modes) is not saved in efuse and not returned by this function.
  165. */
  166. uint32_t ets_efuse_get_spiconfig(void);
  167. /**
  168. * @brief Read spi flash wp pad from Efuse
  169. *
  170. * @return
  171. * - 0x3f for invalid.
  172. * - 0~46 is valid.
  173. */
  174. uint32_t ets_efuse_get_wp_pad(void);
  175. /**
  176. * @brief Read opi flash pads configuration from Efuse
  177. *
  178. * @return
  179. * - 0 for default SPI pins.
  180. * - Other values define a custom pin configuration mask. From the LSB, every 6 bits represent a GPIO number which stand for:
  181. * DQS, D4, D5, D6, D7 accordingly.
  182. */
  183. uint32_t ets_efuse_get_opiconfig(void);
  184. /**
  185. * @brief Read if download mode disabled from Efuse
  186. *
  187. * @return
  188. * - true for efuse disable download mode.
  189. * - false for efuse doesn't disable download mode.
  190. */
  191. bool ets_efuse_download_modes_disabled(void);
  192. /**
  193. * @brief Read if legacy spi flash boot mode disabled from Efuse
  194. *
  195. * @return
  196. * - true for efuse disable legacy spi flash boot mode.
  197. * - false for efuse doesn't disable legacy spi flash boot mode.
  198. */
  199. bool ets_efuse_legacy_spi_boot_mode_disabled(void);
  200. /**
  201. * @brief Read if uart print control value from Efuse
  202. *
  203. * @return
  204. * - 0 for uart force print.
  205. * - 1 for uart print when GPIO46 is low when digital reset.
  206. * 2 for uart print when GPIO46 is high when digital reset.
  207. * 3 for uart force slient
  208. */
  209. uint32_t ets_efuse_get_uart_print_control(void);
  210. /**
  211. * @brief Read which channel will used by ROM to print
  212. *
  213. * @return
  214. * - 0 for UART0.
  215. * - 1 for UART1.
  216. */
  217. uint32_t ets_efuse_get_uart_print_channel(void);
  218. /**
  219. * @brief Read if usb download mode disabled from Efuse
  220. *
  221. * (Also returns true if security download mode is enabled, as this mode
  222. * disables USB download.)
  223. *
  224. * @return
  225. * - true for efuse disable usb download mode.
  226. * - false for efuse doesn't disable usb download mode.
  227. */
  228. bool ets_efuse_usb_download_mode_disabled(void);
  229. /**
  230. * @brief Read if tiny basic mode disabled from Efuse
  231. *
  232. * @return
  233. * - true for efuse disable tiny basic mode.
  234. * - false for efuse doesn't disable tiny basic mode.
  235. */
  236. bool ets_efuse_tiny_basic_mode_disabled(void);
  237. /**
  238. * @brief Read if usb module disabled from Efuse
  239. *
  240. * @return
  241. * - true for efuse disable usb module.
  242. * - false for efuse doesn't disable usb module.
  243. */
  244. bool ets_efuse_usb_module_disabled(void);
  245. /**
  246. * @brief Read if security download modes enabled from Efuse
  247. *
  248. * @return
  249. * - true for efuse enable security download mode.
  250. * - false for efuse doesn't enable security download mode.
  251. */
  252. bool ets_efuse_security_download_modes_enabled(void);
  253. /**
  254. * @brief Return true if secure boot is enabled in EFuse
  255. */
  256. bool ets_efuse_secure_boot_enabled(void);
  257. /**
  258. * @brief Return true if secure boot aggressive revoke is enabled in EFuse
  259. */
  260. bool ets_efuse_secure_boot_aggressive_revoke_enabled(void);
  261. /**
  262. * @brief Return true if cache encryption (flash, PSRAM, etc) is enabled from boot via EFuse
  263. */
  264. bool ets_efuse_cache_encryption_enabled(void);
  265. /**
  266. * @brief Return true if EFuse indicates an external phy needs to be used for USB
  267. */
  268. bool ets_efuse_usb_use_ext_phy(void);
  269. /**
  270. * @brief Return true if EFuse indicates USB device persistence is disabled
  271. */
  272. bool ets_efuse_usb_force_nopersist(void);
  273. /**
  274. * @brief Return true if OPI pins GPIO33-37 are powered by VDDSPI, otherwise by VDD33CPU
  275. */
  276. bool ets_efuse_flash_opi_5pads_power_sel_vddspi(void);
  277. /**
  278. * @brief Return true if EFuse indicates an opi flash is attached.
  279. */
  280. bool ets_efuse_flash_opi_mode(void);
  281. /**
  282. * @brief Return true if EFuse indicates to send a flash resume command.
  283. */
  284. bool ets_efuse_force_send_resume(void);
  285. /**
  286. * @brief return the time in us ROM boot need wait flash to power on from Efuse
  287. *
  288. * @return
  289. * - uint32_t the time in us.
  290. */
  291. uint32_t ets_efuse_get_flash_delay_us(void);
  292. #define EFUSE_SPICONFIG_SPI_DEFAULTS 0
  293. #define EFUSE_SPICONFIG_HSPI_DEFAULTS 1
  294. #define EFUSE_SPICONFIG_RET_SPICLK_MASK 0x3f
  295. #define EFUSE_SPICONFIG_RET_SPICLK_SHIFT 0
  296. #define EFUSE_SPICONFIG_RET_SPICLK(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPICLK_SHIFT) & EFUSE_SPICONFIG_RET_SPICLK_MASK)
  297. #define EFUSE_SPICONFIG_RET_SPIQ_MASK 0x3f
  298. #define EFUSE_SPICONFIG_RET_SPIQ_SHIFT 6
  299. #define EFUSE_SPICONFIG_RET_SPIQ(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPIQ_SHIFT) & EFUSE_SPICONFIG_RET_SPIQ_MASK)
  300. #define EFUSE_SPICONFIG_RET_SPID_MASK 0x3f
  301. #define EFUSE_SPICONFIG_RET_SPID_SHIFT 12
  302. #define EFUSE_SPICONFIG_RET_SPID(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPID_SHIFT) & EFUSE_SPICONFIG_RET_SPID_MASK)
  303. #define EFUSE_SPICONFIG_RET_SPICS0_MASK 0x3f
  304. #define EFUSE_SPICONFIG_RET_SPICS0_SHIFT 18
  305. #define EFUSE_SPICONFIG_RET_SPICS0(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPICS0_SHIFT) & EFUSE_SPICONFIG_RET_SPICS0_MASK)
  306. #define EFUSE_SPICONFIG_RET_SPIHD_MASK 0x3f
  307. #define EFUSE_SPICONFIG_RET_SPIHD_SHIFT 24
  308. #define EFUSE_SPICONFIG_RET_SPIHD(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPIHD_SHIFT) & EFUSE_SPICONFIG_RET_SPIHD_MASK)
  309. /**
  310. * @brief Enable JTAG temporarily by writing a JTAG HMAC "key" into
  311. * the JTAG_CTRL registers.
  312. *
  313. * Works if JTAG has been "soft" disabled by burning the EFUSE_SOFT_DIS_JTAG efuse.
  314. *
  315. * Will enable the HMAC module to generate a "downstream" HMAC value from a key already saved in efuse, and then write the JTAG HMAC "key" which will enable JTAG if the two keys match.
  316. *
  317. * @param jtag_hmac_key Pointer to a 32 byte array containing a valid key. Supplied by user.
  318. * @param key_block Index of a key block containing the source for this key.
  319. *
  320. * @return ETS_FAILED if HMAC operation fails or invalid parameter, ETS_OK otherwise. ETS_OK doesn't necessarily mean that JTAG was enabled.
  321. */
  322. int ets_jtag_enable_temporarily(const uint8_t *jtag_hmac_key, ets_efuse_block_t key_block);
  323. /**
  324. * @brief A crc8 algorithm used for MAC addresses in efuse
  325. *
  326. * @param unsigned char const *p : Pointer to original data.
  327. *
  328. * @param unsigned int len : Data length in byte.
  329. *
  330. * @return unsigned char: Crc value.
  331. */
  332. unsigned char esp_crc8(unsigned char const *p, unsigned int len);
  333. /**
  334. * @}
  335. */
  336. #ifdef __cplusplus
  337. }
  338. #endif