Kconfig 5.2 KB

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  1. menu "Driver configurations"
  2. menu "ADC configuration"
  3. config ADC_FORCE_XPD_FSM
  4. bool "Use the FSM to control ADC power"
  5. default n
  6. help
  7. ADC power can be controlled by the FSM instead of software. This allows the ADC to
  8. be shut off when it is not working leading to lower power consumption. However
  9. using the FSM control ADC power will increase the noise of ADC.
  10. config ADC_DISABLE_DAC
  11. bool "Disable DAC when ADC2 is used on GPIO 25 and 26"
  12. default y
  13. help
  14. If this is set, the ADC2 driver will disable the output of the DAC corresponding to the specified
  15. channel. This is the default value.
  16. For testing, disable this option so that we can measure the output of DAC by internal ADC.
  17. endmenu # ADC Configuration
  18. menu "SPI configuration"
  19. config SPI_MASTER_IN_IRAM
  20. bool "Place transmitting functions of SPI master into IRAM"
  21. default n
  22. select SPI_MASTER_ISR_IN_IRAM
  23. help
  24. Normally only the ISR of SPI master is placed in the IRAM, so that it
  25. can work without the flash when interrupt is triggered.
  26. For other functions, there's some possibility that the flash cache
  27. miss when running inside and out of SPI functions, which may increase
  28. the interval of SPI transactions.
  29. Enable this to put ``queue_trans``, ``get_trans_result`` and
  30. ``transmit`` functions into the IRAM to avoid possible cache miss.
  31. During unit test, this is enabled to measure the ideal case of api.
  32. config SPI_MASTER_ISR_IN_IRAM
  33. bool "Place SPI master ISR function into IRAM"
  34. default y
  35. help
  36. Place the SPI master ISR in to IRAM to avoid possible cache miss.
  37. Also you can forbid the ISR being disabled during flash writing
  38. access, by add ESP_INTR_FLAG_IRAM when initializing the driver.
  39. config SPI_SLAVE_IN_IRAM
  40. bool "Place transmitting functions of SPI slave into IRAM"
  41. default n
  42. select SPI_SLAVE_ISR_IN_IRAM
  43. help
  44. Normally only the ISR of SPI slave is placed in the IRAM, so that it
  45. can work without the flash when interrupt is triggered.
  46. For other functions, there's some possibility that the flash cache
  47. miss when running inside and out of SPI functions, which may increase
  48. the interval of SPI transactions.
  49. Enable this to put ``queue_trans``, ``get_trans_result`` and
  50. ``transmit`` functions into the IRAM to avoid possible cache miss.
  51. config SPI_SLAVE_ISR_IN_IRAM
  52. bool "Place SPI slave ISR function into IRAM"
  53. default y
  54. help
  55. Place the SPI slave ISR in to IRAM to avoid possible cache miss.
  56. Also you can forbid the ISR being disabled during flash writing
  57. access, by add ESP_INTR_FLAG_IRAM when initializing the driver.
  58. endmenu # SPI Configuration
  59. menu "TWAI configuration"
  60. config TWAI_ISR_IN_IRAM
  61. bool "Place TWAI ISR function into IRAM"
  62. default n
  63. select FREERTOS_SUPPORT_STATIC_ALLOCATION
  64. # We need to enable FREERTOS_SUPPORT_STATIC_ALLOCATION because the
  65. # TWAI driver requires the use of FreeRTOS Queues and Semaphores from
  66. # the driver ISR. These Queues and Semaphores need to be placed in
  67. # DRAM thus FreeRTOS static allocation API is required.
  68. help
  69. Place the TWAI ISR in to IRAM. This will allow the ISR to avoid
  70. cache misses, and also be able to run whilst the cache is disabled
  71. (such as when writing to SPI Flash).
  72. Note that if this option is enabled:
  73. - Users should also set the ESP_INTR_FLAG_IRAM in the driver
  74. configuration structure when installing the driver (see docs for
  75. specifics).
  76. - Alert logging (i.e., setting of the TWAI_ALERT_AND_LOG flag)
  77. will have no effect.
  78. endmenu # TWAI Configuration
  79. menu "UART configuration"
  80. config UART_ISR_IN_IRAM
  81. bool "Place UART ISR function into IRAM"
  82. default n
  83. help
  84. If this option is not selected, UART interrupt will be disabled for a long time and
  85. may cause data lost when doing spi flash operation.
  86. endmenu # UART Configuration
  87. menu "RTCIO configuration"
  88. visible if IDF_TARGET_ESP32
  89. config RTCIO_SUPPORT_RTC_GPIO_DESC
  90. bool "Support array `rtc_gpio_desc` for ESP32"
  91. depends on IDF_TARGET_ESP32
  92. default n
  93. help
  94. The the array `rtc_gpio_desc` will don't compile by default.
  95. If this option is selected, the array `rtc_gpio_desc` can be compile.
  96. If user use this array, please enable this configuration.
  97. endmenu # RTCIO Configuration
  98. endmenu # Driver configurations