adc.c 6.2 KB

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  1. // Copyright 2016-2019 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. //
  7. // http://www.apache.org/licenses/LICENSE-2.0
  8. //
  9. // Unless required by applicable law or agreed to in writing, software
  10. // distributed under the License is distributed on an "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. // See the License for the specific language governing permissions and
  13. // limitations under the License.
  14. #include <esp_types.h>
  15. #include <stdlib.h>
  16. #include <ctype.h>
  17. #include "esp_log.h"
  18. #include "sys/lock.h"
  19. #include "soc/rtc.h"
  20. #include "soc/periph_defs.h"
  21. #include "freertos/FreeRTOS.h"
  22. #include "freertos/xtensa_api.h"
  23. #include "freertos/semphr.h"
  24. #include "freertos/timers.h"
  25. #include "esp_intr_alloc.h"
  26. #include "driver/rtc_io.h"
  27. #include "driver/rtc_cntl.h"
  28. #include "driver/gpio.h"
  29. #include "driver/adc.h"
  30. #include "sdkconfig.h"
  31. #include "esp32/rom/ets_sys.h"
  32. #ifndef NDEBUG
  33. // Enable built-in checks in queue.h in debug builds
  34. #define INVARIANTS
  35. #endif
  36. #include "sys/queue.h"
  37. #include "hal/adc_types.h"
  38. #include "hal/adc_hal.h"
  39. #define ADC_MAX_MEAS_NUM_DEFAULT (255)
  40. #define ADC_MEAS_NUM_LIM_DEFAULT (1)
  41. #define DIG_ADC_OUTPUT_FORMAT_DEFUALT (ADC_DIGI_FORMAT_12BIT)
  42. #define DIG_ADC_ATTEN_DEFUALT (ADC_ATTEN_DB_11)
  43. #define DIG_ADC_BIT_WIDTH_DEFUALT (ADC_WIDTH_BIT_12)
  44. #define ADC_CHECK_RET(fun_ret) ({ \
  45. if (fun_ret != ESP_OK) { \
  46. ESP_LOGE(ADC_TAG,"%s:%d\n",__FUNCTION__,__LINE__); \
  47. return ESP_FAIL; \
  48. } \
  49. })
  50. static const char *ADC_TAG = "ADC";
  51. #define ADC_CHECK(a, str, ret_val) ({ \
  52. if (!(a)) { \
  53. ESP_LOGE(ADC_TAG,"%s:%d (%s):%s", __FILE__, __LINE__, __FUNCTION__, str); \
  54. return (ret_val); \
  55. } \
  56. })
  57. #define ADC_GET_IO_NUM(periph, channel) (adc_channel_io_map[periph][channel])
  58. #define ADC_CHANNEL_CHECK(periph, channel) ADC_CHECK(channel < SOC_ADC_CHANNEL_NUM(periph), "ADC"#periph" channel error", ESP_ERR_INVALID_ARG)
  59. extern portMUX_TYPE rtc_spinlock; //TODO: Will be placed in the appropriate position after the rtc module is finished.
  60. #define ADC_ENTER_CRITICAL() portENTER_CRITICAL(&rtc_spinlock)
  61. #define ADC_EXIT_CRITICAL() portEXIT_CRITICAL(&rtc_spinlock)
  62. /*---------------------------------------------------------------
  63. Digital controller setting
  64. ---------------------------------------------------------------*/
  65. esp_err_t adc_set_i2s_data_source(adc_i2s_source_t src)
  66. {
  67. ADC_CHECK(src < ADC_I2S_DATA_SRC_MAX, "ADC i2s data source error", ESP_ERR_INVALID_ARG);
  68. ADC_ENTER_CRITICAL();
  69. adc_hal_digi_set_data_source(src);
  70. ADC_EXIT_CRITICAL();
  71. return ESP_OK;
  72. }
  73. esp_err_t adc_i2s_mode_init(adc_unit_t adc_unit, adc_channel_t channel)
  74. {
  75. if (adc_unit & ADC_UNIT_1) {
  76. ADC_CHECK((SOC_ADC_SUPPORT_DMA_MODE(ADC_NUM_1)), "ADC1 not support DMA for now.", ESP_ERR_INVALID_ARG);
  77. ADC_CHANNEL_CHECK(ADC_NUM_1, channel);
  78. }
  79. if (adc_unit & ADC_UNIT_2) {
  80. ADC_CHECK((SOC_ADC_SUPPORT_DMA_MODE(ADC_NUM_2)), "ADC2 not support DMA for now.", ESP_ERR_INVALID_ARG);
  81. ADC_CHANNEL_CHECK(ADC_NUM_2, channel);
  82. }
  83. adc_digi_pattern_table_t adc1_pattern[1];
  84. adc_digi_pattern_table_t adc2_pattern[1];
  85. adc_digi_config_t dig_cfg = {
  86. .conv_limit_en = ADC_MEAS_NUM_LIM_DEFAULT,
  87. .conv_limit_num = ADC_MAX_MEAS_NUM_DEFAULT,
  88. .format = DIG_ADC_OUTPUT_FORMAT_DEFUALT,
  89. .conv_mode = (adc_digi_convert_mode_t)adc_unit,
  90. };
  91. if (adc_unit & ADC_UNIT_1) {
  92. adc1_pattern[0].atten = DIG_ADC_ATTEN_DEFUALT;
  93. adc1_pattern[0].bit_width = DIG_ADC_BIT_WIDTH_DEFUALT;
  94. adc1_pattern[0].channel = channel;
  95. dig_cfg.adc1_pattern_len = 1;
  96. dig_cfg.adc1_pattern = adc1_pattern;
  97. }
  98. if (adc_unit & ADC_UNIT_2) {
  99. adc2_pattern[0].atten = DIG_ADC_ATTEN_DEFUALT;
  100. adc2_pattern[0].bit_width = DIG_ADC_BIT_WIDTH_DEFUALT;
  101. adc2_pattern[0].channel = channel;
  102. dig_cfg.adc2_pattern_len = 1;
  103. dig_cfg.adc2_pattern = adc2_pattern;
  104. }
  105. adc_gpio_init(adc_unit, channel);
  106. ADC_ENTER_CRITICAL();
  107. adc_hal_digi_init();
  108. adc_hal_digi_controller_config(&dig_cfg);
  109. ADC_EXIT_CRITICAL();
  110. return ESP_OK;
  111. }
  112. esp_err_t adc_digi_init(void)
  113. {
  114. ADC_ENTER_CRITICAL();
  115. adc_hal_digi_init();
  116. ADC_EXIT_CRITICAL();
  117. return ESP_OK;
  118. }
  119. esp_err_t adc_digi_deinit(void)
  120. {
  121. ADC_ENTER_CRITICAL();
  122. adc_hal_digi_deinit();
  123. ADC_EXIT_CRITICAL();
  124. return ESP_OK;
  125. }
  126. esp_err_t adc_digi_controller_config(const adc_digi_config_t *config)
  127. {
  128. ADC_ENTER_CRITICAL();
  129. adc_hal_digi_controller_config(config);
  130. ADC_EXIT_CRITICAL();
  131. return ESP_OK;
  132. }
  133. /*---------------------------------------------------------------
  134. RTC controller setting
  135. ---------------------------------------------------------------*/
  136. /*---------------------------------------------------------------
  137. HALL SENSOR
  138. ---------------------------------------------------------------*/
  139. static int hall_sensor_get_value(void) //hall sensor without LNA
  140. {
  141. int hall_value;
  142. adc_power_acquire();
  143. ADC_ENTER_CRITICAL();
  144. /* disable other peripherals. */
  145. adc_hal_amp_disable();
  146. adc_hal_hall_enable();
  147. // set controller
  148. adc_hal_set_controller( ADC_NUM_1, ADC_CTRL_RTC );
  149. hall_value = adc_hal_hall_convert();
  150. adc_hal_hall_disable();
  151. ADC_EXIT_CRITICAL();
  152. adc_power_release();
  153. return hall_value;
  154. }
  155. int hall_sensor_read(void)
  156. {
  157. adc_gpio_init(ADC_UNIT_1, ADC1_CHANNEL_0);
  158. adc_gpio_init(ADC_UNIT_1, ADC1_CHANNEL_3);
  159. adc1_config_channel_atten(ADC1_CHANNEL_0, ADC_ATTEN_DB_0);
  160. adc1_config_channel_atten(ADC1_CHANNEL_3, ADC_ATTEN_DB_0);
  161. return hall_sensor_get_value();
  162. }