Kconfig 5.2 KB

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  1. menu "Ethernet"
  2. # Invisible item that is enabled if any Ethernet selection is made
  3. config ETH_ENABLED
  4. bool
  5. menuconfig ETH_USE_ESP32_EMAC
  6. depends on IDF_TARGET_ESP32
  7. bool "Support ESP32 internal EMAC controller"
  8. default y
  9. select ETH_ENABLED
  10. help
  11. ESP32 integrates a 10/100M Ethernet MAC controller.
  12. if ETH_USE_ESP32_EMAC
  13. choice ETH_PHY_INTERFACE
  14. prompt "PHY interface"
  15. default ETH_PHY_INTERFACE_RMII
  16. help
  17. Select the communication interface between MAC and PHY chip.
  18. config ETH_PHY_INTERFACE_RMII
  19. bool "Reduced Media Independent Interface (RMII)"
  20. config ETH_PHY_INTERFACE_MII
  21. bool "Media Independent Interface (MII)"
  22. endchoice
  23. if ETH_PHY_INTERFACE_RMII
  24. choice ETH_RMII_CLK_MODE
  25. prompt "RMII clock mode"
  26. default ETH_RMII_CLK_INPUT
  27. help
  28. Select external or internal RMII clock.
  29. config ETH_RMII_CLK_INPUT
  30. bool "Input RMII clock from external"
  31. help
  32. MAC will get RMII clock from outside.
  33. Note that ESP32 only supports GPIO0 to input the RMII clock.
  34. config ETH_RMII_CLK_OUTPUT
  35. bool "Output RMII clock from internal"
  36. help
  37. ESP32 can generate RMII clock by internal APLL.
  38. This clock can be routed to the external PHY device.
  39. ESP32 supports to route the RMII clock to GPIO0/16/17.
  40. endchoice
  41. endif
  42. if ETH_RMII_CLK_INPUT
  43. config ETH_RMII_CLK_IN_GPIO
  44. int
  45. range 0 0
  46. default 0
  47. help
  48. ESP32 only supports GPIO0 to input the RMII clock.
  49. endif
  50. if ETH_RMII_CLK_OUTPUT
  51. config ETH_RMII_CLK_OUTPUT_GPIO0
  52. bool "Output RMII clock from GPIO0 (Experimental!)"
  53. default n
  54. help
  55. GPIO0 can be set to output a pre-divided PLL clock (test only!).
  56. Enabling this option will configure GPIO0 to output a 50MHz clock.
  57. In fact this clock doesn't have directly relationship with EMAC peripheral.
  58. Sometimes this clock won't work well with your PHY chip. You might need to
  59. add some extra devices after GPIO0 (e.g. inverter).
  60. Note that outputting RMII clock on GPIO0 is an experimental practice.
  61. If you want the Ethernet to work with WiFi, don't select GPIO0 output mode for stability.
  62. if !ETH_RMII_CLK_OUTPUT_GPIO0
  63. config ETH_RMII_CLK_OUT_GPIO
  64. int "RMII clock GPIO number"
  65. range 16 17
  66. default 17
  67. help
  68. Set the GPIO number to output RMII Clock.
  69. endif
  70. endif
  71. config ETH_DMA_BUFFER_SIZE
  72. int "Ethernet DMA buffer size (Byte)"
  73. range 256 1600
  74. default 512
  75. help
  76. Set the size of each buffer used by Ethernet MAC DMA.
  77. config ETH_DMA_RX_BUFFER_NUM
  78. int "Amount of Ethernet DMA Rx buffers"
  79. range 3 30
  80. default 10
  81. help
  82. Number of DMA receive buffers. Each buffer's size is ETH_DMA_BUFFER_SIZE.
  83. Larger number of buffers could increase throughput somehow.
  84. config ETH_DMA_TX_BUFFER_NUM
  85. int "Amount of Ethernet DMA Tx buffers"
  86. range 3 30
  87. default 10
  88. help
  89. Number of DMA transmit buffers. Each buffer's size is ETH_DMA_BUFFER_SIZE.
  90. Larger number of buffers could increase throughput somehow.
  91. endif
  92. menuconfig ETH_USE_SPI_ETHERNET
  93. bool "Support SPI to Ethernet Module"
  94. default y
  95. select ETH_ENABLED
  96. help
  97. ESP-IDF can also support some SPI-Ethernet modules.
  98. if ETH_USE_SPI_ETHERNET
  99. config ETH_SPI_ETHERNET_DM9051
  100. bool "Use DM9051"
  101. help
  102. DM9051 is a fast Ethernet controller with an SPI interface.
  103. It's also integrated with a 10/100M PHY and MAC.
  104. Select to enable DM9051 driver.
  105. endif
  106. menuconfig ETH_USE_OPENETH
  107. bool "Support OpenCores Ethernet MAC (for use with QEMU)"
  108. default n
  109. select ETH_ENABLED
  110. help
  111. OpenCores Ethernet MAC driver can be used when an ESP-IDF application
  112. is executed in QEMU. This driver is not supported when running on a
  113. real chip.
  114. if ETH_USE_OPENETH
  115. config ETH_OPENETH_DMA_RX_BUFFER_NUM
  116. int "Number of Ethernet DMA Rx buffers"
  117. range 1 64
  118. default 4
  119. help
  120. Number of DMA receive buffers, each buffer is 1600 bytes.
  121. config ETH_OPENETH_DMA_TX_BUFFER_NUM
  122. int "Number of Ethernet DMA Tx buffers"
  123. range 1 64
  124. default 1
  125. help
  126. Number of DMA transmit buffers, each buffer is 1600 bytes.
  127. endif
  128. endmenu