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- menu "Ethernet"
- # Invisible item that is enabled if any Ethernet selection is made
- config ETH_ENABLED
- bool
- menuconfig ETH_USE_ESP32_EMAC
- depends on IDF_TARGET_ESP32
- bool "Support ESP32 internal EMAC controller"
- default y
- select ETH_ENABLED
- help
- ESP32 integrates a 10/100M Ethernet MAC controller.
- if ETH_USE_ESP32_EMAC
- choice ETH_PHY_INTERFACE
- prompt "PHY interface"
- default ETH_PHY_INTERFACE_RMII
- help
- Select the communication interface between MAC and PHY chip.
- config ETH_PHY_INTERFACE_RMII
- bool "Reduced Media Independent Interface (RMII)"
- config ETH_PHY_INTERFACE_MII
- bool "Media Independent Interface (MII)"
- endchoice
- if ETH_PHY_INTERFACE_RMII
- choice ETH_RMII_CLK_MODE
- prompt "RMII clock mode"
- default ETH_RMII_CLK_INPUT
- help
- Select external or internal RMII clock.
- config ETH_RMII_CLK_INPUT
- bool "Input RMII clock from external"
- help
- MAC will get RMII clock from outside.
- Note that ESP32 only supports GPIO0 to input the RMII clock.
- config ETH_RMII_CLK_OUTPUT
- bool "Output RMII clock from internal"
- help
- ESP32 can generate RMII clock by internal APLL.
- This clock can be routed to the external PHY device.
- ESP32 supports to route the RMII clock to GPIO0/16/17.
- endchoice
- endif
- if ETH_RMII_CLK_INPUT
- config ETH_RMII_CLK_IN_GPIO
- int
- range 0 0
- default 0
- help
- ESP32 only supports GPIO0 to input the RMII clock.
- endif
- if ETH_RMII_CLK_OUTPUT
- config ETH_RMII_CLK_OUTPUT_GPIO0
- bool "Output RMII clock from GPIO0 (Experimental!)"
- default n
- help
- GPIO0 can be set to output a pre-divided PLL clock (test only!).
- Enabling this option will configure GPIO0 to output a 50MHz clock.
- In fact this clock doesn't have directly relationship with EMAC peripheral.
- Sometimes this clock won't work well with your PHY chip. You might need to
- add some extra devices after GPIO0 (e.g. inverter).
- Note that outputting RMII clock on GPIO0 is an experimental practice.
- If you want the Ethernet to work with WiFi, don't select GPIO0 output mode for stability.
- if !ETH_RMII_CLK_OUTPUT_GPIO0
- config ETH_RMII_CLK_OUT_GPIO
- int "RMII clock GPIO number"
- range 16 17
- default 17
- help
- Set the GPIO number to output RMII Clock.
- endif
- endif
- config ETH_DMA_BUFFER_SIZE
- int "Ethernet DMA buffer size (Byte)"
- range 256 1600
- default 512
- help
- Set the size of each buffer used by Ethernet MAC DMA.
- config ETH_DMA_RX_BUFFER_NUM
- int "Amount of Ethernet DMA Rx buffers"
- range 3 30
- default 10
- help
- Number of DMA receive buffers. Each buffer's size is ETH_DMA_BUFFER_SIZE.
- Larger number of buffers could increase throughput somehow.
- config ETH_DMA_TX_BUFFER_NUM
- int "Amount of Ethernet DMA Tx buffers"
- range 3 30
- default 10
- help
- Number of DMA transmit buffers. Each buffer's size is ETH_DMA_BUFFER_SIZE.
- Larger number of buffers could increase throughput somehow.
- endif
- menuconfig ETH_USE_SPI_ETHERNET
- bool "Support SPI to Ethernet Module"
- default y
- select ETH_ENABLED
- help
- ESP-IDF can also support some SPI-Ethernet modules.
- if ETH_USE_SPI_ETHERNET
- config ETH_SPI_ETHERNET_DM9051
- bool "Use DM9051"
- help
- DM9051 is a fast Ethernet controller with an SPI interface.
- It's also integrated with a 10/100M PHY and MAC.
- Select to enable DM9051 driver.
- endif
- menuconfig ETH_USE_OPENETH
- bool "Support OpenCores Ethernet MAC (for use with QEMU)"
- default n
- select ETH_ENABLED
- help
- OpenCores Ethernet MAC driver can be used when an ESP-IDF application
- is executed in QEMU. This driver is not supported when running on a
- real chip.
- if ETH_USE_OPENETH
- config ETH_OPENETH_DMA_RX_BUFFER_NUM
- int "Number of Ethernet DMA Rx buffers"
- range 1 64
- default 4
- help
- Number of DMA receive buffers, each buffer is 1600 bytes.
- config ETH_OPENETH_DMA_TX_BUFFER_NUM
- int "Number of Ethernet DMA Tx buffers"
- range 1 64
- default 1
- help
- Number of DMA transmit buffers, each buffer is 1600 bytes.
- endif
- endmenu
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