vfs_uart.c 29 KB

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  1. // Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. //
  7. // http://www.apache.org/licenses/LICENSE-2.0
  8. //
  9. // Unless required by applicable law or agreed to in writing, software
  10. // distributed under the License is distributed on an "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. // See the License for the specific language governing permissions and
  13. // limitations under the License.
  14. #include <string.h>
  15. #include <stdbool.h>
  16. #include <stdarg.h>
  17. #include <sys/errno.h>
  18. #include <sys/lock.h>
  19. #include <sys/fcntl.h>
  20. #include <sys/param.h>
  21. #include "esp_vfs.h"
  22. #include "esp_vfs_dev.h"
  23. #include "esp_attr.h"
  24. #include "soc/uart_periph.h"
  25. #include "driver/uart.h"
  26. #include "sdkconfig.h"
  27. #include "driver/uart_select.h"
  28. #if CONFIG_IDF_TARGET_ESP32
  29. #include "esp32/rom/uart.h"
  30. #elif CONFIG_IDF_TARGET_ESP32S2
  31. #include "esp32s2/rom/uart.h"
  32. #endif
  33. // TODO: make the number of UARTs chip dependent
  34. #define UART_NUM SOC_UART_NUM
  35. // Token signifying that no character is available
  36. #define NONE -1
  37. #if CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF
  38. # define DEFAULT_TX_MODE ESP_LINE_ENDINGS_CRLF
  39. #elif CONFIG_NEWLIB_STDOUT_LINE_ENDING_CR
  40. # define DEFAULT_TX_MODE ESP_LINE_ENDINGS_CR
  41. #else
  42. # define DEFAULT_TX_MODE ESP_LINE_ENDINGS_LF
  43. #endif
  44. #if CONFIG_NEWLIB_STDIN_LINE_ENDING_CRLF
  45. # define DEFAULT_RX_MODE ESP_LINE_ENDINGS_CRLF
  46. #elif CONFIG_NEWLIB_STDIN_LINE_ENDING_CR
  47. # define DEFAULT_RX_MODE ESP_LINE_ENDINGS_CR
  48. #else
  49. # define DEFAULT_RX_MODE ESP_LINE_ENDINGS_LF
  50. #endif
  51. // UART write bytes function type
  52. typedef void (*tx_func_t)(int, int);
  53. // UART read bytes function type
  54. typedef int (*rx_func_t)(int);
  55. // Basic functions for sending and receiving bytes over UART
  56. static void uart_tx_char(int fd, int c);
  57. static int uart_rx_char(int fd);
  58. // Functions for sending and receiving bytes which use UART driver
  59. static void uart_tx_char_via_driver(int fd, int c);
  60. static int uart_rx_char_via_driver(int fd);
  61. typedef struct {
  62. // Pointers to UART peripherals
  63. uart_dev_t* uart;
  64. // One-character buffer used for newline conversion code, per UART
  65. int peek_char;
  66. // per-UART locks, lazily initialized
  67. _lock_t read_lock;
  68. _lock_t write_lock;
  69. // Per-UART non-blocking flag. Note: default implementation does not honor this
  70. // flag, all reads are non-blocking. This option becomes effective if UART
  71. // driver is used.
  72. bool non_blocking;
  73. // Newline conversion mode when transmitting
  74. esp_line_endings_t tx_mode;
  75. // Newline conversion mode when receiving
  76. esp_line_endings_t rx_mode;
  77. // Functions used to write bytes to UART. Default to "basic" functions.
  78. tx_func_t tx_func;
  79. // Functions used to read bytes from UART. Default to "basic" functions.
  80. rx_func_t rx_func;
  81. } vfs_uart_context_t;
  82. #define VFS_CTX_DEFAULT_VAL(uart_dev) (vfs_uart_context_t) {\
  83. .uart = (uart_dev),\
  84. .peek_char = NONE,\
  85. .tx_mode = DEFAULT_TX_MODE,\
  86. .rx_mode = DEFAULT_RX_MODE,\
  87. .tx_func = uart_tx_char,\
  88. .rx_func = uart_rx_char,\
  89. }
  90. //If the context should be dynamically initialized, remove this structure
  91. //and point s_ctx to allocated data.
  92. static vfs_uart_context_t s_context[UART_NUM] = {
  93. VFS_CTX_DEFAULT_VAL(&UART0),
  94. VFS_CTX_DEFAULT_VAL(&UART1),
  95. #if UART_NUM > 2
  96. VFS_CTX_DEFAULT_VAL(&UART2),
  97. #endif
  98. };
  99. static vfs_uart_context_t* s_ctx[UART_NUM] = {
  100. &s_context[0],
  101. &s_context[1],
  102. #if UART_NUM > 2
  103. &s_context[2],
  104. #endif
  105. };
  106. #ifdef CONFIG_VFS_SUPPORT_SELECT
  107. typedef struct {
  108. esp_vfs_select_sem_t select_sem;
  109. fd_set *readfds;
  110. fd_set *writefds;
  111. fd_set *errorfds;
  112. fd_set readfds_orig;
  113. fd_set writefds_orig;
  114. fd_set errorfds_orig;
  115. } uart_select_args_t;
  116. static uart_select_args_t **s_registered_selects = NULL;
  117. static int s_registered_select_num = 0;
  118. static portMUX_TYPE s_registered_select_lock = portMUX_INITIALIZER_UNLOCKED;
  119. static esp_err_t uart_end_select(void *end_select_args);
  120. #endif // CONFIG_VFS_SUPPORT_SELECT
  121. static int uart_open(const char * path, int flags, int mode)
  122. {
  123. // this is fairly primitive, we should check if file is opened read only,
  124. // and error out if write is requested
  125. int fd = -1;
  126. if (strcmp(path, "/0") == 0) {
  127. fd = 0;
  128. } else if (strcmp(path, "/1") == 0) {
  129. fd = 1;
  130. } else if (strcmp(path, "/2") == 0) {
  131. fd = 2;
  132. } else {
  133. errno = ENOENT;
  134. return fd;
  135. }
  136. s_ctx[fd]->non_blocking = ((flags & O_NONBLOCK) == O_NONBLOCK);
  137. return fd;
  138. }
  139. static void uart_tx_char(int fd, int c)
  140. {
  141. uart_dev_t* uart = s_ctx[fd]->uart;
  142. while (uart->status.txfifo_cnt >= 127) {
  143. ;
  144. }
  145. #if CONFIG_IDF_TARGET_ESP32
  146. uart->fifo.rw_byte = c;
  147. #elif CONFIG_IDF_TARGET_ESP32S2
  148. uart->ahb_fifo.rw_byte = c;
  149. #endif
  150. }
  151. static void uart_tx_char_via_driver(int fd, int c)
  152. {
  153. char ch = (char) c;
  154. uart_write_bytes(fd, &ch, 1);
  155. }
  156. static int uart_rx_char(int fd)
  157. {
  158. uart_dev_t* uart = s_ctx[fd]->uart;
  159. if (uart->status.rxfifo_cnt == 0) {
  160. return NONE;
  161. }
  162. #if CONFIG_IDF_TARGET_ESP32
  163. return uart->fifo.rw_byte;
  164. #elif CONFIG_IDF_TARGET_ESP32S2
  165. return READ_PERI_REG(UART_FIFO_AHB_REG(fd));
  166. #endif
  167. }
  168. static int uart_rx_char_via_driver(int fd)
  169. {
  170. uint8_t c;
  171. int timeout = s_ctx[fd]->non_blocking ? 0 : portMAX_DELAY;
  172. int n = uart_read_bytes(fd, &c, 1, timeout);
  173. if (n <= 0) {
  174. return NONE;
  175. }
  176. return c;
  177. }
  178. static ssize_t uart_write(int fd, const void * data, size_t size)
  179. {
  180. assert(fd >=0 && fd < 3);
  181. const char *data_c = (const char *)data;
  182. /* Even though newlib does stream locking on each individual stream, we need
  183. * a dedicated UART lock if two streams (stdout and stderr) point to the
  184. * same UART.
  185. */
  186. _lock_acquire_recursive(&s_ctx[fd]->write_lock);
  187. for (size_t i = 0; i < size; i++) {
  188. int c = data_c[i];
  189. if (c == '\n' && s_ctx[fd]->tx_mode != ESP_LINE_ENDINGS_LF) {
  190. s_ctx[fd]->tx_func(fd, '\r');
  191. if (s_ctx[fd]->tx_mode == ESP_LINE_ENDINGS_CR) {
  192. continue;
  193. }
  194. }
  195. s_ctx[fd]->tx_func(fd, c);
  196. }
  197. _lock_release_recursive(&s_ctx[fd]->write_lock);
  198. return size;
  199. }
  200. /* Helper function which returns a previous character or reads a new one from
  201. * UART. Previous character can be returned ("pushed back") using
  202. * uart_return_char function.
  203. */
  204. static int uart_read_char(int fd)
  205. {
  206. /* return character from peek buffer, if it is there */
  207. if (s_ctx[fd]->peek_char != NONE) {
  208. int c = s_ctx[fd]->peek_char;
  209. s_ctx[fd]->peek_char = NONE;
  210. return c;
  211. }
  212. return s_ctx[fd]->rx_func(fd);
  213. }
  214. /* Push back a character; it will be returned by next call to uart_read_char */
  215. static void uart_return_char(int fd, int c)
  216. {
  217. assert(s_ctx[fd]->peek_char == NONE);
  218. s_ctx[fd]->peek_char = c;
  219. }
  220. static ssize_t uart_read(int fd, void* data, size_t size)
  221. {
  222. assert(fd >=0 && fd < 3);
  223. char *data_c = (char *) data;
  224. size_t received = 0;
  225. _lock_acquire_recursive(&s_ctx[fd]->read_lock);
  226. while (received < size) {
  227. int c = uart_read_char(fd);
  228. if (c == '\r') {
  229. if (s_ctx[fd]->rx_mode == ESP_LINE_ENDINGS_CR) {
  230. c = '\n';
  231. } else if (s_ctx[fd]->rx_mode == ESP_LINE_ENDINGS_CRLF) {
  232. /* look ahead */
  233. int c2 = uart_read_char(fd);
  234. if (c2 == NONE) {
  235. /* could not look ahead, put the current character back */
  236. uart_return_char(fd, c);
  237. break;
  238. }
  239. if (c2 == '\n') {
  240. /* this was \r\n sequence. discard \r, return \n */
  241. c = '\n';
  242. } else {
  243. /* \r followed by something else. put the second char back,
  244. * it will be processed on next iteration. return \r now.
  245. */
  246. uart_return_char(fd, c2);
  247. }
  248. }
  249. } else if (c == NONE) {
  250. break;
  251. }
  252. data_c[received] = (char) c;
  253. ++received;
  254. if (c == '\n') {
  255. break;
  256. }
  257. }
  258. _lock_release_recursive(&s_ctx[fd]->read_lock);
  259. if (received > 0) {
  260. return received;
  261. }
  262. errno = EWOULDBLOCK;
  263. return -1;
  264. }
  265. static int uart_fstat(int fd, struct stat * st)
  266. {
  267. assert(fd >=0 && fd < 3);
  268. st->st_mode = S_IFCHR;
  269. return 0;
  270. }
  271. static int uart_close(int fd)
  272. {
  273. assert(fd >=0 && fd < 3);
  274. return 0;
  275. }
  276. static int uart_fcntl(int fd, int cmd, int arg)
  277. {
  278. assert(fd >=0 && fd < 3);
  279. int result = 0;
  280. if (cmd == F_GETFL) {
  281. if (s_ctx[fd]->non_blocking) {
  282. result |= O_NONBLOCK;
  283. }
  284. } else if (cmd == F_SETFL) {
  285. s_ctx[fd]->non_blocking = (arg & O_NONBLOCK) != 0;
  286. } else {
  287. // unsupported operation
  288. result = -1;
  289. errno = ENOSYS;
  290. }
  291. return result;
  292. }
  293. #ifdef CONFIG_VFS_SUPPORT_DIR
  294. static int uart_access(const char *path, int amode)
  295. {
  296. int ret = -1;
  297. if (strcmp(path, "/0") == 0 || strcmp(path, "/1") == 0 || strcmp(path, "/2") == 0) {
  298. if (F_OK == amode) {
  299. ret = 0; //path exists
  300. } else {
  301. if ((((amode & R_OK) == R_OK) || ((amode & W_OK) == W_OK)) && ((amode & X_OK) != X_OK)) {
  302. ret = 0; //path is readable and/or writable but not executable
  303. } else {
  304. errno = EACCES;
  305. }
  306. }
  307. } else {
  308. errno = ENOENT;
  309. }
  310. return ret;
  311. }
  312. #endif // CONFIG_VFS_SUPPORT_DIR
  313. static int uart_fsync(int fd)
  314. {
  315. assert(fd >= 0 && fd < 3);
  316. _lock_acquire_recursive(&s_ctx[fd]->write_lock);
  317. uart_tx_wait_idle((uint8_t) fd);
  318. _lock_release_recursive(&s_ctx[fd]->write_lock);
  319. return 0;
  320. }
  321. #ifdef CONFIG_VFS_SUPPORT_SELECT
  322. static esp_err_t register_select(uart_select_args_t *args)
  323. {
  324. esp_err_t ret = ESP_ERR_INVALID_ARG;
  325. if (args) {
  326. portENTER_CRITICAL(&s_registered_select_lock);
  327. const int new_size = s_registered_select_num + 1;
  328. if ((s_registered_selects = realloc(s_registered_selects, new_size * sizeof(uart_select_args_t *))) == NULL) {
  329. ret = ESP_ERR_NO_MEM;
  330. } else {
  331. s_registered_selects[s_registered_select_num] = args;
  332. s_registered_select_num = new_size;
  333. ret = ESP_OK;
  334. }
  335. portEXIT_CRITICAL(&s_registered_select_lock);
  336. }
  337. return ret;
  338. }
  339. static esp_err_t unregister_select(uart_select_args_t *args)
  340. {
  341. esp_err_t ret = ESP_OK;
  342. if (args) {
  343. ret = ESP_ERR_INVALID_STATE;
  344. portENTER_CRITICAL(&s_registered_select_lock);
  345. for (int i = 0; i < s_registered_select_num; ++i) {
  346. if (s_registered_selects[i] == args) {
  347. const int new_size = s_registered_select_num - 1;
  348. // The item is removed by overwriting it with the last item. The subsequent rellocation will drop the
  349. // last item.
  350. s_registered_selects[i] = s_registered_selects[new_size];
  351. s_registered_selects = realloc(s_registered_selects, new_size * sizeof(uart_select_args_t *));
  352. if (s_registered_selects || new_size == 0) {
  353. s_registered_select_num = new_size;
  354. ret = ESP_OK;
  355. } else {
  356. ret = ESP_ERR_NO_MEM;
  357. }
  358. break;
  359. }
  360. }
  361. portEXIT_CRITICAL(&s_registered_select_lock);
  362. }
  363. return ret;
  364. }
  365. static void select_notif_callback_isr(uart_port_t uart_num, uart_select_notif_t uart_select_notif, BaseType_t *task_woken)
  366. {
  367. portENTER_CRITICAL_ISR(&s_registered_select_lock);
  368. for (int i = 0; i < s_registered_select_num; ++i) {
  369. uart_select_args_t *args = s_registered_selects[i];
  370. if (args) {
  371. switch (uart_select_notif) {
  372. case UART_SELECT_READ_NOTIF:
  373. if (FD_ISSET(uart_num, &args->readfds_orig)) {
  374. FD_SET(uart_num, args->readfds);
  375. esp_vfs_select_triggered_isr(args->select_sem, task_woken);
  376. }
  377. break;
  378. case UART_SELECT_WRITE_NOTIF:
  379. if (FD_ISSET(uart_num, &args->writefds_orig)) {
  380. FD_SET(uart_num, args->writefds);
  381. esp_vfs_select_triggered_isr(args->select_sem, task_woken);
  382. }
  383. break;
  384. case UART_SELECT_ERROR_NOTIF:
  385. if (FD_ISSET(uart_num, &args->errorfds_orig)) {
  386. FD_SET(uart_num, args->errorfds);
  387. esp_vfs_select_triggered_isr(args->select_sem, task_woken);
  388. }
  389. break;
  390. }
  391. }
  392. }
  393. portEXIT_CRITICAL_ISR(&s_registered_select_lock);
  394. }
  395. static esp_err_t uart_start_select(int nfds, fd_set *readfds, fd_set *writefds, fd_set *exceptfds,
  396. esp_vfs_select_sem_t select_sem, void **end_select_args)
  397. {
  398. const int max_fds = MIN(nfds, UART_NUM);
  399. *end_select_args = NULL;
  400. for (int i = 0; i < max_fds; ++i) {
  401. if (FD_ISSET(i, readfds) || FD_ISSET(i, writefds) || FD_ISSET(i, exceptfds)) {
  402. if (!uart_is_driver_installed(i)) {
  403. return ESP_ERR_INVALID_STATE;
  404. }
  405. }
  406. }
  407. uart_select_args_t *args = malloc(sizeof(uart_select_args_t));
  408. if (args == NULL) {
  409. return ESP_ERR_NO_MEM;
  410. }
  411. args->select_sem = select_sem;
  412. args->readfds = readfds;
  413. args->writefds = writefds;
  414. args->errorfds = exceptfds;
  415. args->readfds_orig = *readfds; // store the original values because they will be set to zero
  416. args->writefds_orig = *writefds;
  417. args->errorfds_orig = *exceptfds;
  418. FD_ZERO(readfds);
  419. FD_ZERO(writefds);
  420. FD_ZERO(exceptfds);
  421. portENTER_CRITICAL(uart_get_selectlock());
  422. //uart_set_select_notif_callback sets the callbacks in UART ISR
  423. for (int i = 0; i < max_fds; ++i) {
  424. if (FD_ISSET(i, &args->readfds_orig) || FD_ISSET(i, &args->writefds_orig) || FD_ISSET(i, &args->errorfds_orig)) {
  425. uart_set_select_notif_callback(i, select_notif_callback_isr);
  426. }
  427. }
  428. for (int i = 0; i < max_fds; ++i) {
  429. if (FD_ISSET(i, &args->readfds_orig)) {
  430. size_t buffered_size;
  431. if (uart_get_buffered_data_len(i, &buffered_size) == ESP_OK && buffered_size > 0) {
  432. // signalize immediately when data is buffered
  433. FD_SET(i, readfds);
  434. esp_vfs_select_triggered(args->select_sem);
  435. }
  436. }
  437. }
  438. esp_err_t ret = register_select(args);
  439. if (ret != ESP_OK) {
  440. portEXIT_CRITICAL(uart_get_selectlock());
  441. free(args);
  442. return ret;
  443. }
  444. portEXIT_CRITICAL(uart_get_selectlock());
  445. *end_select_args = args;
  446. return ESP_OK;
  447. }
  448. static esp_err_t uart_end_select(void *end_select_args)
  449. {
  450. uart_select_args_t *args = end_select_args;
  451. portENTER_CRITICAL(uart_get_selectlock());
  452. esp_err_t ret = unregister_select(args);
  453. for (int i = 0; i < UART_NUM; ++i) {
  454. uart_set_select_notif_callback(i, NULL);
  455. }
  456. portEXIT_CRITICAL(uart_get_selectlock());
  457. if (args) {
  458. free(args);
  459. }
  460. return ret;
  461. }
  462. #endif // CONFIG_VFS_SUPPORT_SELECT
  463. #ifdef CONFIG_VFS_SUPPORT_TERMIOS
  464. static int uart_tcsetattr(int fd, int optional_actions, const struct termios *p)
  465. {
  466. if (fd < 0 || fd >= UART_NUM) {
  467. errno = EBADF;
  468. return -1;
  469. }
  470. if (p == NULL) {
  471. errno = EINVAL;
  472. return -1;
  473. }
  474. switch (optional_actions) {
  475. case TCSANOW:
  476. // nothing to do
  477. break;
  478. case TCSADRAIN:
  479. if (uart_wait_tx_done(fd, portMAX_DELAY) != ESP_OK) {
  480. errno = EINVAL;
  481. return -1;
  482. }
  483. /* FALLTHRU */
  484. case TCSAFLUSH:
  485. if (uart_flush_input(fd) != ESP_OK) {
  486. errno = EINVAL;
  487. return -1;
  488. }
  489. break;
  490. default:
  491. errno = EINVAL;
  492. return -1;
  493. }
  494. if (p->c_iflag & IGNCR) {
  495. s_ctx[fd]->rx_mode = ESP_LINE_ENDINGS_CRLF;
  496. } else if (p->c_iflag & ICRNL) {
  497. s_ctx[fd]->rx_mode = ESP_LINE_ENDINGS_CR;
  498. } else {
  499. s_ctx[fd]->rx_mode = ESP_LINE_ENDINGS_LF;
  500. }
  501. // output line endings are not supported because there is no alternative in termios for converting LF to CR
  502. {
  503. uart_word_length_t data_bits;
  504. const tcflag_t csize_bits = p->c_cflag & CSIZE;
  505. switch (csize_bits) {
  506. case CS5:
  507. data_bits = UART_DATA_5_BITS;
  508. break;
  509. case CS6:
  510. data_bits = UART_DATA_6_BITS;
  511. break;
  512. case CS7:
  513. data_bits = UART_DATA_7_BITS;
  514. break;
  515. case CS8:
  516. data_bits = UART_DATA_8_BITS;
  517. break;
  518. default:
  519. errno = EINVAL;
  520. return -1;
  521. }
  522. if (uart_set_word_length(fd, data_bits) != ESP_OK) {
  523. errno = EINVAL;
  524. return -1;
  525. }
  526. }
  527. if (uart_set_stop_bits(fd, (p->c_cflag & CSTOPB) ? UART_STOP_BITS_2 : UART_STOP_BITS_1) != ESP_OK) {
  528. errno = EINVAL;
  529. return -1;
  530. }
  531. if (uart_set_parity(fd, (p->c_cflag & PARENB) ?
  532. ((p->c_cflag & PARODD) ? UART_PARITY_ODD : UART_PARITY_EVEN)
  533. :
  534. UART_PARITY_DISABLE) != ESP_OK) {
  535. errno = EINVAL;
  536. return -1;
  537. }
  538. if (p->c_cflag & (CBAUD | CBAUDEX)) {
  539. if (p->c_ispeed != p->c_ospeed) {
  540. errno = EINVAL;
  541. return -1;
  542. } else {
  543. uint32_t b;
  544. if (p->c_cflag & BOTHER) {
  545. b = p->c_ispeed;
  546. } else {
  547. switch (p->c_ispeed) {
  548. case B0:
  549. b = 0;
  550. break;
  551. case B50:
  552. b = 50;
  553. break;
  554. case B75:
  555. b = 75;
  556. break;
  557. case B110:
  558. b = 110;
  559. break;
  560. case B134:
  561. b = 134;
  562. break;
  563. case B150:
  564. b = 150;
  565. break;
  566. case B200:
  567. b = 200;
  568. break;
  569. case B300:
  570. b = 300;
  571. break;
  572. case B600:
  573. b = 600;
  574. break;
  575. case B1200:
  576. b = 1200;
  577. break;
  578. case B1800:
  579. b = 1800;
  580. break;
  581. case B2400:
  582. b = 2400;
  583. break;
  584. case B4800:
  585. b = 4800;
  586. break;
  587. case B9600:
  588. b = 9600;
  589. break;
  590. case B19200:
  591. b = 19200;
  592. break;
  593. case B38400:
  594. b = 38400;
  595. break;
  596. case B57600:
  597. b = 57600;
  598. break;
  599. case B115200:
  600. b = 115200;
  601. break;
  602. case B230400:
  603. b = 230400;
  604. break;
  605. case B460800:
  606. b = 460800;
  607. break;
  608. case B500000:
  609. b = 500000;
  610. break;
  611. case B576000:
  612. b = 576000;
  613. break;
  614. case B921600:
  615. b = 921600;
  616. break;
  617. case B1000000:
  618. b = 1000000;
  619. break;
  620. case B1152000:
  621. b = 1152000;
  622. break;
  623. case B1500000:
  624. b = 1500000;
  625. break;
  626. case B2000000:
  627. b = 2000000;
  628. break;
  629. case B2500000:
  630. b = 2500000;
  631. break;
  632. case B3000000:
  633. b = 3000000;
  634. break;
  635. case B3500000:
  636. b = 3500000;
  637. break;
  638. case B4000000:
  639. b = 4000000;
  640. break;
  641. default:
  642. errno = EINVAL;
  643. return -1;
  644. }
  645. }
  646. if (uart_set_baudrate(fd, b) != ESP_OK) {
  647. errno = EINVAL;
  648. return -1;
  649. }
  650. }
  651. }
  652. return 0;
  653. }
  654. static int uart_tcgetattr(int fd, struct termios *p)
  655. {
  656. if (fd < 0 || fd >= UART_NUM) {
  657. errno = EBADF;
  658. return -1;
  659. }
  660. if (p == NULL) {
  661. errno = EINVAL;
  662. return -1;
  663. }
  664. memset(p, 0, sizeof(struct termios));
  665. if (s_ctx[fd]->rx_mode == ESP_LINE_ENDINGS_CRLF) {
  666. p->c_iflag |= IGNCR;
  667. } else if (s_ctx[fd]->rx_mode == ESP_LINE_ENDINGS_CR) {
  668. p->c_iflag |= ICRNL;
  669. }
  670. {
  671. uart_word_length_t data_bits;
  672. if (uart_get_word_length(fd, &data_bits) != ESP_OK) {
  673. errno = EINVAL;
  674. return -1;
  675. }
  676. p->c_cflag &= (~CSIZE);
  677. switch (data_bits) {
  678. case UART_DATA_5_BITS:
  679. p->c_cflag |= CS5;
  680. break;
  681. case UART_DATA_6_BITS:
  682. p->c_cflag |= CS6;
  683. break;
  684. case UART_DATA_7_BITS:
  685. p->c_cflag |= CS7;
  686. break;
  687. case UART_DATA_8_BITS:
  688. p->c_cflag |= CS8;
  689. break;
  690. default:
  691. errno = ENOSYS;
  692. return -1;
  693. }
  694. }
  695. {
  696. uart_stop_bits_t stop_bits;
  697. if (uart_get_stop_bits(fd, &stop_bits) != ESP_OK) {
  698. errno = EINVAL;
  699. return -1;
  700. }
  701. switch (stop_bits) {
  702. case UART_STOP_BITS_1:
  703. // nothing to do
  704. break;
  705. case UART_STOP_BITS_2:
  706. p->c_cflag |= CSTOPB;
  707. break;
  708. default:
  709. // UART_STOP_BITS_1_5 is unsupported by termios
  710. errno = ENOSYS;
  711. return -1;
  712. }
  713. }
  714. {
  715. uart_parity_t parity_mode;
  716. if (uart_get_parity(fd, &parity_mode) != ESP_OK) {
  717. errno = EINVAL;
  718. return -1;
  719. }
  720. switch (parity_mode) {
  721. case UART_PARITY_EVEN:
  722. p->c_cflag |= PARENB;
  723. break;
  724. case UART_PARITY_ODD:
  725. p->c_cflag |= (PARENB | PARODD);
  726. break;
  727. case UART_PARITY_DISABLE:
  728. // nothing to do
  729. break;
  730. default:
  731. errno = ENOSYS;
  732. return -1;
  733. }
  734. }
  735. {
  736. uint32_t baudrate;
  737. if (uart_get_baudrate(fd, &baudrate) != ESP_OK) {
  738. errno = EINVAL;
  739. return -1;
  740. }
  741. p->c_cflag |= (CBAUD | CBAUDEX);
  742. speed_t sp;
  743. switch (baudrate) {
  744. case 0:
  745. sp = B0;
  746. break;
  747. case 50:
  748. sp = B50;
  749. break;
  750. case 75:
  751. sp = B75;
  752. break;
  753. case 110:
  754. sp = B110;
  755. break;
  756. case 134:
  757. sp = B134;
  758. break;
  759. case 150:
  760. sp = B150;
  761. break;
  762. case 200:
  763. sp = B200;
  764. break;
  765. case 300:
  766. sp = B300;
  767. break;
  768. case 600:
  769. sp = B600;
  770. break;
  771. case 1200:
  772. sp = B1200;
  773. break;
  774. case 1800:
  775. sp = B1800;
  776. break;
  777. case 2400:
  778. sp = B2400;
  779. break;
  780. case 4800:
  781. sp = B4800;
  782. break;
  783. case 9600:
  784. sp = B9600;
  785. break;
  786. case 19200:
  787. sp = B19200;
  788. break;
  789. case 38400:
  790. sp = B38400;
  791. break;
  792. case 57600:
  793. sp = B57600;
  794. break;
  795. case 115200:
  796. sp = B115200;
  797. break;
  798. case 230400:
  799. sp = B230400;
  800. break;
  801. case 460800:
  802. sp = B460800;
  803. break;
  804. case 500000:
  805. sp = B500000;
  806. break;
  807. case 576000:
  808. sp = B576000;
  809. break;
  810. case 921600:
  811. sp = B921600;
  812. break;
  813. case 1000000:
  814. sp = B1000000;
  815. break;
  816. case 1152000:
  817. sp = B1152000;
  818. break;
  819. case 1500000:
  820. sp = B1500000;
  821. break;
  822. case 2000000:
  823. sp = B2000000;
  824. break;
  825. case 2500000:
  826. sp = B2500000;
  827. break;
  828. case 3000000:
  829. sp = B3000000;
  830. break;
  831. case 3500000:
  832. sp = B3500000;
  833. break;
  834. case 4000000:
  835. sp = B4000000;
  836. break;
  837. default:
  838. p->c_cflag |= BOTHER;
  839. sp = baudrate;
  840. break;
  841. }
  842. p->c_ispeed = p->c_ospeed = sp;
  843. }
  844. return 0;
  845. }
  846. static int uart_tcdrain(int fd)
  847. {
  848. if (fd < 0 || fd >= UART_NUM) {
  849. errno = EBADF;
  850. return -1;
  851. }
  852. if (uart_wait_tx_done(fd, portMAX_DELAY) != ESP_OK) {
  853. errno = EINVAL;
  854. return -1;
  855. }
  856. return 0;
  857. }
  858. static int uart_tcflush(int fd, int select)
  859. {
  860. if (fd < 0 || fd >= UART_NUM) {
  861. errno = EBADF;
  862. return -1;
  863. }
  864. if (select == TCIFLUSH) {
  865. if (uart_flush_input(fd) != ESP_OK) {
  866. errno = EINVAL;
  867. return -1;
  868. }
  869. } else {
  870. // output flushing is not supported
  871. errno = EINVAL;
  872. return -1;
  873. }
  874. return 0;
  875. }
  876. #endif // CONFIG_VFS_SUPPORT_TERMIOS
  877. void esp_vfs_dev_uart_register(void)
  878. {
  879. esp_vfs_t vfs = {
  880. .flags = ESP_VFS_FLAG_DEFAULT,
  881. .write = &uart_write,
  882. .open = &uart_open,
  883. .fstat = &uart_fstat,
  884. .close = &uart_close,
  885. .read = &uart_read,
  886. .fcntl = &uart_fcntl,
  887. .fsync = &uart_fsync,
  888. #ifdef CONFIG_VFS_SUPPORT_DIR
  889. .access = &uart_access,
  890. #endif // CONFIG_VFS_SUPPORT_DIR
  891. #ifdef CONFIG_VFS_SUPPORT_SELECT
  892. .start_select = &uart_start_select,
  893. .end_select = &uart_end_select,
  894. #endif // CONFIG_VFS_SUPPORT_SELECT
  895. #ifdef CONFIG_VFS_SUPPORT_TERMIOS
  896. .tcsetattr = &uart_tcsetattr,
  897. .tcgetattr = &uart_tcgetattr,
  898. .tcdrain = &uart_tcdrain,
  899. .tcflush = &uart_tcflush,
  900. #endif // CONFIG_VFS_SUPPORT_TERMIOS
  901. };
  902. ESP_ERROR_CHECK(esp_vfs_register("/dev/uart", &vfs, NULL));
  903. }
  904. int esp_vfs_dev_uart_port_set_rx_line_endings(int uart_num, esp_line_endings_t mode)
  905. {
  906. if (uart_num < 0 || uart_num >= UART_NUM) {
  907. errno = EBADF;
  908. return -1;
  909. }
  910. s_ctx[uart_num]->rx_mode = mode;
  911. return 0;
  912. }
  913. int esp_vfs_dev_uart_port_set_tx_line_endings(int uart_num, esp_line_endings_t mode)
  914. {
  915. if (uart_num < 0 || uart_num >= UART_NUM) {
  916. errno = EBADF;
  917. return -1;
  918. }
  919. s_ctx[uart_num]->tx_mode = mode;
  920. return 0;
  921. }
  922. void esp_vfs_dev_uart_set_rx_line_endings(esp_line_endings_t mode)
  923. {
  924. for (int i = 0; i < UART_NUM; ++i) {
  925. s_ctx[i]->rx_mode = mode;
  926. }
  927. }
  928. void esp_vfs_dev_uart_set_tx_line_endings(esp_line_endings_t mode)
  929. {
  930. for (int i = 0; i < UART_NUM; ++i) {
  931. s_ctx[i]->tx_mode = mode;
  932. }
  933. }
  934. void esp_vfs_dev_uart_use_nonblocking(int uart_num)
  935. {
  936. _lock_acquire_recursive(&s_ctx[uart_num]->read_lock);
  937. _lock_acquire_recursive(&s_ctx[uart_num]->write_lock);
  938. s_ctx[uart_num]->tx_func = uart_tx_char;
  939. s_ctx[uart_num]->rx_func = uart_rx_char;
  940. _lock_release_recursive(&s_ctx[uart_num]->write_lock);
  941. _lock_release_recursive(&s_ctx[uart_num]->read_lock);
  942. }
  943. void esp_vfs_dev_uart_use_driver(int uart_num)
  944. {
  945. _lock_acquire_recursive(&s_ctx[uart_num]->read_lock);
  946. _lock_acquire_recursive(&s_ctx[uart_num]->write_lock);
  947. s_ctx[uart_num]->tx_func = uart_tx_char_via_driver;
  948. s_ctx[uart_num]->rx_func = uart_rx_char_via_driver;
  949. _lock_release_recursive(&s_ctx[uart_num]->write_lock);
  950. _lock_release_recursive(&s_ctx[uart_num]->read_lock);
  951. }