Kconfig 25 KB

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  1. menu "ESP32-specific"
  2. choice ESP32_DEFAULT_CPU_FREQ_MHZ
  3. prompt "CPU frequency"
  4. default ESP32_DEFAULT_CPU_FREQ_160
  5. help
  6. CPU frequency to be set on application startup.
  7. config ESP32_DEFAULT_CPU_FREQ_80
  8. bool "80 MHz"
  9. config ESP32_DEFAULT_CPU_FREQ_160
  10. bool "160 MHz"
  11. config ESP32_DEFAULT_CPU_FREQ_240
  12. bool "240 MHz"
  13. endchoice
  14. config ESP32_DEFAULT_CPU_FREQ_MHZ
  15. int
  16. default 80 if ESP32_DEFAULT_CPU_FREQ_80
  17. default 160 if ESP32_DEFAULT_CPU_FREQ_160
  18. default 240 if ESP32_DEFAULT_CPU_FREQ_240
  19. config MEMMAP_SMP
  20. bool "Reserve memory for two cores"
  21. default "y"
  22. help
  23. The ESP32 contains two cores. If you plan to only use one, you can disable this item
  24. to save some memory. (ToDo: Make this automatically depend on unicore support)
  25. config MEMMAP_TRACEMEM
  26. bool
  27. default "n"
  28. config MEMMAP_TRACEMEM_TWOBANKS
  29. bool
  30. default "n"
  31. config ESP32_TRAX
  32. bool "Use TRAX tracing feature"
  33. default "n"
  34. select MEMMAP_TRACEMEM
  35. help
  36. The ESP32 contains a feature which allows you to trace the execution path the processor
  37. has taken through the program. This is stored in a chunk of 32K (16K for single-processor)
  38. of memory that can't be used for general purposes anymore. Disable this if you do not know
  39. what this is.
  40. config ESP32_TRAX_TWOBANKS
  41. bool "Reserve memory for tracing both pro as well as app cpu execution"
  42. default "n"
  43. depends on ESP32_TRAX && MEMMAP_SMP
  44. select MEMMAP_TRACEMEM_TWOBANKS
  45. help
  46. The ESP32 contains a feature which allows you to trace the execution path the processor
  47. has taken through the program. This is stored in a chunk of 32K (16K for single-processor)
  48. of memory that can't be used for general purposes anymore. Disable this if you do not know
  49. what this is.
  50. # Memory to reverse for trace, used in linker script
  51. config TRACEMEM_RESERVE_DRAM
  52. hex
  53. default 0x8000 if MEMMAP_TRACEMEM && MEMMAP_TRACEMEM_TWOBANKS
  54. default 0x4000 if MEMMAP_TRACEMEM && !MEMMAP_TRACEMEM_TWOBANKS
  55. default 0x0
  56. choice ESP32_COREDUMP_TO_FLASH_OR_UART
  57. prompt "Core dump destination"
  58. default ESP32_ENABLE_COREDUMP_TO_NONE
  59. help
  60. Select place to store core dump: flash, uart or none (to disable core dumps generation).
  61. If core dump is configured to be stored in flash and custom partition table is used add
  62. corresponding entry to your CSV. For examples, please see predefined partition table CSV descriptions
  63. in the components/partition_table directory.
  64. config ESP32_ENABLE_COREDUMP_TO_FLASH
  65. bool "Flash"
  66. select ESP32_ENABLE_COREDUMP
  67. config ESP32_ENABLE_COREDUMP_TO_UART
  68. bool "UART"
  69. select ESP32_ENABLE_COREDUMP
  70. config ESP32_ENABLE_COREDUMP_TO_NONE
  71. bool "None"
  72. endchoice
  73. config ESP32_ENABLE_COREDUMP
  74. bool
  75. default F
  76. help
  77. Enables/disable core dump module.
  78. config ESP32_CORE_DUMP_UART_DELAY
  79. int "Core dump print to UART delay"
  80. depends on ESP32_ENABLE_COREDUMP_TO_UART
  81. default 0
  82. help
  83. Config delay (in ms) before printing core dump to UART.
  84. Delay can be interrupted by pressing Enter key.
  85. config ESP32_CORE_DUMP_LOG_LEVEL
  86. int "Core dump module logging level"
  87. depends on ESP32_ENABLE_COREDUMP
  88. default 1
  89. help
  90. Config core dump module logging level (0-5).
  91. choice ESP32_APPTRACE_DESTINATION
  92. prompt "AppTrace: destination"
  93. default ESP32_APPTRACE_DEST_NONE
  94. help
  95. Select destination for application trace: trace memory, uart or none (to disable).
  96. config ESP32_APPTRACE_DEST_TRAX
  97. bool "Trace memory"
  98. select ESP32_APPTRACE_ENABLE
  99. config ESP32_APPTRACE_DEST_UART
  100. bool "UART"
  101. select ESP32_APPTRACE_ENABLE
  102. config ESP32_APPTRACE_DEST_NONE
  103. bool "None"
  104. endchoice
  105. config ESP32_APPTRACE_ENABLE
  106. bool
  107. depends on !ESP32_TRAX
  108. select MEMMAP_TRACEMEM
  109. select MEMMAP_TRACEMEM_TWOBANKS
  110. default F
  111. help
  112. Enables/disable application tracing module.
  113. config ESP32_APPTRACE_ONPANIC_HOST_FLUSH_TMO
  114. int "AppTrace: Timeout for flushing last trace data to host on panic"
  115. depends on ESP32_APPTRACE_ENABLE
  116. default 4294967295
  117. help
  118. Timeout for flushing last trace data to host in case of panic. In us.
  119. config ESP32_APPTRACE_ONPANIC_HOST_FLUSH_TRAX_THRESH
  120. int "AppTrace: Threshold for flushing last trace data to host on panic"
  121. depends on ESP32_APPTRACE_DEST_TRAX
  122. default 50
  123. help
  124. Threshold for flushing last trace data to host on panic. In percents of TRAX memory block length.
  125. # Not implemented and/or needs new silicon rev to work
  126. config MEMMAP_SPISRAM
  127. bool "Use external SPI SRAM chip as main memory"
  128. depends on ESP32_NEEDS_NEW_SILICON_REV
  129. default "n"
  130. help
  131. The ESP32 can control an external SPI SRAM chip, adding the memory it contains to the
  132. main memory map. Enable this if you have this hardware and want to use it in the same
  133. way as on-chip RAM.
  134. choice NUMBER_OF_MAC_ADDRESS_GENERATED_FROM_EFUSE
  135. bool "Number of MAC address generated from the hardware MAC address in efuse"
  136. default FOUR_MAC_ADDRESS_FROM_EFUSE
  137. help
  138. Config the number of MAC address which is generated from the hardware MAC address in efuse.
  139. If the number is two, the MAC addresses of WiFi station and bluetooth are generated from
  140. the hardware MAC address in efuse. The MAC addresses of WiFi softap and ethernet are derived
  141. from that of WiFi station and bluetooth respectively.
  142. If the number is four, the MAC addresses of WiFi station, WiFi softap, bluetooth and ethernet
  143. are all generated from the hardware MAC address in efuse.
  144. config TWO_MAC_ADDRESS_FROM_EFUSE
  145. bool "Two"
  146. config FOUR_MAC_ADDRESS_FROM_EFUSE
  147. bool "Four"
  148. endchoice
  149. config NUMBER_OF_MAC_ADDRESS_GENERATED_FROM_EFUSE
  150. int
  151. default 2 if TWO_MAC_ADDRESS_FROM_EFUSE
  152. default 4 if FOUR_MAC_ADDRESS_FROM_EFUSE
  153. config SYSTEM_EVENT_QUEUE_SIZE
  154. int "System event queue size"
  155. default 32
  156. help
  157. Config system event queue size in different application.
  158. config SYSTEM_EVENT_TASK_STACK_SIZE
  159. int "Event loop task stack size"
  160. default 4096
  161. help
  162. Config system event task stack size in different application.
  163. config MAIN_TASK_STACK_SIZE
  164. int "Main task stack size"
  165. default 4096
  166. help
  167. Config system event task stack size in different application.
  168. config NEWLIB_STDOUT_ADDCR
  169. bool "Standard-out output adds carriage return before newline"
  170. default y
  171. help
  172. Most people are used to end their printf strings with a newline. If this
  173. is sent as is to the serial port, most terminal programs will only move the
  174. cursor one line down, not also move it to the beginning of the line. This
  175. is usually done by an added CR character. Enabling this will make the
  176. standard output code automatically add a CR character before a LF.
  177. With this option enabled, C standard library functions which read from UART
  178. (like scanf) will convert "\r\n" character sequences back to "\n".
  179. This option doesn't affect behavior of the UART driver (drivers/uart.h).
  180. config NEWLIB_NANO_FORMAT
  181. bool "Enable 'nano' formatting options for printf/scanf family"
  182. default n
  183. help
  184. ESP32 ROM contains parts of newlib C library, including printf/scanf family
  185. of functions. These functions have been compiled with so-called "nano"
  186. formatting option. This option doesn't support 64-bit integer formats and C99
  187. features, such as positional arguments.
  188. For more details about "nano" formatting option, please see newlib readme file,
  189. search for '--enable-newlib-nano-formatted-io':
  190. https://sourceware.org/newlib/README
  191. If this option is enabled, build system will use functions available in
  192. ROM, reducing the application binary size. Functions available in ROM run
  193. faster than functions which run from flash. Functions available in ROM can
  194. also run when flash instruction cache is disabled.
  195. If you need 64-bit integer formatting support or C99 features, keep this
  196. option disabled.
  197. choice CONSOLE_UART
  198. prompt "UART for console output"
  199. default CONSOLE_UART_DEFAULT
  200. help
  201. Select whether to use UART for console output (through stdout and stderr).
  202. - Default is to use UART0 on pins GPIO1(TX) and GPIO3(RX).
  203. - If "Custom" is selected, UART0 or UART1 can be chosen,
  204. and any pins can be selected.
  205. - If "None" is selected, there will be no console output on any UART, except
  206. for initial output from ROM bootloader. This output can be further suppressed by
  207. bootstrapping GPIO13 pin to low logic level.
  208. config CONSOLE_UART_DEFAULT
  209. bool "Default: UART0, TX=GPIO1, RX=GPIO3"
  210. config CONSOLE_UART_CUSTOM
  211. bool "Custom"
  212. config CONSOLE_UART_NONE
  213. bool "None"
  214. endchoice
  215. choice CONSOLE_UART_NUM
  216. prompt "UART peripheral to use for console output (0-1)"
  217. depends on CONSOLE_UART_CUSTOM
  218. default CONSOLE_UART_CUSTOM_NUM_0
  219. help
  220. Due of a ROM bug, UART2 is not supported for console output
  221. via ets_printf.
  222. config CONSOLE_UART_CUSTOM_NUM_0
  223. bool "UART0"
  224. config CONSOLE_UART_CUSTOM_NUM_1
  225. bool "UART1"
  226. endchoice
  227. config CONSOLE_UART_NUM
  228. int
  229. default 0 if CONSOLE_UART_DEFAULT || CONSOLE_UART_NONE
  230. default 0 if CONSOLE_UART_CUSTOM_NUM_0
  231. default 1 if CONSOLE_UART_CUSTOM_NUM_1
  232. config CONSOLE_UART_TX_GPIO
  233. int "UART TX on GPIO#"
  234. depends on CONSOLE_UART_CUSTOM
  235. range 0 33
  236. default 19
  237. config CONSOLE_UART_RX_GPIO
  238. int "UART RX on GPIO#"
  239. depends on CONSOLE_UART_CUSTOM
  240. range 0 39
  241. default 21
  242. config CONSOLE_UART_BAUDRATE
  243. int "UART console baud rate"
  244. depends on !CONSOLE_UART_NONE
  245. default 115200
  246. range 1200 4000000
  247. config ULP_COPROC_ENABLED
  248. bool "Enable Ultra Low Power (ULP) Coprocessor"
  249. default "n"
  250. help
  251. Set to 'y' if you plan to load a firmware for the coprocessor.
  252. If this option is enabled, further coprocessor configuration will appear in the Components menu.
  253. config ULP_COPROC_RESERVE_MEM
  254. int "RTC slow memory reserved for coprocessor"
  255. default 512
  256. range 32 8192
  257. depends on ULP_COPROC_ENABLED
  258. help
  259. Bytes of memory to reserve for ULP coprocessor firmware & data.
  260. Data is reserved at the beginning of RTC slow memory.
  261. # Set CONFIG_ULP_COPROC_RESERVE_MEM to 0 if ULP is disabled
  262. config ULP_COPROC_RESERVE_MEM
  263. int
  264. default 0
  265. depends on !ULP_COPROC_ENABLED
  266. choice ESP32_PANIC
  267. prompt "Panic handler behaviour"
  268. default ESP32_PANIC_PRINT_REBOOT
  269. help
  270. If FreeRTOS detects unexpected behaviour or an unhandled exception, the panic handler is
  271. invoked. Configure the panic handlers action here.
  272. config ESP32_PANIC_PRINT_HALT
  273. bool "Print registers and halt"
  274. help
  275. Outputs the relevant registers over the serial port and halt the
  276. processor. Needs a manual reset to restart.
  277. config ESP32_PANIC_PRINT_REBOOT
  278. bool "Print registers and reboot"
  279. help
  280. Outputs the relevant registers over the serial port and immediately
  281. reset the processor.
  282. config ESP32_PANIC_SILENT_REBOOT
  283. bool "Silent reboot"
  284. help
  285. Just resets the processor without outputting anything
  286. config ESP32_PANIC_GDBSTUB
  287. bool "Invoke GDBStub"
  288. help
  289. Invoke gdbstub on the serial port, allowing for gdb to attach to it to do a postmortem
  290. of the crash.
  291. endchoice
  292. config ESP32_DEBUG_OCDAWARE
  293. bool "Make exception and panic handlers JTAG/OCD aware"
  294. default y
  295. help
  296. The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and
  297. instead of panicking, have the debugger stop on the offending instruction.
  298. config INT_WDT
  299. bool "Interrupt watchdog"
  300. default y
  301. help
  302. This watchdog timer can detect if the FreeRTOS tick interrupt has not been called for a certain time,
  303. either because a task turned off interrupts and did not turn them on for a long time, or because an
  304. interrupt handler did not return. It will try to invoke the panic handler first and failing that
  305. reset the SoC.
  306. config INT_WDT_TIMEOUT_MS
  307. int "Interrupt watchdog timeout (ms)"
  308. depends on INT_WDT
  309. default 300
  310. range 10 10000
  311. help
  312. The timeout of the watchdog, in miliseconds. Make this higher than the FreeRTOS tick rate.
  313. config INT_WDT_CHECK_CPU1
  314. bool "Also watch CPU1 tick interrupt"
  315. depends on INT_WDT && !FREERTOS_UNICORE
  316. default y
  317. help
  318. Also detect if interrupts on CPU 1 are disabled for too long.
  319. config TASK_WDT
  320. bool "Task watchdog"
  321. default y
  322. help
  323. This watchdog timer can be used to make sure individual tasks are still running.
  324. config TASK_WDT_PANIC
  325. bool "Invoke panic handler when Task Watchdog is triggered"
  326. depends on TASK_WDT
  327. default n
  328. help
  329. Normally, the Task Watchdog will only print out a warning if it detects it has not
  330. been fed. If this is enabled, it will invoke the panic handler instead, which
  331. can then halt or reboot the chip.
  332. config TASK_WDT_TIMEOUT_S
  333. int "Task watchdog timeout (seconds)"
  334. depends on TASK_WDT
  335. range 1 60
  336. default 5
  337. help
  338. Timeout for the task WDT, in seconds.
  339. config TASK_WDT_CHECK_IDLE_TASK
  340. bool "Task watchdog watches CPU0 idle task"
  341. depends on TASK_WDT
  342. default y
  343. help
  344. With this turned on, the task WDT can detect if the idle task is not called within the task
  345. watchdog timeout period. The idle task not being called usually is a symptom of another
  346. task hoarding the CPU. It is also a bad thing because FreeRTOS household tasks depend on the
  347. idle task getting some runtime every now and then. Take Care: With this disabled, this
  348. watchdog will trigger if no tasks register themselves within the timeout value.
  349. config TASK_WDT_CHECK_IDLE_TASK_CPU1
  350. bool "Task watchdog also watches CPU1 idle task"
  351. depends on TASK_WDT_CHECK_IDLE_TASK && !FREERTOS_UNICORE
  352. default y
  353. help
  354. Also check the idle task that runs on CPU1.
  355. #The brownout detector code is disabled (by making it depend on a nonexisting symbol) because the current revision of ESP32
  356. #silicon has a bug in the brown-out detector, rendering it unusable for resetting the CPU.
  357. config BROWNOUT_DET
  358. bool "Hardware brownout detect & reset"
  359. default y
  360. depends on NEEDS_ESP32_NEW_SILICON_REV
  361. help
  362. The ESP32 has a built-in brownout detector which can detect if the voltage is lower than
  363. a specific value. If this happens, it will reset the chip in order to prevent unintended
  364. behaviour.
  365. choice BROWNOUT_DET_LVL_SEL
  366. prompt "Brownout voltage level"
  367. depends on BROWNOUT_DET
  368. default BROWNOUT_DET_LVL_SEL_25
  369. help
  370. The brownout detector will reset the chip when the supply voltage is below this level.
  371. #The voltage levels here are estimates, more work needs to be done to figure out the exact voltages
  372. #of the brownout threshold levels.
  373. config BROWNOUT_DET_LVL_SEL_0
  374. bool "2.1V"
  375. config BROWNOUT_DET_LVL_SEL_1
  376. bool "2.2V"
  377. config BROWNOUT_DET_LVL_SEL_2
  378. bool "2.3V"
  379. config BROWNOUT_DET_LVL_SEL_3
  380. bool "2.4V"
  381. config BROWNOUT_DET_LVL_SEL_4
  382. bool "2.5V"
  383. config BROWNOUT_DET_LVL_SEL_5
  384. bool "2.6V"
  385. config BROWNOUT_DET_LVL_SEL_6
  386. bool "2.7V"
  387. config BROWNOUT_DET_LVL_SEL_7
  388. bool "2.8V"
  389. endchoice
  390. config BROWNOUT_DET_LVL
  391. int
  392. default 0 if BROWNOUT_DET_LVL_SEL_0
  393. default 1 if BROWNOUT_DET_LVL_SEL_1
  394. default 2 if BROWNOUT_DET_LVL_SEL_2
  395. default 3 if BROWNOUT_DET_LVL_SEL_3
  396. default 4 if BROWNOUT_DET_LVL_SEL_4
  397. default 5 if BROWNOUT_DET_LVL_SEL_5
  398. default 6 if BROWNOUT_DET_LVL_SEL_6
  399. default 7 if BROWNOUT_DET_LVL_SEL_7
  400. config BROWNOUT_DET_RESETDELAY
  401. int "Brownout reset delay (in uS)"
  402. depends on BROWNOUT_DET
  403. range 0 6820
  404. default 1000
  405. help
  406. The brownout detector can reset the chip after a certain delay, in order to make sure e.g. a voltage dip has entirely passed
  407. before trying to restart the chip. You can set the delay here.
  408. choice ESP32_TIME_SYSCALL
  409. prompt "Timers used for gettimeofday function"
  410. default ESP32_TIME_SYSCALL_USE_RTC_FRC1
  411. help
  412. This setting defines which hardware timers are used to
  413. implement 'gettimeofday' and 'time' functions in C library.
  414. - If only FRC1 timer is used, gettimeofday will provide time at
  415. microsecond resolution. Time will not be preserved when going
  416. into deep sleep mode.
  417. - If both FRC1 and RTC timers are used, timekeeping will
  418. continue in deep sleep. Time will be reported at 1 microsecond
  419. resolution.
  420. - If only RTC timer is used, timekeeping will continue in
  421. deep sleep, but time will be measured at 6.(6) microsecond
  422. resolution. Also the gettimeofday function itself may take
  423. longer to run.
  424. - If no timers are used, gettimeofday and time functions
  425. return -1 and set errno to ENOSYS.
  426. - When RTC is used for timekeeping, two RTC_STORE registers are
  427. used to keep time in deep sleep mode.
  428. config ESP32_TIME_SYSCALL_USE_RTC
  429. bool "RTC"
  430. config ESP32_TIME_SYSCALL_USE_RTC_FRC1
  431. bool "RTC and FRC1"
  432. config ESP32_TIME_SYSCALL_USE_FRC1
  433. bool "FRC1"
  434. config ESP32_TIME_SYSCALL_USE_NONE
  435. bool "None"
  436. endchoice
  437. choice ESP32_RTC_CLOCK_SOURCE
  438. prompt "RTC clock source"
  439. default ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC
  440. help
  441. Choose which clock is used as RTC clock source.
  442. config ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC
  443. bool "Internal 150kHz RC oscillator"
  444. config ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL
  445. bool "External 32kHz crystal"
  446. endchoice
  447. config ESP32_DEEP_SLEEP_WAKEUP_DELAY
  448. int "Extra delay in deep sleep wake stub (in us)"
  449. default 0
  450. range 0 5000
  451. help
  452. When ESP32 exits deep sleep, the CPU and the flash chip are powered on
  453. at the same time. CPU will run deep sleep stub first, and then
  454. proceed to load code from flash. Some flash chips need sufficient
  455. time to pass between power on and first read operation. By default,
  456. without any extra delay, this time is approximately 900us.
  457. If you are using a flash chip which needs more than 900us to become
  458. ready after power on, set this parameter to add extra delay
  459. to the default deep sleep stub.
  460. If you are seeing "flash read err, 1000" message printed to the
  461. console after deep sleep reset, try increasing this value.
  462. endmenu
  463. menuconfig WIFI_ENABLED
  464. bool "WiFi"
  465. default y
  466. help
  467. Select this option to enable WiFi stack and show the submenu with WiFi configuration choices.
  468. config SW_COEXIST_ENABLE
  469. bool "Software controls WiFi/Bluetooth coexistence"
  470. depends on WIFI_ENABLED && BT_ENABLED
  471. default n
  472. help
  473. If enabled, WiFi & Bluetooth coexistence is controlled by software rather than hardware.
  474. Recommended for heavy traffic scenarios. Both coexistence configuration options are
  475. automatically managed, no user intervention is required.
  476. config ESP32_WIFI_STATIC_RX_BUFFER_NUM
  477. int "Max number of WiFi static RX buffers"
  478. depends on WIFI_ENABLED
  479. range 2 25
  480. default 10
  481. help
  482. Set the number of WiFi static rx buffers. Each buffer takes approximately 1.6KB of RAM.
  483. The static rx buffers are allocated when esp_wifi_init is called, they are not freed
  484. until esp_wifi_deinit is called.
  485. WiFi hardware use these buffers to receive packets, generally larger number for higher
  486. throughput but more memory, smaller number for lower throughput but less memory.
  487. config ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM
  488. int "Max number of WiFi dynamic RX buffers"
  489. depends on WIFI_ENABLED
  490. range 0 64
  491. default 0
  492. help
  493. Set the number of WiFi dynamic rx buffers, 0 means no limitation for dynamic rx buffer
  494. allocation. The size of dynamic rx buffers is not fixed.
  495. For each received packet in static rx buffers, WiFi driver makes a copy
  496. to dynamic rx buffers and then deliver it to high layer stack. The dynamic rx buffer
  497. is freed when the application, such as socket, successfully received the packet.
  498. For some applications, the WiFi driver receiving speed is faster than application
  499. consuming speed, we may run out of memory if no limitation for the dynamic rx buffer
  500. number. Generally the number of dynamic rx buffer should be no less than static
  501. rx buffer number if it is not 0.
  502. choice ESP32_WIFI_TX_BUFFER
  503. prompt "Type of WiFi TX buffers"
  504. depends on WIFI_ENABLED
  505. default ESP32_WIFI_DYNAMIC_TX_BUFFER
  506. help
  507. Select type of WiFi tx buffers and show the submenu with the number of WiFi tx buffers choice.
  508. If "STATIC" is selected, WiFi tx buffers are allocated when WiFi is initialized and released
  509. when WiFi is de-initialized. If "DYNAMIC" is selected, WiFi tx buffer is allocated when tx
  510. data is delivered from LWIP to WiFi and released when tx data is sent out by WiFi.
  511. The size of each static tx buffers is fixed to about 1.6KB and the size of dynamic tx buffers is
  512. depend on the length of the data delivered from LWIP.
  513. If PSRAM is enabled, "STATIC" should be selected to guarantee enough WiFi tx buffers.
  514. If PSRAM is disabled, "DYNAMIC" should be selected to improve the utilization of RAM.
  515. config ESP32_WIFI_STATIC_TX_BUFFER
  516. bool "STATIC"
  517. config ESP32_WIFI_DYNAMIC_TX_BUFFER
  518. bool "DYNAMIC"
  519. endchoice
  520. config ESP32_WIFI_TX_BUFFER_TYPE
  521. int
  522. depends on WIFI_ENABLED
  523. default 0 if ESP32_WIFI_STATIC_TX_BUFFER
  524. default 1 if ESP32_WIFI_DYNAMIC_TX_BUFFER
  525. config ESP32_WIFI_STATIC_TX_BUFFER_NUM
  526. int "Max number of WiFi static TX buffers"
  527. depends on WIFI_ENABLED
  528. depends on ESP32_WIFI_STATIC_TX_BUFFER
  529. range 16 64
  530. default 32
  531. help
  532. Set the number of WiFi static tx buffers. Each buffer takes approximately 1.6KB of RAM.
  533. The static rx buffers are allocated when esp_wifi_init is called, they are not released
  534. until esp_wifi_deinit is called.
  535. For each tx packet from high layer stack, WiFi driver make a copy of it. For some applications,
  536. especially the UDP application, the high layer deliver speed is faster than the WiFi tx
  537. speed, we may run out of static tx buffers.
  538. config ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM
  539. int "Max number of WiFi dynamic TX buffers"
  540. depends on WIFI_ENABLED
  541. depends on ESP32_WIFI_DYNAMIC_TX_BUFFER
  542. range 16 64
  543. default 32
  544. help
  545. Set the number of WiFi dynamic tx buffers, 0 means no limitation for dynamic tx buffer
  546. allocation. The size of dynamic tx buffers is not fixed.
  547. For each tx packet from high layer stack, WiFi driver make a copy of it. For some applications,
  548. especially the UDP application, the high layer deliver speed is faster than the WiFi tx
  549. speed, we may run out of memory if no limitation for the dynamic tx buffer number.
  550. config ESP32_WIFI_AMPDU_ENABLED
  551. bool "WiFi AMPDU"
  552. depends on WIFI_ENABLED
  553. default y
  554. help
  555. Select this option to enable AMPDU feature
  556. config ESP32_WIFI_NVS_ENABLED
  557. bool "WiFi NVS flash"
  558. depends on WIFI_ENABLED
  559. default y
  560. help
  561. Select this option to enable WiFi NVS flash
  562. config PHY_ENABLED
  563. bool
  564. default y if WIFI_ENABLED || BT_ENABLED
  565. menu PHY
  566. visible if PHY_ENABLED
  567. config ESP32_PHY_CALIBRATION_AND_DATA_STORAGE
  568. bool "Do phy calibration and store calibration data in NVS"
  569. depends on PHY_ENABLED
  570. default y
  571. help
  572. If this option is enabled, NVS will be initialized and calibration data will be loaded from there.
  573. PHY calibration will be skipped on deep sleep wakeup. If calibration data is not found, full calibration
  574. will be performed and stored in NVS. In all other cases, only partial calibration will be performed.
  575. If unsure, choose 'y'.
  576. config ESP32_PHY_INIT_DATA_IN_PARTITION
  577. bool "Use a partition to store PHY init data"
  578. depends on PHY_ENABLED
  579. default n
  580. help
  581. If enabled, PHY init data will be loaded from a partition.
  582. When using a custom partition table, make sure that PHY data
  583. partition is included (type: 'data', subtype: 'phy').
  584. With default partition tables, this is done automatically.
  585. If PHY init data is stored in a partition, it has to be flashed there,
  586. otherwise runtime error will occur.
  587. If this option is not enabled, PHY init data will be embedded
  588. into the application binary.
  589. If unsure, choose 'n'.
  590. config ESP32_PHY_MAX_WIFI_TX_POWER
  591. int "Max WiFi TX power (dBm)"
  592. range 0 20
  593. default 20
  594. depends on PHY_ENABLED && WIFI_ENABLED
  595. help
  596. Set maximum transmit power for WiFi radio. Actual transmit power for high
  597. data rates may be lower than this setting.
  598. config ESP32_PHY_MAX_TX_POWER
  599. int
  600. depends on PHY_ENABLED
  601. default 20 if !WIFI_ENABLED
  602. default ESP32_PHY_MAX_WIFI_TX_POWER if WIFI_ENABLED
  603. endmenu