core_dump.c 16 KB

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  1. // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. // http://www.apache.org/licenses/LICENSE-2.0
  7. //
  8. // Unless required by applicable law or agreed to in writing, software
  9. // distributed under the License is distributed on an "AS IS" BASIS,
  10. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  11. // See the License for the specific language governing permissions and
  12. // limitations under the License.
  13. #include <string.h>
  14. #include "freertos/FreeRTOS.h"
  15. #include "freertos/task.h"
  16. #include "soc/uart_reg.h"
  17. #include "soc/io_mux_reg.h"
  18. #include "soc/timer_group_struct.h"
  19. #include "soc/timer_group_reg.h"
  20. #include "driver/gpio.h"
  21. #include "esp_panic.h"
  22. #include "esp_partition.h"
  23. #if CONFIG_ESP32_ENABLE_COREDUMP
  24. #define LOG_LOCAL_LEVEL CONFIG_ESP32_CORE_DUMP_LOG_LEVEL
  25. #include "esp_log.h"
  26. const static DRAM_ATTR char TAG[] = "esp_core_dump";
  27. #define ESP_COREDUMP_LOG( level, format, ... ) if (LOG_LOCAL_LEVEL >= level) { ets_printf(DRAM_STR(format), esp_log_early_timestamp(), (const char *)TAG, ##__VA_ARGS__); }
  28. #define ESP_COREDUMP_LOGE( format, ... ) ESP_COREDUMP_LOG(ESP_LOG_ERROR, LOG_FORMAT(E, format), ##__VA_ARGS__)
  29. #define ESP_COREDUMP_LOGW( format, ... ) ESP_COREDUMP_LOG(ESP_LOG_WARN, LOG_FORMAT(W, format), ##__VA_ARGS__)
  30. #define ESP_COREDUMP_LOGI( format, ... ) ESP_COREDUMP_LOG(ESP_LOG_INFO, LOG_FORMAT(I, format), ##__VA_ARGS__)
  31. #define ESP_COREDUMP_LOGD( format, ... ) ESP_COREDUMP_LOG(ESP_LOG_DEBUG, LOG_FORMAT(D, format), ##__VA_ARGS__)
  32. #define ESP_COREDUMP_LOGV( format, ... ) ESP_COREDUMP_LOG(ESP_LOG_VERBOSE, LOG_FORMAT(V, format), ##__VA_ARGS__)
  33. #if CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH
  34. #define ESP_COREDUMP_LOG_PROCESS( format, ... ) ESP_COREDUMP_LOGD(format, ##__VA_ARGS__)
  35. #else
  36. #define ESP_COREDUMP_LOG_PROCESS( format, ... ) do{/*(__VA_ARGS__);*/}while(0)
  37. #endif
  38. // TODO: allow user to set this in menuconfig or get tasks iteratively
  39. #define COREDUMP_MAX_TASKS_NUM 32
  40. typedef esp_err_t (*esp_core_dump_write_prepare_t)(void *priv, uint32_t *data_len);
  41. typedef esp_err_t (*esp_core_dump_write_start_t)(void *priv);
  42. typedef esp_err_t (*esp_core_dump_write_end_t)(void *priv);
  43. typedef esp_err_t (*esp_core_dump_flash_write_data_t)(void *priv, void * data, uint32_t data_len);
  44. typedef struct _core_dump_write_config_t
  45. {
  46. esp_core_dump_write_prepare_t prepare;
  47. esp_core_dump_write_start_t start;
  48. esp_core_dump_write_end_t end;
  49. esp_core_dump_flash_write_data_t write;
  50. void * priv;
  51. } core_dump_write_config_t;
  52. static void esp_core_dump_write(XtExcFrame *frame, core_dump_write_config_t *write_cfg)
  53. {
  54. union
  55. {
  56. uint8_t data8[12];
  57. uint32_t data32[3];
  58. } rom_data;
  59. esp_err_t err;
  60. TaskSnapshot_t tasks[COREDUMP_MAX_TASKS_NUM];
  61. UBaseType_t tcb_sz, task_num;
  62. uint32_t data_len = 0, i, len;
  63. task_num = uxTaskGetSnapshotAll(tasks, COREDUMP_MAX_TASKS_NUM, &tcb_sz);
  64. // take TCB padding into account, actual TCB size will be stored in header
  65. if (tcb_sz % sizeof(uint32_t))
  66. len = (tcb_sz / sizeof(uint32_t) + 1) * sizeof(uint32_t);
  67. else
  68. len = tcb_sz;
  69. // header + tasknum*(tcb + stack start/end + tcb addr)
  70. data_len = 3*sizeof(uint32_t) + task_num*(len + 2*sizeof(uint32_t) + sizeof(uint32_t *));
  71. for (i = 0; i < task_num; i++) {
  72. if (tasks[i].pxTCB == xTaskGetCurrentTaskHandleForCPU(xPortGetCoreID())) {
  73. // set correct stack top for current task
  74. tasks[i].pxTopOfStack = (StackType_t *)frame;
  75. ESP_COREDUMP_LOG_PROCESS("Current task EXIT/PC/PS/A0/SP %x %x %x %x %x", frame->exit, frame->pc, frame->ps, frame->a0, frame->a1);
  76. }
  77. else {
  78. XtSolFrame *task_frame = (XtSolFrame *)tasks[i].pxTopOfStack;
  79. if (task_frame->exit == 0) {
  80. ESP_COREDUMP_LOG_PROCESS("Task EXIT/PC/PS/A0/SP %x %x %x %x %x", task_frame->exit, task_frame->pc, task_frame->ps, task_frame->a0, task_frame->a1);
  81. }
  82. else {
  83. #if CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH
  84. XtExcFrame *task_frame2 = (XtExcFrame *)tasks[i].pxTopOfStack;
  85. #endif
  86. ESP_COREDUMP_LOG_PROCESS("Task EXIT/PC/PS/A0/SP %x %x %x %x %x", task_frame2->exit, task_frame2->pc, task_frame2->ps, task_frame2->a0, task_frame2->a1);
  87. }
  88. }
  89. #if( portSTACK_GROWTH < 0 )
  90. len = (uint32_t)tasks[i].pxEndOfStack - (uint32_t)tasks[i].pxTopOfStack;
  91. #else
  92. len = (uint32_t)tasks[i].pxTopOfStack - (uint32_t)tasks[i].pxEndOfStack;
  93. #endif
  94. ESP_COREDUMP_LOG_PROCESS("Stack len = %lu (%x %x)", len, tasks[i].pxTopOfStack, tasks[i].pxEndOfStack);
  95. // take stack padding into account
  96. if (len % sizeof(uint32_t))
  97. len = (len / sizeof(uint32_t) + 1) * sizeof(uint32_t);
  98. data_len += len;
  99. }
  100. // prepare write
  101. if (write_cfg->prepare) {
  102. err = write_cfg->prepare(write_cfg->priv, &data_len);
  103. if (err != ESP_OK) {
  104. ESP_COREDUMP_LOGE("Failed to prepare core dump (%d)!", err);
  105. return;
  106. }
  107. }
  108. ESP_COREDUMP_LOG_PROCESS("Core dump len = %lu", data_len);
  109. // write start
  110. if (write_cfg->start) {
  111. err = write_cfg->start(write_cfg->priv);
  112. if (err != ESP_OK) {
  113. ESP_COREDUMP_LOGE("Failed to start core dump (%d)!", err);
  114. return;
  115. }
  116. }
  117. // write header
  118. rom_data.data32[0] = data_len;
  119. rom_data.data32[1] = task_num;
  120. rom_data.data32[2] = tcb_sz;
  121. err = write_cfg->write(write_cfg->priv, &rom_data, 3*sizeof(uint32_t));
  122. if (err != ESP_OK) {
  123. ESP_COREDUMP_LOGE("Failed to write core dump header (%d)!", err);
  124. return;
  125. }
  126. // write tasks
  127. for (i = 0; i < task_num; i++) {
  128. ESP_COREDUMP_LOG_PROCESS("Dump task %x", tasks[i].pxTCB);
  129. // save TCB address, stack base and stack top addr
  130. rom_data.data32[0] = (uint32_t)tasks[i].pxTCB;
  131. rom_data.data32[1] = (uint32_t)tasks[i].pxTopOfStack;
  132. rom_data.data32[2] = (uint32_t)tasks[i].pxEndOfStack;
  133. err = write_cfg->write(write_cfg->priv, &rom_data, 3*sizeof(uint32_t));
  134. if (err != ESP_OK) {
  135. ESP_COREDUMP_LOGE("Failed to write task header (%d)!", err);
  136. return;
  137. }
  138. // save TCB
  139. err = write_cfg->write(write_cfg->priv, tasks[i].pxTCB, tcb_sz);
  140. if (err != ESP_OK) {
  141. ESP_COREDUMP_LOGE("Failed to write TCB (%d)!", err);
  142. return;
  143. }
  144. // save task stack
  145. err = write_cfg->write(write_cfg->priv,
  146. #if( portSTACK_GROWTH < 0 )
  147. tasks[i].pxTopOfStack,
  148. (uint32_t)tasks[i].pxEndOfStack - (uint32_t)tasks[i].pxTopOfStack
  149. #else
  150. tasks[i].pxEndOfStack,
  151. (uint32_t)tasks[i].pxTopOfStack - (uint32_t)tasks[i].pxEndOfStack
  152. #endif
  153. );
  154. if (err != ESP_OK) {
  155. ESP_COREDUMP_LOGE("Failed to write task stack (%d)!", err);
  156. return;
  157. }
  158. }
  159. // write end
  160. if (write_cfg->end) {
  161. err = write_cfg->end(write_cfg->priv);
  162. if (err != ESP_OK) {
  163. ESP_COREDUMP_LOGE("Failed to end core dump (%d)!", err);
  164. return;
  165. }
  166. }
  167. }
  168. #if CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH
  169. // magic numbers to control core dump data consistency
  170. #define COREDUMP_FLASH_MAGIC_START 0xE32C04EDUL
  171. #define COREDUMP_FLASH_MAGIC_END 0xE32C04EDUL
  172. typedef struct _core_dump_write_flash_data_t
  173. {
  174. uint32_t off;
  175. } core_dump_write_flash_data_t;
  176. // core dump partition start
  177. static uint32_t s_core_part_start;
  178. // core dump partition size
  179. static uint32_t s_core_part_size;
  180. static uint32_t esp_core_dump_write_flash_padded(size_t off, uint8_t *data, uint32_t data_size)
  181. {
  182. esp_err_t err;
  183. uint32_t data_len = 0, k, len;
  184. union
  185. {
  186. uint8_t data8[4];
  187. uint32_t data32;
  188. } rom_data;
  189. data_len = (data_size / sizeof(uint32_t)) * sizeof(uint32_t);
  190. err = spi_flash_write(off, data, data_len);
  191. if (err != ESP_OK) {
  192. ESP_COREDUMP_LOGE("Failed to write data to flash (%d)!", err);
  193. return 0;
  194. }
  195. len = data_size % sizeof(uint32_t);
  196. if (len) {
  197. // write last bytes with padding, actual TCB len can be retrieved by esptool from core dump header
  198. rom_data.data32 = 0;
  199. for (k = 0; k < len; k++)
  200. rom_data.data8[k] = *(data + data_len + k);
  201. err = spi_flash_write(off + data_len, &rom_data, sizeof(uint32_t));
  202. if (err != ESP_OK) {
  203. ESP_COREDUMP_LOGE("Failed to finish write data to flash (%d)!", err);
  204. return 0;
  205. }
  206. data_len += sizeof(uint32_t);
  207. }
  208. return data_len;
  209. }
  210. static esp_err_t esp_core_dump_flash_write_prepare(void *priv, uint32_t *data_len)
  211. {
  212. esp_err_t err;
  213. uint32_t sec_num;
  214. core_dump_write_flash_data_t *wr_data = (core_dump_write_flash_data_t *)priv;
  215. // add space for 2 magics. TODO: change to CRC
  216. if ((*data_len + 2*sizeof(uint32_t)) > s_core_part_size) {
  217. ESP_COREDUMP_LOGE("Not enough space to save core dump!");
  218. return ESP_ERR_NO_MEM;
  219. }
  220. *data_len += 2*sizeof(uint32_t);
  221. wr_data->off = 0;
  222. sec_num = *data_len / SPI_FLASH_SEC_SIZE;
  223. if (*data_len % SPI_FLASH_SEC_SIZE)
  224. sec_num++;
  225. err = spi_flash_erase_range(s_core_part_start + 0, sec_num * SPI_FLASH_SEC_SIZE);
  226. if (err != ESP_OK) {
  227. ESP_COREDUMP_LOGE("Failed to erase flash (%d)!", err);
  228. return err;
  229. }
  230. return err;
  231. }
  232. static esp_err_t esp_core_dump_flash_write_word(core_dump_write_flash_data_t *wr_data, uint32_t word)
  233. {
  234. esp_err_t err = ESP_OK;
  235. uint32_t data32 = word;
  236. err = spi_flash_write(s_core_part_start + wr_data->off, &data32, sizeof(uint32_t));
  237. if (err != ESP_OK) {
  238. ESP_COREDUMP_LOGE("Failed to write to flash (%d)!", err);
  239. return err;
  240. }
  241. wr_data->off += sizeof(uint32_t);
  242. return err;
  243. }
  244. static esp_err_t esp_core_dump_flash_write_start(void *priv)
  245. {
  246. core_dump_write_flash_data_t *wr_data = (core_dump_write_flash_data_t *)priv;
  247. // save magic 1
  248. return esp_core_dump_flash_write_word(wr_data, COREDUMP_FLASH_MAGIC_START);
  249. }
  250. static esp_err_t esp_core_dump_flash_write_end(void *priv)
  251. {
  252. core_dump_write_flash_data_t *wr_data = (core_dump_write_flash_data_t *)priv;
  253. #if LOG_LOCAL_LEVEL >= ESP_LOG_DEBUG
  254. uint32_t i;
  255. union
  256. {
  257. uint8_t data8[16];
  258. uint32_t data32[4];
  259. } rom_data;
  260. esp_err_t err = spi_flash_read(s_core_part_start + 0, &rom_data, sizeof(rom_data));
  261. if (err != ESP_OK) {
  262. ESP_COREDUMP_LOGE("Failed to read flash (%d)!", err);
  263. return err;
  264. }
  265. else {
  266. ESP_COREDUMP_LOG_PROCESS("Data from flash:");
  267. for (i = 0; i < sizeof(rom_data)/sizeof(rom_data.data32[0]); i++) {
  268. ESP_COREDUMP_LOG_PROCESS("%x", rom_data.data32[i]);
  269. }
  270. }
  271. #endif
  272. // save magic 2
  273. return esp_core_dump_flash_write_word(wr_data, COREDUMP_FLASH_MAGIC_END);
  274. }
  275. static esp_err_t esp_core_dump_flash_write_data(void *priv, void * data, uint32_t data_len)
  276. {
  277. esp_err_t err = ESP_OK;
  278. core_dump_write_flash_data_t *wr_data = (core_dump_write_flash_data_t *)priv;
  279. uint32_t len = esp_core_dump_write_flash_padded(s_core_part_start + wr_data->off, data, data_len);
  280. if (len != data_len)
  281. return ESP_FAIL;
  282. wr_data->off += len;
  283. return err;
  284. }
  285. void esp_core_dump_to_flash(XtExcFrame *frame)
  286. {
  287. core_dump_write_config_t wr_cfg;
  288. core_dump_write_flash_data_t wr_data;
  289. /* init non-OS flash access critical section */
  290. spi_flash_guard_set(&g_flash_guard_no_os_ops);
  291. wr_cfg.prepare = esp_core_dump_flash_write_prepare;
  292. wr_cfg.start = esp_core_dump_flash_write_start;
  293. wr_cfg.end = esp_core_dump_flash_write_end;
  294. wr_cfg.write = esp_core_dump_flash_write_data;
  295. wr_cfg.priv = &wr_data;
  296. ESP_COREDUMP_LOGI("Save core dump to flash...");
  297. esp_core_dump_write(frame, &wr_cfg);
  298. ESP_COREDUMP_LOGI("Core dump has been saved to flash.");
  299. }
  300. #endif
  301. #if CONFIG_ESP32_ENABLE_COREDUMP_TO_UART
  302. static void esp_core_dump_b64_encode(const uint8_t *src, uint32_t src_len, uint8_t *dst) {
  303. const static DRAM_ATTR char b64[] =
  304. "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789+/";
  305. int i, j, a, b, c;
  306. for (i = j = 0; i < src_len; i += 3) {
  307. a = src[i];
  308. b = i + 1 >= src_len ? 0 : src[i + 1];
  309. c = i + 2 >= src_len ? 0 : src[i + 2];
  310. dst[j++] = b64[a >> 2];
  311. dst[j++] = b64[((a & 3) << 4) | (b >> 4)];
  312. if (i + 1 < src_len) {
  313. dst[j++] = b64[(b & 0x0F) << 2 | (c >> 6)];
  314. }
  315. if (i + 2 < src_len) {
  316. dst[j++] = b64[c & 0x3F];
  317. }
  318. }
  319. while (j % 4 != 0) {
  320. dst[j++] = '=';
  321. }
  322. dst[j++] = '\0';
  323. }
  324. static esp_err_t esp_core_dump_uart_write_start(void *priv)
  325. {
  326. esp_err_t err = ESP_OK;
  327. ets_printf(DRAM_STR("================= CORE DUMP START =================\r\n"));
  328. return err;
  329. }
  330. static esp_err_t esp_core_dump_uart_write_end(void *priv)
  331. {
  332. esp_err_t err = ESP_OK;
  333. ets_printf(DRAM_STR("================= CORE DUMP END =================\r\n"));
  334. return err;
  335. }
  336. static esp_err_t esp_core_dump_uart_write_data(void *priv, void * data, uint32_t data_len)
  337. {
  338. esp_err_t err = ESP_OK;
  339. char buf[64 + 4], *addr = data;
  340. char *end = addr + data_len;
  341. while (addr < end) {
  342. size_t len = end - addr;
  343. if (len > 48) len = 48;
  344. /* Copy to stack to avoid alignment restrictions. */
  345. char *tmp = buf + (sizeof(buf) - len);
  346. memcpy(tmp, addr, len);
  347. esp_core_dump_b64_encode((const uint8_t *)tmp, len, (uint8_t *)buf);
  348. addr += len;
  349. ets_printf(DRAM_STR("%s\r\n"), buf);
  350. }
  351. return err;
  352. }
  353. static int esp_core_dump_uart_get_char() {
  354. int i;
  355. uint32_t reg = (READ_PERI_REG(UART_STATUS_REG(0)) >> UART_RXFIFO_CNT_S) & UART_RXFIFO_CNT;
  356. if (reg)
  357. i = READ_PERI_REG(UART_FIFO_REG(0));
  358. else
  359. i = -1;
  360. return i;
  361. }
  362. void esp_core_dump_to_uart(XtExcFrame *frame)
  363. {
  364. core_dump_write_config_t wr_cfg;
  365. uint32_t tm_end, tm_cur;
  366. int ch;
  367. wr_cfg.prepare = NULL;
  368. wr_cfg.start = esp_core_dump_uart_write_start;
  369. wr_cfg.end = esp_core_dump_uart_write_end;
  370. wr_cfg.write = esp_core_dump_uart_write_data;
  371. wr_cfg.priv = NULL;
  372. //Make sure txd/rxd are enabled
  373. // use direct reg access instead of gpio_pullup_dis which can cause exception when flash cache is disabled
  374. REG_CLR_BIT(GPIO_PIN_REG_1, FUN_PU);
  375. PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD_U0RXD);
  376. PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD_U0TXD);
  377. ESP_COREDUMP_LOGI("Press Enter to print core dump to UART...");
  378. tm_end = xthal_get_ccount() / (XT_CLOCK_FREQ / 1000) + CONFIG_ESP32_CORE_DUMP_UART_DELAY;
  379. ch = esp_core_dump_uart_get_char();
  380. while (!(ch == '\n' || ch == '\r')) {
  381. tm_cur = xthal_get_ccount() / (XT_CLOCK_FREQ / 1000);
  382. if (tm_cur >= tm_end)
  383. break;
  384. ch = esp_core_dump_uart_get_char();
  385. }
  386. ESP_COREDUMP_LOGI("Print core dump to uart...");
  387. esp_core_dump_write(frame, &wr_cfg);
  388. ESP_COREDUMP_LOGI("Core dump has been written to uart.");
  389. }
  390. #endif
  391. void esp_core_dump_init()
  392. {
  393. #if CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH
  394. const esp_partition_t *core_part;
  395. ESP_COREDUMP_LOGI("Init core dump to flash");
  396. core_part = esp_partition_find_first(ESP_PARTITION_TYPE_DATA, ESP_PARTITION_SUBTYPE_DATA_COREDUMP, NULL);
  397. if (!core_part) {
  398. ESP_COREDUMP_LOGE("No core dump partition found!");
  399. return;
  400. }
  401. ESP_COREDUMP_LOGI("Found partition '%s' @ %x %d bytes", core_part->label, core_part->address, core_part->size);
  402. s_core_part_start = core_part->address;
  403. s_core_part_size = core_part->size;
  404. #endif
  405. #if CONFIG_ESP32_ENABLE_COREDUMP_TO_UART
  406. ESP_COREDUMP_LOGI("Init core dump to UART");
  407. #endif
  408. }
  409. #endif