deep_sleep.c 15 KB

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  1. // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. //
  7. // http://www.apache.org/licenses/LICENSE-2.0
  8. //
  9. // Unless required by applicable law or agreed to in writing, software
  10. // distributed under the License is distributed on an "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. // See the License for the specific language governing permissions and
  13. // limitations under the License.
  14. #include <stddef.h>
  15. #include <sys/lock.h>
  16. #include "esp_attr.h"
  17. #include "esp_deep_sleep.h"
  18. #include "esp_log.h"
  19. #include "rom/cache.h"
  20. #include "rom/rtc.h"
  21. #include "rom/uart.h"
  22. #include "soc/cpu.h"
  23. #include "soc/rtc.h"
  24. #include "soc/rtc_cntl_reg.h"
  25. #include "soc/rtc_io_reg.h"
  26. #include "soc/sens_reg.h"
  27. #include "soc/dport_reg.h"
  28. #include "driver/rtc_io.h"
  29. #include "freertos/FreeRTOS.h"
  30. #include "freertos/task.h"
  31. #include "sdkconfig.h"
  32. /**
  33. * Internal structure which holds all requested deep sleep parameters
  34. */
  35. typedef struct {
  36. esp_deep_sleep_pd_option_t pd_options[ESP_PD_DOMAIN_MAX];
  37. uint64_t sleep_duration;
  38. uint32_t wakeup_triggers : 11;
  39. uint32_t ext1_trigger_mode : 1;
  40. uint32_t ext1_rtc_gpio_mask : 18;
  41. uint32_t ext0_trigger_level : 1;
  42. uint32_t ext0_rtc_gpio_num : 5;
  43. } deep_sleep_config_t;
  44. static deep_sleep_config_t s_config = {
  45. .pd_options = { ESP_PD_OPTION_AUTO, ESP_PD_OPTION_AUTO, ESP_PD_OPTION_AUTO },
  46. .wakeup_triggers = 0
  47. };
  48. /* Updating RTC_MEMORY_CRC_REG register via set_rtc_memory_crc()
  49. is not thread-safe. */
  50. static _lock_t lock_rtc_memory_crc;
  51. static const char* TAG = "deepsleep";
  52. static uint32_t get_power_down_flags();
  53. static void ext0_wakeup_prepare();
  54. static void ext1_wakeup_prepare();
  55. static void timer_wakeup_prepare();
  56. /* Wake from deep sleep stub
  57. See esp_deepsleep.h esp_wake_deep_sleep() comments for details.
  58. */
  59. esp_deep_sleep_wake_stub_fn_t esp_get_deep_sleep_wake_stub(void)
  60. {
  61. _lock_acquire(&lock_rtc_memory_crc);
  62. uint32_t stored_crc = REG_READ(RTC_MEMORY_CRC_REG);
  63. set_rtc_memory_crc();
  64. uint32_t calc_crc = REG_READ(RTC_MEMORY_CRC_REG);
  65. REG_WRITE(RTC_MEMORY_CRC_REG, stored_crc);
  66. _lock_release(&lock_rtc_memory_crc);
  67. if(stored_crc == calc_crc) {
  68. return (esp_deep_sleep_wake_stub_fn_t)REG_READ(RTC_ENTRY_ADDR_REG);
  69. } else {
  70. return NULL;
  71. }
  72. }
  73. void esp_set_deep_sleep_wake_stub(esp_deep_sleep_wake_stub_fn_t new_stub)
  74. {
  75. _lock_acquire(&lock_rtc_memory_crc);
  76. REG_WRITE(RTC_ENTRY_ADDR_REG, (uint32_t)new_stub);
  77. set_rtc_memory_crc();
  78. _lock_release(&lock_rtc_memory_crc);
  79. }
  80. void RTC_IRAM_ATTR esp_default_wake_deep_sleep(void) {
  81. /* Clear MMU for CPU 0 */
  82. REG_SET_BIT(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CACHE_MMU_IA_CLR);
  83. REG_CLR_BIT(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CACHE_MMU_IA_CLR);
  84. #if CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY > 0
  85. // ROM code has not started yet, so we need to set delay factor
  86. // used by ets_delay_us first.
  87. ets_update_cpu_frequency_rom(ets_get_detected_xtal_freq() / 1000000);
  88. // This delay is configured in menuconfig, it can be used to give
  89. // the flash chip some time to become ready.
  90. ets_delay_us(CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY);
  91. #endif
  92. }
  93. void __attribute__((weak, alias("esp_default_wake_deep_sleep"))) esp_wake_deep_sleep(void);
  94. void esp_deep_sleep(uint64_t time_in_us)
  95. {
  96. esp_deep_sleep_enable_timer_wakeup(time_in_us);
  97. esp_deep_sleep_start();
  98. }
  99. void IRAM_ATTR esp_deep_sleep_start()
  100. {
  101. // Decide which power domains can be powered down
  102. uint32_t pd_flags = get_power_down_flags();
  103. // Shut down parts of RTC which may have been left enabled by the wireless drivers
  104. CLEAR_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG,
  105. RTC_CNTL_CKGEN_I2C_PU | RTC_CNTL_PLL_I2C_PU |
  106. RTC_CNTL_RFRX_PBUS_PU | RTC_CNTL_TXRF_I2C_PU);
  107. SET_PERI_REG_BITS(SENS_SAR_MEAS_WAIT2_REG, SENS_FORCE_XPD_SAR_M, 0, SENS_FORCE_XPD_SAR_S);
  108. // Flush UARTs so that output is not lost due to APB frequency change
  109. uart_tx_wait_idle(0);
  110. uart_tx_wait_idle(1);
  111. uart_tx_wait_idle(2);
  112. if (esp_get_deep_sleep_wake_stub() == NULL) {
  113. esp_set_deep_sleep_wake_stub(esp_wake_deep_sleep);
  114. }
  115. // Configure pins for external wakeup
  116. if (s_config.wakeup_triggers & RTC_EXT0_TRIG_EN) {
  117. ext0_wakeup_prepare();
  118. }
  119. if (s_config.wakeup_triggers & RTC_EXT1_TRIG_EN) {
  120. ext1_wakeup_prepare();
  121. }
  122. // Enable ULP wakeup
  123. if (s_config.wakeup_triggers & RTC_ULP_TRIG_EN) {
  124. SET_PERI_REG_MASK(RTC_CNTL_STATE0_REG, RTC_CNTL_ULP_CP_WAKEUP_FORCE_EN);
  125. }
  126. // Configure timer wakeup
  127. if ((s_config.wakeup_triggers & RTC_TIMER_TRIG_EN) &&
  128. s_config.sleep_duration > 0) {
  129. timer_wakeup_prepare();
  130. }
  131. // Enter deep sleep
  132. rtc_sleep_config_t config = RTC_SLEEP_CONFIG_DEFAULT(pd_flags);
  133. rtc_sleep_init(config);
  134. rtc_sleep_start(s_config.wakeup_triggers, 0);
  135. // Because RTC is in a slower clock domain than the CPU, it
  136. // can take several CPU cycles for the sleep mode to start.
  137. while (1) {
  138. ;
  139. }
  140. }
  141. void system_deep_sleep(uint64_t) __attribute__((alias("esp_deep_sleep")));
  142. esp_err_t esp_deep_sleep_enable_ulp_wakeup()
  143. {
  144. #ifdef CONFIG_ULP_COPROC_ENABLED
  145. if(s_config.wakeup_triggers & RTC_EXT0_TRIG_EN) {
  146. ESP_LOGE(TAG, "Conflicting wake-up trigger: ext0");
  147. return ESP_ERR_INVALID_STATE;
  148. }
  149. s_config.wakeup_triggers |= RTC_ULP_TRIG_EN;
  150. return ESP_OK;
  151. #else
  152. return ESP_ERR_INVALID_STATE;
  153. #endif
  154. }
  155. esp_err_t esp_deep_sleep_enable_timer_wakeup(uint64_t time_in_us)
  156. {
  157. s_config.wakeup_triggers |= RTC_TIMER_TRIG_EN;
  158. s_config.sleep_duration = time_in_us;
  159. return ESP_OK;
  160. }
  161. static void timer_wakeup_prepare()
  162. {
  163. // Do calibration if not using 32k XTAL
  164. uint32_t period;
  165. if (rtc_clk_slow_freq_get() != RTC_SLOW_FREQ_32K_XTAL) {
  166. period = rtc_clk_cal(RTC_CAL_RTC_MUX, 128);
  167. } else {
  168. period = (uint32_t) ((1000000ULL /* us*Hz */ << RTC_CLK_CAL_FRACT) / 32768 /* Hz */);
  169. }
  170. uint64_t rtc_count_delta = rtc_time_us_to_slowclk(s_config.sleep_duration, period);
  171. uint64_t cur_rtc_count = rtc_time_get();
  172. rtc_sleep_set_wakeup_time(cur_rtc_count + rtc_count_delta);
  173. }
  174. esp_err_t esp_deep_sleep_enable_touchpad_wakeup()
  175. {
  176. if (s_config.wakeup_triggers & (RTC_EXT0_TRIG_EN)) {
  177. ESP_LOGE(TAG, "Conflicting wake-up trigger: ext0");
  178. return ESP_ERR_INVALID_STATE;
  179. }
  180. s_config.wakeup_triggers |= RTC_TOUCH_TRIG_EN;
  181. return ESP_OK;
  182. }
  183. touch_pad_t esp_deep_sleep_get_touchpad_wakeup_status()
  184. {
  185. if (esp_deep_sleep_get_wakeup_cause() != ESP_DEEP_SLEEP_WAKEUP_TOUCHPAD) {
  186. return TOUCH_PAD_MAX;
  187. }
  188. uint32_t touch_mask = REG_GET_FIELD(SENS_SAR_TOUCH_CTRL2_REG, SENS_TOUCH_MEAS_EN);
  189. assert(touch_mask != 0 && "wakeup reason is RTC_TOUCH_TRIG_EN but SENS_TOUCH_MEAS_EN is zero");
  190. return (touch_pad_t) (__builtin_ffs(touch_mask) - 1);
  191. }
  192. esp_err_t esp_deep_sleep_enable_ext0_wakeup(gpio_num_t gpio_num, int level)
  193. {
  194. if (level < 0 || level > 1) {
  195. return ESP_ERR_INVALID_ARG;
  196. }
  197. if (!RTC_GPIO_IS_VALID_GPIO(gpio_num)) {
  198. return ESP_ERR_INVALID_ARG;
  199. }
  200. if (s_config.wakeup_triggers & (RTC_TOUCH_TRIG_EN | RTC_ULP_TRIG_EN)) {
  201. ESP_LOGE(TAG, "Conflicting wake-up triggers: touch / ULP");
  202. return ESP_ERR_INVALID_STATE;
  203. }
  204. s_config.ext0_rtc_gpio_num = rtc_gpio_desc[gpio_num].rtc_num;
  205. s_config.ext0_trigger_level = level;
  206. s_config.wakeup_triggers |= RTC_EXT0_TRIG_EN;
  207. return ESP_OK;
  208. }
  209. static void ext0_wakeup_prepare()
  210. {
  211. int rtc_gpio_num = s_config.ext0_rtc_gpio_num;
  212. // Set GPIO to be used for wakeup
  213. REG_SET_FIELD(RTC_IO_EXT_WAKEUP0_REG, RTC_IO_EXT_WAKEUP0_SEL, rtc_gpio_num);
  214. // Set level which will trigger wakeup
  215. SET_PERI_REG_BITS(RTC_CNTL_EXT_WAKEUP_CONF_REG, 0x1,
  216. s_config.ext0_trigger_level, RTC_CNTL_EXT_WAKEUP0_LV_S);
  217. // Find GPIO descriptor in the rtc_gpio_desc table and configure the pad
  218. for (size_t gpio_num = 0; gpio_num < GPIO_PIN_COUNT; ++gpio_num) {
  219. const rtc_gpio_desc_t* desc = &rtc_gpio_desc[gpio_num];
  220. if (desc->rtc_num == rtc_gpio_num) {
  221. REG_SET_BIT(desc->reg, desc->mux);
  222. SET_PERI_REG_BITS(desc->reg, 0x3, 0, desc->func);
  223. REG_SET_BIT(desc->reg, desc->slpsel);
  224. REG_SET_BIT(desc->reg, desc->slpie);
  225. break;
  226. }
  227. }
  228. }
  229. esp_err_t esp_deep_sleep_enable_ext1_wakeup(uint64_t mask, esp_ext1_wakeup_mode_t mode)
  230. {
  231. if (mode > ESP_EXT1_WAKEUP_ANY_HIGH) {
  232. return ESP_ERR_INVALID_ARG;
  233. }
  234. // Translate bit map of GPIO numbers into the bit map of RTC IO numbers
  235. uint32_t rtc_gpio_mask = 0;
  236. for (int gpio = 0; mask; ++gpio, mask >>= 1) {
  237. if ((mask & 1) == 0) {
  238. continue;
  239. }
  240. if (!RTC_GPIO_IS_VALID_GPIO(gpio)) {
  241. ESP_LOGE(TAG, "Not an RTC IO: GPIO%d", gpio);
  242. return ESP_ERR_INVALID_ARG;
  243. }
  244. rtc_gpio_mask |= BIT(rtc_gpio_desc[gpio].rtc_num);
  245. }
  246. s_config.ext1_rtc_gpio_mask = rtc_gpio_mask;
  247. s_config.ext1_trigger_mode = mode;
  248. s_config.wakeup_triggers |= RTC_EXT1_TRIG_EN;
  249. return ESP_OK;
  250. }
  251. static void ext1_wakeup_prepare()
  252. {
  253. // Configure all RTC IOs selected as ext1 wakeup inputs
  254. uint32_t rtc_gpio_mask = s_config.ext1_rtc_gpio_mask;
  255. for (int gpio = 0; gpio < GPIO_PIN_COUNT && rtc_gpio_mask != 0; ++gpio) {
  256. int rtc_pin = rtc_gpio_desc[gpio].rtc_num;
  257. if ((rtc_gpio_mask & BIT(rtc_pin)) == 0) {
  258. continue;
  259. }
  260. const rtc_gpio_desc_t* desc = &rtc_gpio_desc[gpio];
  261. // Route pad to RTC
  262. REG_SET_BIT(desc->reg, desc->mux);
  263. SET_PERI_REG_BITS(desc->reg, 0x3, 0, desc->func);
  264. // Pad configuration depends on RTC_PERIPH state in sleep mode
  265. if (s_config.pd_options[ESP_PD_DOMAIN_RTC_PERIPH] == ESP_PD_OPTION_ON) {
  266. // set input enable in sleep mode
  267. REG_SET_BIT(desc->reg, desc->slpie);
  268. // allow sleep status signal to control IE/SLPIE mux
  269. REG_SET_BIT(desc->reg, desc->slpsel);
  270. } else {
  271. // RTC_PERIPH will be disabled, so need to enable input and
  272. // lock pad configuration. Pullups/pulldowns also need to be disabled.
  273. REG_SET_BIT(desc->reg, desc->ie);
  274. REG_CLR_BIT(desc->reg, desc->pulldown);
  275. REG_CLR_BIT(desc->reg, desc->pullup);
  276. REG_SET_BIT(RTC_CNTL_HOLD_FORCE_REG, desc->hold_force);
  277. }
  278. // Keep track of pins which are processed to bail out early
  279. rtc_gpio_mask &= ~BIT(rtc_pin);
  280. }
  281. // Clear state from previous wakeup
  282. REG_SET_BIT(RTC_CNTL_EXT_WAKEUP1_REG, RTC_CNTL_EXT_WAKEUP1_STATUS_CLR);
  283. // Set pins to be used for wakeup
  284. REG_SET_FIELD(RTC_CNTL_EXT_WAKEUP1_REG, RTC_CNTL_EXT_WAKEUP1_SEL, s_config.ext1_rtc_gpio_mask);
  285. // Set logic function (any low, all high)
  286. SET_PERI_REG_BITS(RTC_CNTL_EXT_WAKEUP_CONF_REG, 0x1,
  287. s_config.ext1_trigger_mode, RTC_CNTL_EXT_WAKEUP1_LV_S);
  288. }
  289. uint64_t esp_deep_sleep_get_ext1_wakeup_status()
  290. {
  291. if (esp_deep_sleep_get_wakeup_cause() != ESP_DEEP_SLEEP_WAKEUP_EXT1) {
  292. return 0;
  293. }
  294. uint32_t status = REG_GET_FIELD(RTC_CNTL_EXT_WAKEUP1_STATUS_REG, RTC_CNTL_EXT_WAKEUP1_STATUS);
  295. // Translate bit map of RTC IO numbers into the bit map of GPIO numbers
  296. uint64_t gpio_mask = 0;
  297. for (int gpio = 0; gpio < GPIO_PIN_COUNT; ++gpio) {
  298. if (!RTC_GPIO_IS_VALID_GPIO(gpio)) {
  299. continue;
  300. }
  301. int rtc_pin = rtc_gpio_desc[gpio].rtc_num;
  302. if ((status & BIT(rtc_pin)) == 0) {
  303. continue;
  304. }
  305. gpio_mask |= BIT(gpio);
  306. }
  307. return gpio_mask;
  308. }
  309. esp_deep_sleep_wakeup_cause_t esp_deep_sleep_get_wakeup_cause()
  310. {
  311. if (rtc_get_reset_reason(0) != DEEPSLEEP_RESET) {
  312. return ESP_DEEP_SLEEP_WAKEUP_UNDEFINED;
  313. }
  314. uint32_t wakeup_cause = REG_GET_FIELD(RTC_CNTL_WAKEUP_STATE_REG, RTC_CNTL_WAKEUP_CAUSE);
  315. if (wakeup_cause & RTC_EXT0_TRIG_EN) {
  316. return ESP_DEEP_SLEEP_WAKEUP_EXT0;
  317. } else if (wakeup_cause & RTC_EXT1_TRIG_EN) {
  318. return ESP_DEEP_SLEEP_WAKEUP_EXT1;
  319. } else if (wakeup_cause & RTC_TIMER_TRIG_EN) {
  320. return ESP_DEEP_SLEEP_WAKEUP_TIMER;
  321. } else if (wakeup_cause & RTC_TOUCH_TRIG_EN) {
  322. return ESP_DEEP_SLEEP_WAKEUP_TOUCHPAD;
  323. } else if (wakeup_cause & RTC_ULP_TRIG_EN) {
  324. return ESP_DEEP_SLEEP_WAKEUP_ULP;
  325. } else {
  326. return ESP_DEEP_SLEEP_WAKEUP_UNDEFINED;
  327. }
  328. }
  329. esp_err_t esp_deep_sleep_pd_config(esp_deep_sleep_pd_domain_t domain,
  330. esp_deep_sleep_pd_option_t option)
  331. {
  332. if (domain >= ESP_PD_DOMAIN_MAX || option > ESP_PD_OPTION_AUTO) {
  333. return ESP_ERR_INVALID_ARG;
  334. }
  335. s_config.pd_options[domain] = option;
  336. return ESP_OK;
  337. }
  338. static uint32_t get_power_down_flags()
  339. {
  340. // Where needed, convert AUTO options to ON. Later interpret AUTO as OFF.
  341. // RTC_SLOW_MEM is needed for the ULP, so keep RTC_SLOW_MEM powered up if ULP
  342. // is used and RTC_SLOW_MEM is Auto.
  343. // If there is any data placed into .rtc.data or .rtc.bss segments, and
  344. // RTC_SLOW_MEM is Auto, keep it powered up as well.
  345. // These labels are defined in the linker script:
  346. extern int _rtc_data_start, _rtc_data_end, _rtc_bss_start, _rtc_bss_end;
  347. if (s_config.pd_options[ESP_PD_DOMAIN_RTC_SLOW_MEM] == ESP_PD_OPTION_AUTO ||
  348. &_rtc_data_end > &_rtc_data_start ||
  349. &_rtc_bss_end > &_rtc_bss_start) {
  350. s_config.pd_options[ESP_PD_DOMAIN_RTC_SLOW_MEM] = ESP_PD_OPTION_ON;
  351. }
  352. // RTC_FAST_MEM is needed for deep sleep stub.
  353. // If RTC_FAST_MEM is Auto, keep it powered on, so that deep sleep stub
  354. // can run.
  355. // In the new chip revision, deep sleep stub will be optional,
  356. // and this can be changed.
  357. if (s_config.pd_options[ESP_PD_DOMAIN_RTC_FAST_MEM] == ESP_PD_OPTION_AUTO) {
  358. s_config.pd_options[ESP_PD_DOMAIN_RTC_FAST_MEM] = ESP_PD_OPTION_ON;
  359. }
  360. // RTC_PERIPH is needed for EXT0 wakeup.
  361. // If RTC_PERIPH is auto, and EXT0 isn't enabled, power down RTC_PERIPH.
  362. if (s_config.pd_options[ESP_PD_DOMAIN_RTC_PERIPH] == ESP_PD_OPTION_AUTO) {
  363. if (s_config.wakeup_triggers & RTC_EXT0_TRIG_EN) {
  364. s_config.pd_options[ESP_PD_DOMAIN_RTC_PERIPH] = ESP_PD_OPTION_ON;
  365. } else if (s_config.wakeup_triggers & (RTC_TOUCH_TRIG_EN | RTC_ULP_TRIG_EN)) {
  366. // In both rev. 0 and rev. 1 of ESP32, forcing power up of RTC_PERIPH
  367. // prevents ULP timer and touch FSMs from working correctly.
  368. s_config.pd_options[ESP_PD_DOMAIN_RTC_PERIPH] = ESP_PD_OPTION_OFF;
  369. }
  370. }
  371. const char* option_str[] = {"OFF", "ON", "AUTO(OFF)" /* Auto works as OFF */};
  372. ESP_LOGD(TAG, "RTC_PERIPH: %s, RTC_SLOW_MEM: %s, RTC_FAST_MEM: %s",
  373. option_str[s_config.pd_options[ESP_PD_DOMAIN_RTC_PERIPH]],
  374. option_str[s_config.pd_options[ESP_PD_DOMAIN_RTC_SLOW_MEM]],
  375. option_str[s_config.pd_options[ESP_PD_DOMAIN_RTC_FAST_MEM]]);
  376. // Prepare flags based on the selected options
  377. uint32_t pd_flags = RTC_SLEEP_PD_DIG;
  378. if (s_config.pd_options[ESP_PD_DOMAIN_RTC_FAST_MEM] != ESP_PD_OPTION_ON) {
  379. pd_flags |= RTC_SLEEP_PD_RTC_FAST_MEM;
  380. }
  381. if (s_config.pd_options[ESP_PD_DOMAIN_RTC_SLOW_MEM] != ESP_PD_OPTION_ON) {
  382. pd_flags |= RTC_SLEEP_PD_RTC_SLOW_MEM;
  383. }
  384. if (s_config.pd_options[ESP_PD_DOMAIN_RTC_PERIPH] != ESP_PD_OPTION_ON) {
  385. pd_flags |= RTC_SLEEP_PD_RTC_PERIPH;
  386. }
  387. return pd_flags;
  388. }