time.c 6.9 KB

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  1. // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. //
  7. // http://www.apache.org/licenses/LICENSE-2.0
  8. //
  9. // Unless required by applicable law or agreed to in writing, software
  10. // distributed under the License is distributed on an "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. // See the License for the specific language governing permissions and
  13. // limitations under the License.
  14. #include <errno.h>
  15. #include <stdlib.h>
  16. #include <time.h>
  17. #include <reent.h>
  18. #include <sys/types.h>
  19. #include <sys/reent.h>
  20. #include <sys/time.h>
  21. #include <sys/times.h>
  22. #include <sys/lock.h>
  23. #include <rom/rtc.h>
  24. #include "esp_attr.h"
  25. #include "esp_intr_alloc.h"
  26. #include "soc/soc.h"
  27. #include "soc/rtc_cntl_reg.h"
  28. #include "soc/frc_timer_reg.h"
  29. #include "rom/ets_sys.h"
  30. #include "freertos/FreeRTOS.h"
  31. #include "freertos/xtensa_api.h"
  32. #include "freertos/task.h"
  33. #include "sdkconfig.h"
  34. #if defined( CONFIG_ESP32_TIME_SYSCALL_USE_RTC ) || defined( CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1 )
  35. #define WITH_RTC 1
  36. #endif
  37. #if defined( CONFIG_ESP32_TIME_SYSCALL_USE_FRC1 ) || defined( CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1 )
  38. #define WITH_FRC1 1
  39. #endif
  40. #ifdef WITH_RTC
  41. static uint64_t get_rtc_time_us()
  42. {
  43. SET_PERI_REG_MASK(RTC_CNTL_TIME_UPDATE_REG, RTC_CNTL_TIME_UPDATE_M);
  44. while (GET_PERI_REG_MASK(RTC_CNTL_TIME_UPDATE_REG, RTC_CNTL_TIME_VALID_M) == 0) {
  45. ;
  46. }
  47. CLEAR_PERI_REG_MASK(RTC_CNTL_TIME_UPDATE_REG, RTC_CNTL_TIME_UPDATE_M);
  48. uint64_t low = READ_PERI_REG(RTC_CNTL_TIME0_REG);
  49. uint64_t high = READ_PERI_REG(RTC_CNTL_TIME1_REG);
  50. uint64_t ticks = (high << 32) | low;
  51. return ticks * 100 / (RTC_CNTL_SLOWCLK_FREQ / 10000); // scale RTC_CNTL_SLOWCLK_FREQ to avoid overflow
  52. }
  53. #endif // WITH_RTC
  54. // s_boot_time: time from Epoch to the first boot time
  55. #ifdef WITH_RTC
  56. // when RTC is used to persist time, two RTC_STORE registers are used to store boot time
  57. #elif defined(WITH_FRC1)
  58. static uint64_t s_boot_time;
  59. #endif
  60. #if defined(WITH_RTC) || defined(WITH_FRC1)
  61. static _lock_t s_boot_time_lock;
  62. #endif
  63. #ifdef WITH_FRC1
  64. #define FRC1_PRESCALER 16
  65. #define FRC1_PRESCALER_CTL 2
  66. #define FRC1_TICK_FREQ (APB_CLK_FREQ / FRC1_PRESCALER)
  67. #define FRC1_TICKS_PER_US (FRC1_TICK_FREQ / 1000000)
  68. #define FRC1_ISR_PERIOD_US (FRC_TIMER_LOAD_VALUE(0) / FRC1_TICKS_PER_US)
  69. // Counter frequency will be APB_CLK_FREQ / 16 = 5 MHz
  70. // 1 tick = 0.2 us
  71. // Timer has 23 bit counter, so interrupt will fire each 1677721.6 microseconds.
  72. // This is not a whole number, so timer will drift by 0.3 ppm due to rounding error.
  73. static volatile uint64_t s_microseconds = 0;
  74. static void IRAM_ATTR frc_timer_isr()
  75. {
  76. // Write to FRC_TIMER_INT_REG may not take effect in some cases (root cause TBD)
  77. // This extra write works around this issue.
  78. // FRC_TIMER_LOAD_REG(0) is used here, but any other DPORT register address can also be used.
  79. WRITE_PERI_REG(FRC_TIMER_LOAD_REG(0), FRC_TIMER_LOAD_VALUE(0));
  80. WRITE_PERI_REG(FRC_TIMER_INT_REG(0), FRC_TIMER_INT_CLR);
  81. s_microseconds += FRC1_ISR_PERIOD_US;
  82. }
  83. #endif // WITH_FRC1
  84. #if defined(WITH_RTC) || defined(WITH_FRC1)
  85. static void set_boot_time(uint64_t time_us)
  86. {
  87. _lock_acquire(&s_boot_time_lock);
  88. #ifdef WITH_RTC
  89. REG_WRITE(RTC_BOOT_TIME_LOW_REG, (uint32_t) (time_us & 0xffffffff));
  90. REG_WRITE(RTC_BOOT_TIME_HIGH_REG, (uint32_t) (time_us >> 32));
  91. #else
  92. s_boot_time = time_us;
  93. #endif
  94. _lock_release(&s_boot_time_lock);
  95. }
  96. static uint64_t get_boot_time()
  97. {
  98. uint64_t result;
  99. _lock_acquire(&s_boot_time_lock);
  100. #ifdef WITH_RTC
  101. result = ((uint64_t) REG_READ(RTC_BOOT_TIME_LOW_REG)) + (((uint64_t) REG_READ(RTC_BOOT_TIME_HIGH_REG)) << 32);
  102. #else
  103. result = s_boot_time;
  104. #endif
  105. _lock_release(&s_boot_time_lock);
  106. return result;
  107. }
  108. #endif //defined(WITH_RTC) || defined(WITH_FRC1)
  109. void esp_setup_time_syscalls()
  110. {
  111. #if defined( WITH_FRC1 )
  112. #if defined( WITH_RTC )
  113. // initialize time from RTC clock
  114. s_microseconds = get_rtc_time_us();
  115. #endif //WITH_RTC
  116. // set up timer
  117. WRITE_PERI_REG(FRC_TIMER_CTRL_REG(0), \
  118. FRC_TIMER_AUTOLOAD | \
  119. (FRC1_PRESCALER_CTL << FRC_TIMER_PRESCALER_S) | \
  120. FRC_TIMER_EDGE_INT);
  121. WRITE_PERI_REG(FRC_TIMER_LOAD_REG(0), FRC_TIMER_LOAD_VALUE(0));
  122. SET_PERI_REG_MASK(FRC_TIMER_CTRL_REG(0),
  123. FRC_TIMER_ENABLE | \
  124. FRC_TIMER_INT_ENABLE);
  125. esp_intr_alloc(ETS_TIMER1_INTR_SOURCE, 0, &frc_timer_isr, NULL, NULL);
  126. #endif // WITH_FRC1
  127. }
  128. clock_t IRAM_ATTR _times_r(struct _reent *r, struct tms *ptms)
  129. {
  130. clock_t t = xTaskGetTickCount() * (portTICK_PERIOD_MS * CLK_TCK / 1000);
  131. ptms->tms_cstime = 0;
  132. ptms->tms_cutime = 0;
  133. ptms->tms_stime = t;
  134. ptms->tms_utime = 0;
  135. struct timeval tv = {0, 0};
  136. _gettimeofday_r(r, &tv, NULL);
  137. return (clock_t) tv.tv_sec;
  138. }
  139. #if defined( WITH_FRC1 ) || defined( WITH_RTC )
  140. static uint64_t get_time_since_boot()
  141. {
  142. uint64_t microseconds = 0;
  143. #ifdef WITH_FRC1
  144. uint32_t timer_ticks_before = READ_PERI_REG(FRC_TIMER_COUNT_REG(0));
  145. microseconds = s_microseconds;
  146. uint32_t timer_ticks_after = READ_PERI_REG(FRC_TIMER_COUNT_REG(0));
  147. if (timer_ticks_after > timer_ticks_before) {
  148. // overflow happened at some point between getting
  149. // timer_ticks_before and timer_ticks_after
  150. // microseconds value is ambiguous, get a new one
  151. microseconds = s_microseconds;
  152. }
  153. microseconds += (FRC_TIMER_LOAD_VALUE(0) - timer_ticks_after) / FRC1_TICKS_PER_US;
  154. #elif defined(WITH_RTC)
  155. microseconds = get_rtc_time_us();
  156. #endif
  157. return microseconds;
  158. }
  159. #endif // defined( WITH_FRC1 ) || defined( WITH_RTC )
  160. int IRAM_ATTR _gettimeofday_r(struct _reent *r, struct timeval *tv, void *tz)
  161. {
  162. (void) tz;
  163. #if defined( WITH_FRC1 ) || defined( WITH_RTC )
  164. if (tv) {
  165. uint64_t microseconds = get_boot_time() + get_time_since_boot();
  166. tv->tv_sec = microseconds / 1000000;
  167. tv->tv_usec = microseconds % 1000000;
  168. }
  169. return 0;
  170. #else
  171. __errno_r(r) = ENOSYS;
  172. return -1;
  173. #endif // defined( WITH_FRC1 ) || defined( WITH_RTC )
  174. }
  175. int settimeofday(const struct timeval *tv, const struct timezone *tz)
  176. {
  177. (void) tz;
  178. #if defined( WITH_FRC1 ) || defined( WITH_RTC )
  179. if (tv) {
  180. uint64_t now = ((uint64_t) tv->tv_sec) * 1000000LL + tv->tv_usec;
  181. uint64_t since_boot = get_time_since_boot();
  182. set_boot_time(now - since_boot);
  183. }
  184. return 0;
  185. #else
  186. errno = ENOSYS;
  187. return -1;
  188. #endif
  189. }
  190. uint32_t system_get_time(void)
  191. {
  192. #if defined( WITH_FRC1 ) || defined( WITH_RTC )
  193. return get_time_since_boot();
  194. #else
  195. return 0;
  196. #endif
  197. }
  198. uint32_t system_get_current_time(void) __attribute__((alias("system_get_time")));
  199. uint32_t system_relative_time(uint32_t current_time)
  200. {
  201. return system_get_time() - current_time;
  202. }
  203. uint64_t system_get_rtc_time(void)
  204. {
  205. #ifdef WITH_RTC
  206. return get_rtc_time_us();
  207. #else
  208. return 0;
  209. #endif
  210. }