test_spi_flash.c 5.0 KB

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  1. #include <stdio.h>
  2. #include <freertos/FreeRTOS.h>
  3. #include <freertos/task.h>
  4. #include <freertos/semphr.h>
  5. #include <unity.h>
  6. #include <esp_spi_flash.h>
  7. #include <esp_attr.h>
  8. #include "driver/timer.h"
  9. #include "esp_intr_alloc.h"
  10. struct flash_test_ctx {
  11. uint32_t offset;
  12. bool fail;
  13. SemaphoreHandle_t done;
  14. };
  15. static void flash_test_task(void *arg)
  16. {
  17. struct flash_test_ctx *ctx = (struct flash_test_ctx *) arg;
  18. vTaskDelay(100 / portTICK_PERIOD_MS);
  19. const uint32_t sector = ctx->offset;
  20. printf("t%d\n", sector);
  21. printf("es%d\n", sector);
  22. if (spi_flash_erase_sector(sector) != ESP_OK) {
  23. ctx->fail = true;
  24. printf("Erase failed\r\n");
  25. xSemaphoreGive(ctx->done);
  26. vTaskDelete(NULL);
  27. }
  28. printf("ed%d\n", sector);
  29. vTaskDelay(0 / portTICK_PERIOD_MS);
  30. uint32_t val = 0xabcd1234;
  31. for (uint32_t offset = 0; offset < SPI_FLASH_SEC_SIZE; offset += 4) {
  32. if (spi_flash_write(sector * SPI_FLASH_SEC_SIZE + offset, (const uint8_t *) &val, 4) != ESP_OK) {
  33. printf("Write failed at offset=%d\r\n", offset);
  34. ctx->fail = true;
  35. break;
  36. }
  37. }
  38. printf("wd%d\n", sector);
  39. vTaskDelay(0 / portTICK_PERIOD_MS);
  40. uint32_t val_read;
  41. for (uint32_t offset = 0; offset < SPI_FLASH_SEC_SIZE; offset += 4) {
  42. if (spi_flash_read(sector * SPI_FLASH_SEC_SIZE + offset, (uint8_t *) &val_read, 4) != ESP_OK) {
  43. printf("Read failed at offset=%d\r\n", offset);
  44. ctx->fail = true;
  45. break;
  46. }
  47. if (val_read != val) {
  48. printf("Read invalid value=%08x at offset=%d\r\n", val_read, offset);
  49. ctx->fail = true;
  50. break;
  51. }
  52. }
  53. printf("td%d\n", sector);
  54. xSemaphoreGive(ctx->done);
  55. vTaskDelete(NULL);
  56. }
  57. TEST_CASE("flash write and erase work both on PRO CPU and on APP CPU", "[spi_flash][ignore]")
  58. {
  59. SemaphoreHandle_t done = xSemaphoreCreateCounting(4, 0);
  60. struct flash_test_ctx ctx[] = {
  61. { .offset = 0x100 + 6, .done = done },
  62. { .offset = 0x100 + 7, .done = done },
  63. { .offset = 0x100 + 8, .done = done },
  64. #ifndef CONFIG_FREERTOS_UNICORE
  65. { .offset = 0x100 + 9, .done = done }
  66. #endif
  67. };
  68. xTaskCreatePinnedToCore(flash_test_task, "t0", 2048, &ctx[0], 3, NULL, 0);
  69. xTaskCreatePinnedToCore(flash_test_task, "t1", 2048, &ctx[1], 3, NULL, tskNO_AFFINITY);
  70. xTaskCreatePinnedToCore(flash_test_task, "t2", 2048, &ctx[2], 3, NULL, tskNO_AFFINITY);
  71. #ifndef CONFIG_FREERTOS_UNICORE
  72. xTaskCreatePinnedToCore(flash_test_task, "t3", 2048, &ctx[3], 3, NULL, 1);
  73. #endif
  74. const size_t task_count = sizeof(ctx)/sizeof(ctx[0]);
  75. for (int i = 0; i < task_count; ++i) {
  76. xSemaphoreTake(done, portMAX_DELAY);
  77. TEST_ASSERT_FALSE(ctx[i].fail);
  78. }
  79. vSemaphoreDelete(done);
  80. }
  81. typedef struct {
  82. size_t buf_size;
  83. uint8_t* buf;
  84. size_t flash_addr;
  85. size_t repeat_count;
  86. SemaphoreHandle_t done;
  87. } read_task_arg_t;
  88. typedef struct {
  89. size_t delay_time_us;
  90. size_t repeat_count;
  91. } block_task_arg_t;
  92. static void IRAM_ATTR timer_isr(void* varg) {
  93. block_task_arg_t* arg = (block_task_arg_t*) varg;
  94. TIMERG0.int_clr_timers.t0 = 1;
  95. TIMERG0.hw_timer[0].config.alarm_en = 1;
  96. ets_delay_us(arg->delay_time_us);
  97. arg->repeat_count++;
  98. }
  99. static void read_task(void* varg) {
  100. read_task_arg_t* arg = (read_task_arg_t*) varg;
  101. for (size_t i = 0; i < arg->repeat_count; ++i) {
  102. ESP_ERROR_CHECK( spi_flash_read(arg->flash_addr, arg->buf, arg->buf_size) );
  103. }
  104. xSemaphoreGive(arg->done);
  105. vTaskDelay(1);
  106. vTaskDelete(NULL);
  107. }
  108. TEST_CASE("spi flash functions can run along with IRAM interrupts", "[spi_flash]")
  109. {
  110. const size_t size = 128;
  111. read_task_arg_t read_arg = {
  112. .buf_size = size,
  113. .buf = (uint8_t*) malloc(size),
  114. .flash_addr = 0,
  115. .repeat_count = 1000,
  116. .done = xSemaphoreCreateBinary()
  117. };
  118. timer_config_t config = {
  119. .alarm_en = true,
  120. .counter_en = false,
  121. .intr_type = TIMER_INTR_LEVEL,
  122. .counter_dir = TIMER_COUNT_UP,
  123. .auto_reload = true,
  124. .divider = 80
  125. };
  126. block_task_arg_t block_arg = {
  127. .repeat_count = 0,
  128. .delay_time_us = 100
  129. };
  130. ESP_ERROR_CHECK( timer_init(TIMER_GROUP_0, TIMER_0, &config) );
  131. timer_pause(TIMER_GROUP_0, TIMER_0);
  132. ESP_ERROR_CHECK( timer_set_alarm_value(TIMER_GROUP_0, TIMER_0, 120) );
  133. intr_handle_t handle;
  134. ESP_ERROR_CHECK( timer_isr_register(TIMER_GROUP_0, TIMER_0, &timer_isr, &block_arg, ESP_INTR_FLAG_IRAM, &handle) );
  135. timer_set_counter_value(TIMER_GROUP_0, TIMER_0, 0);
  136. timer_enable_intr(TIMER_GROUP_0, TIMER_0);
  137. timer_start(TIMER_GROUP_0, TIMER_0);
  138. xTaskCreatePinnedToCore(read_task, "r", 2048, &read_arg, 3, NULL, 1);
  139. xSemaphoreTake(read_arg.done, portMAX_DELAY);
  140. timer_pause(TIMER_GROUP_0, TIMER_0);
  141. timer_disable_intr(TIMER_GROUP_0, TIMER_0);
  142. esp_intr_free(handle);
  143. vSemaphoreDelete(read_arg.done);
  144. free(read_arg.buf);
  145. }