spi_flash.rst 3.9 KB

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  1. .. include:: ../../../components/spi_flash/README.rst
  2. See also
  3. --------
  4. - :doc:`Partition Table documentation </partition-tables>`
  5. - :doc:`Over The Air Update (OTA) API </api/system/ota>` provides high-level API for updating app firmware stored in flash.
  6. - :doc:`Non-Volatile Storage (NVS) API <nvs_flash>` provides a structured API for storing small items of data in SPI flash.
  7. API Reference
  8. -------------
  9. Header Files
  10. ^^^^^^^^^^^^
  11. * :component_file:`spi_flash/include/esp_spi_flash.h`
  12. * :component_file:`spi_flash/include/esp_partition.h`
  13. * :component_file:`bootloader_support/include/esp_flash_encrypt.h`
  14. Macros
  15. ^^^^^^
  16. .. doxygendefine:: ESP_ERR_FLASH_BASE
  17. .. doxygendefine:: ESP_ERR_FLASH_OP_FAIL
  18. .. doxygendefine:: ESP_ERR_FLASH_OP_TIMEOUT
  19. .. doxygendefine:: SPI_FLASH_SEC_SIZE
  20. .. doxygendefine:: SPI_FLASH_MMU_PAGE_SIZE
  21. .. doxygendefine:: ESP_PARTITION_SUBTYPE_OTA
  22. .. doxygendefine:: SPI_FLASH_CACHE2PHYS_FAIL
  23. Type Definitions
  24. ^^^^^^^^^^^^^^^^
  25. .. doxygentypedef:: spi_flash_mmap_handle_t
  26. .. doxygentypedef:: esp_partition_iterator_t
  27. Enumerations
  28. ^^^^^^^^^^^^
  29. .. doxygenenum:: spi_flash_mmap_memory_t
  30. .. doxygenenum:: esp_partition_type_t
  31. .. doxygenenum:: esp_partition_subtype_t
  32. Structures
  33. ^^^^^^^^^^
  34. .. doxygenstruct:: esp_partition_t
  35. Functions
  36. ^^^^^^^^^
  37. .. doxygenfunction:: spi_flash_init
  38. .. doxygenfunction:: spi_flash_get_chip_size
  39. .. doxygenfunction:: spi_flash_erase_sector
  40. .. doxygenfunction:: spi_flash_erase_range
  41. .. doxygenfunction:: spi_flash_write
  42. .. doxygenfunction:: spi_flash_write_encrypted
  43. .. doxygenfunction:: spi_flash_read
  44. .. doxygenfunction:: spi_flash_read_encrypted
  45. .. doxygenfunction:: spi_flash_mmap
  46. .. doxygenfunction:: spi_flash_munmap
  47. .. doxygenfunction:: spi_flash_mmap_dump
  48. .. doxygenfunction:: spi_flash_cache2phys
  49. .. doxygenfunction:: spi_flash_phys2cache
  50. .. doxygenfunction:: spi_flash_cache_enabled
  51. .. doxygenfunction:: esp_partition_find
  52. .. doxygenfunction:: esp_partition_find_first
  53. .. doxygenfunction:: esp_partition_get
  54. .. doxygenfunction:: esp_partition_next
  55. .. doxygenfunction:: esp_partition_iterator_release
  56. .. doxygenfunction:: esp_partition_read
  57. .. doxygenfunction:: esp_partition_write
  58. .. doxygenfunction:: esp_partition_erase_range
  59. .. doxygenfunction:: esp_partition_mmap
  60. .. doxygenfunction:: esp_flash_encryption_enabled
  61. .. _spi-flash-implementation-details:
  62. Implementation details
  63. ----------------------
  64. In order to perform some flash operations, we need to make sure both CPUs
  65. are not running any code from flash for the duration of the flash operation.
  66. In a single-core setup this is easy: we disable interrupts/scheduler and do
  67. the flash operation. In the dual-core setup this is slightly more complicated.
  68. We need to make sure that the other CPU doesn't run any code from flash.
  69. When SPI flash API is called on CPU A (can be PRO or APP), we start
  70. spi_flash_op_block_func function on CPU B using esp_ipc_call API. This API
  71. wakes up high priority task on CPU B and tells it to execute given function,
  72. in this case spi_flash_op_block_func. This function disables cache on CPU B and
  73. signals that cache is disabled by setting s_flash_op_can_start flag.
  74. Then the task on CPU A disables cache as well, and proceeds to execute flash
  75. operation.
  76. While flash operation is running, interrupts can still run on CPUs A and B.
  77. We assume that all interrupt code is placed into RAM. Once interrupt allocation
  78. API is added, we should add a flag to request interrupt to be disabled for
  79. the duration of flash operations.
  80. Once flash operation is complete, function on CPU A sets another flag,
  81. s_flash_op_complete, to let the task on CPU B know that it can re-enable
  82. cache and release the CPU. Then the function on CPU A re-enables the cache on
  83. CPU A as well and returns control to the calling code.
  84. Additionally, all API functions are protected with a mutex (s_flash_op_mutex).
  85. In a single core environment (CONFIG_FREERTOS_UNICORE enabled), we simply
  86. disable both caches, no inter-CPU communication takes place.