cpu_start.c 7.8 KB

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  1. // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. // http://www.apache.org/licenses/LICENSE-2.0
  7. //
  8. // Unless required by applicable law or agreed to in writing, software
  9. // distributed under the License is distributed on an "AS IS" BASIS,
  10. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  11. // See the License for the specific language governing permissions and
  12. // limitations under the License.
  13. #include <stdint.h>
  14. #include <string.h>
  15. #include "esp_attr.h"
  16. #include "esp_err.h"
  17. #include "rom/ets_sys.h"
  18. #include "rom/uart.h"
  19. #include "rom/rtc.h"
  20. #include "rom/cache.h"
  21. #include "soc/cpu.h"
  22. #include "soc/dport_reg.h"
  23. #include "soc/io_mux_reg.h"
  24. #include "soc/rtc_cntl_reg.h"
  25. #include "freertos/FreeRTOS.h"
  26. #include "freertos/task.h"
  27. #include "freertos/semphr.h"
  28. #include "freertos/queue.h"
  29. #include "freertos/portmacro.h"
  30. #include "tcpip_adapter.h"
  31. #include "heap_alloc_caps.h"
  32. #include "sdkconfig.h"
  33. #include "esp_system.h"
  34. #include "esp_spi_flash.h"
  35. #include "nvs_flash.h"
  36. #include "esp_event.h"
  37. #include "esp_spi_flash.h"
  38. #include "esp_ipc.h"
  39. #include "esp_crosscore_int.h"
  40. #include "esp_log.h"
  41. #include "esp_vfs_dev.h"
  42. #include "esp_newlib.h"
  43. #include "esp_brownout.h"
  44. #include "esp_int_wdt.h"
  45. #include "esp_task_wdt.h"
  46. #include "esp_phy_init.h"
  47. #include "trax.h"
  48. void start_cpu0(void) __attribute__((weak, alias("start_cpu0_default")));
  49. void start_cpu0_default(void) IRAM_ATTR;
  50. #if !CONFIG_FREERTOS_UNICORE
  51. static void IRAM_ATTR call_start_cpu1();
  52. void start_cpu1(void) __attribute__((weak, alias("start_cpu1_default")));
  53. void start_cpu1_default(void) IRAM_ATTR;
  54. static bool app_cpu_started = false;
  55. #endif //!CONFIG_FREERTOS_UNICORE
  56. static void do_global_ctors(void);
  57. static void do_phy_init();
  58. static void main_task(void* args);
  59. extern void app_main(void);
  60. extern int _bss_start;
  61. extern int _bss_end;
  62. extern int _rtc_bss_start;
  63. extern int _rtc_bss_end;
  64. extern int _init_start;
  65. extern void (*__init_array_start)(void);
  66. extern void (*__init_array_end)(void);
  67. extern volatile int port_xSchedulerRunning[2];
  68. static const char* TAG = "cpu_start";
  69. /*
  70. * We arrive here after the bootloader finished loading the program from flash. The hardware is mostly uninitialized,
  71. * and the app CPU is in reset. We do have a stack, so we can do the initialization in C.
  72. */
  73. void IRAM_ATTR call_start_cpu0()
  74. {
  75. //Kill wdt
  76. REG_CLR_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN);
  77. REG_CLR_BIT(0x6001f048, BIT(14)); //DR_REG_BB_BASE+48
  78. cpu_configure_region_protection();
  79. //Move exception vectors to IRAM
  80. asm volatile (\
  81. "wsr %0, vecbase\n" \
  82. ::"r"(&_init_start));
  83. uartAttach();
  84. ets_install_uart_printf();
  85. memset(&_bss_start, 0, (&_bss_end - &_bss_start) * sizeof(_bss_start));
  86. /* Unless waking from deep sleep (implying RTC memory is intact), clear RTC bss */
  87. if (rtc_get_reset_reason(0) != DEEPSLEEP_RESET) {
  88. memset(&_rtc_bss_start, 0, (&_rtc_bss_end - &_rtc_bss_start) * sizeof(_rtc_bss_start));
  89. }
  90. // Initialize heap allocator
  91. heap_alloc_caps_init();
  92. ESP_EARLY_LOGI(TAG, "Pro cpu up.");
  93. #if !CONFIG_FREERTOS_UNICORE
  94. ESP_EARLY_LOGI(TAG, "Starting app cpu, entry point is %p", call_start_cpu1);
  95. //Flush and enable icache for APP CPU
  96. Cache_Flush(1);
  97. Cache_Read_Enable(1);
  98. //Un-stall the app cpu; the panic handler may have stalled it.
  99. CLEAR_PERI_REG_MASK(RTC_CNTL_SW_CPU_STALL_REG, RTC_CNTL_SW_STALL_APPCPU_C1_M);
  100. CLEAR_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_STALL_APPCPU_C0_M);
  101. //Enable clock gating and reset the app cpu.
  102. SET_PERI_REG_MASK(DPORT_APPCPU_CTRL_B_REG, DPORT_APPCPU_CLKGATE_EN);
  103. CLEAR_PERI_REG_MASK(DPORT_APPCPU_CTRL_C_REG, DPORT_APPCPU_RUNSTALL);
  104. SET_PERI_REG_MASK(DPORT_APPCPU_CTRL_A_REG, DPORT_APPCPU_RESETTING);
  105. CLEAR_PERI_REG_MASK(DPORT_APPCPU_CTRL_A_REG, DPORT_APPCPU_RESETTING);
  106. ets_set_appcpu_boot_addr((uint32_t)call_start_cpu1);
  107. while (!app_cpu_started) {
  108. ets_delay_us(100);
  109. }
  110. #else
  111. ESP_EARLY_LOGI(TAG, "Single core mode");
  112. CLEAR_PERI_REG_MASK(DPORT_APPCPU_CTRL_B_REG, DPORT_APPCPU_CLKGATE_EN);
  113. #endif
  114. ESP_EARLY_LOGI(TAG, "Pro cpu start user code");
  115. start_cpu0();
  116. }
  117. #if !CONFIG_FREERTOS_UNICORE
  118. void IRAM_ATTR call_start_cpu1()
  119. {
  120. asm volatile (\
  121. "wsr %0, vecbase\n" \
  122. ::"r"(&_init_start));
  123. cpu_configure_region_protection();
  124. ESP_EARLY_LOGI(TAG, "App cpu up.");
  125. app_cpu_started = 1;
  126. start_cpu1();
  127. }
  128. #endif //!CONFIG_FREERTOS_UNICORE
  129. void start_cpu0_default(void)
  130. {
  131. //Enable trace memory and immediately start trace.
  132. #if CONFIG_MEMMAP_TRACEMEM
  133. #if CONFIG_MEMMAP_TRACEMEM_TWOBANKS
  134. trax_enable(TRAX_ENA_PRO_APP);
  135. #else
  136. trax_enable(TRAX_ENA_PRO);
  137. #endif
  138. trax_start_trace(TRAX_DOWNCOUNT_WORDS);
  139. #endif
  140. esp_set_cpu_freq(); // set CPU frequency configured in menuconfig
  141. uart_div_modify(0, (APB_CLK_FREQ << 4) / 115200);
  142. #if CONFIG_BROWNOUT_DET
  143. esp_brownout_init();
  144. #endif
  145. #if CONFIG_INT_WDT
  146. esp_int_wdt_init();
  147. #endif
  148. #if CONFIG_TASK_WDT
  149. esp_task_wdt_init();
  150. #endif
  151. esp_setup_syscall_table();
  152. esp_setup_time_syscalls();
  153. esp_vfs_dev_uart_register();
  154. esp_reent_init(_GLOBAL_REENT);
  155. const char* default_uart_dev = "/dev/uart/0";
  156. _GLOBAL_REENT->_stdin = fopen(default_uart_dev, "r");
  157. _GLOBAL_REENT->_stdout = fopen(default_uart_dev, "w");
  158. _GLOBAL_REENT->_stderr = fopen(default_uart_dev, "w");
  159. do_global_ctors();
  160. #if !CONFIG_FREERTOS_UNICORE
  161. esp_crosscore_int_init();
  162. #endif
  163. esp_ipc_init();
  164. spi_flash_init();
  165. #if CONFIG_ESP32_PHY_AUTO_INIT
  166. nvs_flash_init();
  167. do_phy_init();
  168. #endif
  169. xTaskCreatePinnedToCore(&main_task, "main",
  170. ESP_TASK_MAIN_STACK, NULL,
  171. ESP_TASK_MAIN_PRIO, NULL, 0);
  172. ESP_LOGI(TAG, "Starting scheduler on PRO CPU.");
  173. vTaskStartScheduler();
  174. }
  175. #if !CONFIG_FREERTOS_UNICORE
  176. void start_cpu1_default(void)
  177. {
  178. #if CONFIG_MEMMAP_TRACEMEM_TWOBANKS
  179. trax_start_trace(TRAX_DOWNCOUNT_WORDS);
  180. #endif
  181. // Wait for FreeRTOS initialization to finish on PRO CPU
  182. while (port_xSchedulerRunning[0] == 0) {
  183. ;
  184. }
  185. esp_crosscore_int_init();
  186. ESP_LOGI(TAG, "Starting scheduler on APP CPU.");
  187. xPortStartScheduler();
  188. }
  189. #endif //!CONFIG_FREERTOS_UNICORE
  190. static void do_global_ctors(void)
  191. {
  192. void (**p)(void);
  193. for (p = &__init_array_end - 1; p >= &__init_array_start; --p) {
  194. (*p)();
  195. }
  196. }
  197. static void main_task(void* args)
  198. {
  199. app_main();
  200. vTaskDelete(NULL);
  201. }
  202. static void do_phy_init()
  203. {
  204. esp_phy_calibration_mode_t calibration_mode = PHY_RF_CAL_PARTIAL;
  205. if (rtc_get_reset_reason(0) == DEEPSLEEP_RESET) {
  206. calibration_mode = PHY_RF_CAL_NONE;
  207. }
  208. const esp_phy_init_data_t* init_data = esp_phy_get_init_data();
  209. if (init_data == NULL) {
  210. ESP_LOGE(TAG, "failed to obtain PHY init data");
  211. abort();
  212. }
  213. esp_phy_calibration_data_t* cal_data =
  214. (esp_phy_calibration_data_t*) calloc(sizeof(esp_phy_calibration_data_t), 1);
  215. if (cal_data == NULL) {
  216. ESP_LOGE(TAG, "failed to allocate memory for RF calibration data");
  217. abort();
  218. }
  219. esp_err_t err = esp_phy_load_cal_data_from_nvs(cal_data);
  220. if (err != ESP_OK) {
  221. ESP_LOGW(TAG, "failed to load RF calibration data, falling back to full calibration");
  222. calibration_mode = PHY_RF_CAL_FULL;
  223. }
  224. esp_phy_init(init_data, calibration_mode, cal_data);
  225. if (calibration_mode != PHY_RF_CAL_NONE) {
  226. err = esp_phy_store_cal_data_to_nvs(cal_data);
  227. } else {
  228. err = ESP_OK;
  229. }
  230. esp_phy_release_init_data(init_data);
  231. free(cal_data); // PHY maintains a copy of calibration data, so we can free this
  232. }