bootloader_console.c 4.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112
  1. // Copyright 2020 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. //
  7. // http://www.apache.org/licenses/LICENSE-2.0
  8. //
  9. // Unless required by applicable law or agreed to in writing, software
  10. // distributed under the License is distributed on an "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. // See the License for the specific language governing permissions and
  13. // limitations under the License.
  14. #include "sdkconfig.h"
  15. #include "bootloader_console.h"
  16. #include "soc/uart_periph.h"
  17. #include "soc/uart_channel.h"
  18. #include "soc/io_mux_reg.h"
  19. #include "soc/gpio_periph.h"
  20. #include "soc/gpio_sig_map.h"
  21. #include "soc/rtc.h"
  22. #include "hal/clk_gate_ll.h"
  23. #if CONFIG_IDF_TARGET_ESP32S2
  24. #include "esp32s2/rom/usb/cdc_acm.h"
  25. #include "esp32s2/rom/usb/usb_common.h"
  26. #elif CONFIG_IDF_TARGET_ESP32C3
  27. #include "esp32c3/rom/ets_sys.h"
  28. #endif
  29. #include "esp_rom_gpio.h"
  30. #include "esp_rom_uart.h"
  31. #include "esp_rom_sys.h"
  32. #include "esp_rom_caps.h"
  33. #ifdef CONFIG_ESP_CONSOLE_UART_NONE
  34. void bootloader_console_init(void)
  35. {
  36. esp_rom_install_channel_putc(1, NULL);
  37. esp_rom_install_channel_putc(2, NULL);
  38. }
  39. #endif // CONFIG_ESP_CONSOLE_UART_NONE
  40. #ifdef CONFIG_ESP_CONSOLE_UART
  41. void bootloader_console_init(void)
  42. {
  43. const int uart_num = CONFIG_ESP_CONSOLE_UART_NUM;
  44. #if !ESP_ROM_SUPPORT_MULTIPLE_UART
  45. /* esp_rom_install_channel_put is not available unless multiple UARTs are supported */
  46. esp_rom_install_uart_printf();
  47. #else
  48. esp_rom_install_channel_putc(1, esp_rom_uart_putc);
  49. #endif
  50. // Wait for UART FIFO to be empty.
  51. esp_rom_uart_tx_wait_idle(0);
  52. #if CONFIG_ESP_CONSOLE_UART_CUSTOM
  53. // Some constants to make the following code less upper-case
  54. const int uart_tx_gpio = CONFIG_ESP_CONSOLE_UART_TX_GPIO;
  55. const int uart_rx_gpio = CONFIG_ESP_CONSOLE_UART_RX_GPIO;
  56. // Switch to the new UART (this just changes UART number used for esp_rom_printf in ROM code).
  57. #if ESP_ROM_SUPPORT_MULTIPLE_UART
  58. esp_rom_uart_set_as_console(uart_num);
  59. #endif
  60. // If console is attached to UART1 or if non-default pins are used,
  61. // need to reconfigure pins using GPIO matrix
  62. if (uart_num != 0 ||
  63. uart_tx_gpio != UART_NUM_0_TXD_DIRECT_GPIO_NUM ||
  64. uart_rx_gpio != UART_NUM_0_RXD_DIRECT_GPIO_NUM) {
  65. // Change default UART pins back to GPIOs
  66. PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, PIN_FUNC_GPIO);
  67. PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, PIN_FUNC_GPIO);
  68. // Route GPIO signals to/from pins
  69. const uint32_t tx_idx = uart_periph_signal[uart_num].tx_sig;
  70. const uint32_t rx_idx = uart_periph_signal[uart_num].rx_sig;
  71. PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[uart_rx_gpio]);
  72. esp_rom_gpio_pad_pullup_only(uart_rx_gpio);
  73. esp_rom_gpio_connect_out_signal(uart_tx_gpio, tx_idx, 0, 0);
  74. esp_rom_gpio_connect_in_signal(uart_rx_gpio, rx_idx, 0);
  75. // Enable the peripheral
  76. periph_ll_enable_clk_clear_rst(PERIPH_UART0_MODULE + uart_num);
  77. }
  78. #endif // CONFIG_ESP_CONSOLE_UART_CUSTOM
  79. // Set configured UART console baud rate
  80. uint32_t clock_hz = rtc_clk_apb_freq_get();
  81. #if ESP_ROM_UART_CLK_IS_XTAL
  82. clock_hz = UART_CLK_FREQ_ROM; // From esp32-s3 on, UART clock source is selected to XTAL in ROM
  83. #endif
  84. esp_rom_uart_set_clock_baudrate(uart_num, clock_hz, CONFIG_ESP_CONSOLE_UART_BAUDRATE);
  85. }
  86. #endif // CONFIG_ESP_CONSOLE_UART
  87. #ifdef CONFIG_ESP_CONSOLE_USB_CDC
  88. /* Buffer for CDC data structures. No RX buffer allocated. */
  89. static char s_usb_cdc_buf[ESP_ROM_CDC_ACM_WORK_BUF_MIN];
  90. void bootloader_console_init(void)
  91. {
  92. #ifdef CONFIG_IDF_TARGET_ESP32S2
  93. /* ESP32-S2 specific patch to set the correct serial number in the descriptor.
  94. * Later chips don't need this.
  95. */
  96. rom_usb_cdc_set_descriptor_patch();
  97. #endif
  98. esp_rom_uart_usb_acm_init(s_usb_cdc_buf, sizeof(s_usb_cdc_buf));
  99. esp_rom_uart_set_as_console(ESP_ROM_UART_USB);
  100. esp_rom_install_channel_putc(1, bootloader_console_write_char_usb);
  101. }
  102. #endif //CONFIG_ESP_CONSOLE_USB_CDC