core_dump.c 20 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564
  1. // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. // http://www.apache.org/licenses/LICENSE-2.0
  7. //
  8. // Unless required by applicable law or agreed to in writing, software
  9. // distributed under the License is distributed on an "AS IS" BASIS,
  10. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  11. // See the License for the specific language governing permissions and
  12. // limitations under the License.
  13. #include <string.h>
  14. #include "freertos/FreeRTOS.h"
  15. #include "freertos/task.h"
  16. #include "soc/uart_reg.h"
  17. #include "soc/io_mux_reg.h"
  18. #include "soc/timer_group_struct.h"
  19. #include "soc/timer_group_reg.h"
  20. #include "driver/gpio.h"
  21. #include "rom/crc.h"
  22. #include "esp_panic.h"
  23. #include "esp_partition.h"
  24. #include "esp_clk.h"
  25. #if CONFIG_ESP32_ENABLE_COREDUMP
  26. #define LOG_LOCAL_LEVEL CONFIG_ESP32_CORE_DUMP_LOG_LEVEL
  27. #include "esp_log.h"
  28. const static DRAM_ATTR char TAG[] = "esp_core_dump";
  29. #define ESP_COREDUMP_LOG( level, format, ... ) if (LOG_LOCAL_LEVEL >= level) { ets_printf(DRAM_STR(format), esp_log_early_timestamp(), (const char *)TAG, ##__VA_ARGS__); }
  30. #define ESP_COREDUMP_LOGE( format, ... ) ESP_COREDUMP_LOG(ESP_LOG_ERROR, LOG_FORMAT(E, format), ##__VA_ARGS__)
  31. #define ESP_COREDUMP_LOGW( format, ... ) ESP_COREDUMP_LOG(ESP_LOG_WARN, LOG_FORMAT(W, format), ##__VA_ARGS__)
  32. #define ESP_COREDUMP_LOGI( format, ... ) ESP_COREDUMP_LOG(ESP_LOG_INFO, LOG_FORMAT(I, format), ##__VA_ARGS__)
  33. #define ESP_COREDUMP_LOGD( format, ... ) ESP_COREDUMP_LOG(ESP_LOG_DEBUG, LOG_FORMAT(D, format), ##__VA_ARGS__)
  34. #define ESP_COREDUMP_LOGV( format, ... ) ESP_COREDUMP_LOG(ESP_LOG_VERBOSE, LOG_FORMAT(V, format), ##__VA_ARGS__)
  35. #if CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH
  36. #define ESP_COREDUMP_LOG_PROCESS( format, ... ) ESP_COREDUMP_LOGD(format, ##__VA_ARGS__)
  37. #else
  38. #define ESP_COREDUMP_LOG_PROCESS( format, ... ) do{/*(__VA_ARGS__);*/}while(0)
  39. #endif
  40. // TODO: allow user to set this in menuconfig or get tasks iteratively
  41. #define COREDUMP_MAX_TASKS_NUM 32
  42. #define COREDUMP_MAX_TASK_STACK_SIZE (64*1024)
  43. typedef esp_err_t (*esp_core_dump_write_prepare_t)(void *priv, uint32_t *data_len);
  44. typedef esp_err_t (*esp_core_dump_write_start_t)(void *priv);
  45. typedef esp_err_t (*esp_core_dump_write_end_t)(void *priv);
  46. typedef esp_err_t (*esp_core_dump_flash_write_data_t)(void *priv, void * data, uint32_t data_len);
  47. /** core dump emitter control structure */
  48. typedef struct _core_dump_write_config_t
  49. {
  50. // this function is called before core dump data writing
  51. // used for sanity checks
  52. esp_core_dump_write_prepare_t prepare;
  53. // this function is called at the beginning of data writing
  54. esp_core_dump_write_start_t start;
  55. // this function is called when all dump data are written
  56. esp_core_dump_write_end_t end;
  57. // this function is called to write data chunk
  58. esp_core_dump_flash_write_data_t write;
  59. // number of tasks with corrupted TCBs
  60. uint32_t bad_tasks_num;
  61. // pointer to data which are specific for particular core dump emitter
  62. void * priv;
  63. } core_dump_write_config_t;
  64. /** core dump data header */
  65. typedef struct _core_dump_header_t
  66. {
  67. uint32_t data_len; // data length
  68. uint32_t tasks_num; // number of tasks
  69. uint32_t tcb_sz; // size of TCB
  70. } core_dump_header_t;
  71. /** core dump task data header */
  72. typedef struct _core_dump_task_header_t
  73. {
  74. void * tcb_addr; // TCB address
  75. uint32_t stack_start; // stack start address
  76. uint32_t stack_end; // stack end address
  77. } core_dump_task_header_t;
  78. static inline bool esp_task_stack_start_is_sane(uint32_t sp)
  79. {
  80. return !(sp < 0x3ffae010UL || sp > 0x3fffffffUL);
  81. }
  82. static inline bool esp_tcb_addr_is_sane(uint32_t addr, uint32_t sz)
  83. {
  84. //TODO: currently core dump supports TCBs in DRAM only, external SRAM not supported yet
  85. return !(addr < 0x3ffae000UL || (addr + sz) > 0x40000000UL);
  86. }
  87. static void esp_core_dump_write(XtExcFrame *frame, core_dump_write_config_t *write_cfg)
  88. {
  89. int cur_task_bad = 0;
  90. esp_err_t err;
  91. TaskSnapshot_t tasks[COREDUMP_MAX_TASKS_NUM];
  92. UBaseType_t tcb_sz, tcb_sz_padded, task_num;
  93. uint32_t data_len = 0, i, len;
  94. union
  95. {
  96. core_dump_header_t hdr;
  97. core_dump_task_header_t task_hdr;
  98. } dump_data;
  99. task_num = uxTaskGetSnapshotAll(tasks, COREDUMP_MAX_TASKS_NUM, &tcb_sz);
  100. // take TCB padding into account, actual TCB size will be stored in header
  101. if (tcb_sz % sizeof(uint32_t))
  102. tcb_sz_padded = (tcb_sz / sizeof(uint32_t) + 1) * sizeof(uint32_t);
  103. else
  104. tcb_sz_padded = tcb_sz;
  105. // header + tasknum*(tcb + stack start/end + tcb addr)
  106. data_len = sizeof(core_dump_header_t) + task_num*(tcb_sz_padded + sizeof(core_dump_task_header_t));
  107. for (i = 0; i < task_num; i++) {
  108. if (!esp_tcb_addr_is_sane((uint32_t)tasks[i].pxTCB, tcb_sz)) {
  109. ESP_COREDUMP_LOG_PROCESS("Bad TCB addr %x!", tasks[i].pxTCB);
  110. write_cfg->bad_tasks_num++;
  111. continue;
  112. }
  113. if (tasks[i].pxTCB == xTaskGetCurrentTaskHandleForCPU(xPortGetCoreID())) {
  114. // set correct stack top for current task
  115. tasks[i].pxTopOfStack = (StackType_t *)frame;
  116. ESP_COREDUMP_LOG_PROCESS("Current task EXIT/PC/PS/A0/SP %x %x %x %x %x",
  117. frame->exit, frame->pc, frame->ps, frame->a0, frame->a1);
  118. }
  119. else {
  120. XtSolFrame *task_frame = (XtSolFrame *)tasks[i].pxTopOfStack;
  121. if (task_frame->exit == 0) {
  122. ESP_COREDUMP_LOG_PROCESS("Task EXIT/PC/PS/A0/SP %x %x %x %x %x",
  123. task_frame->exit, task_frame->pc, task_frame->ps, task_frame->a0, task_frame->a1);
  124. }
  125. else {
  126. #if CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH
  127. XtExcFrame *task_frame2 = (XtExcFrame *)tasks[i].pxTopOfStack;
  128. #endif
  129. ESP_COREDUMP_LOG_PROCESS("Task EXIT/PC/PS/A0/SP %x %x %x %x %x",
  130. task_frame2->exit, task_frame2->pc, task_frame2->ps, task_frame2->a0, task_frame2->a1);
  131. }
  132. }
  133. len = (uint32_t)tasks[i].pxEndOfStack - (uint32_t)tasks[i].pxTopOfStack;
  134. // check task's stack
  135. if (!esp_stack_ptr_is_sane((uint32_t)tasks[i].pxTopOfStack) || !esp_task_stack_start_is_sane((uint32_t)tasks[i].pxEndOfStack)
  136. || len > COREDUMP_MAX_TASK_STACK_SIZE) {
  137. if (tasks[i].pxTCB == xTaskGetCurrentTaskHandleForCPU(xPortGetCoreID())) {
  138. cur_task_bad = 1;
  139. }
  140. ESP_COREDUMP_LOG_PROCESS("Corrupted TCB %x: stack len %lu, top %x, end %x!",
  141. tasks[i].pxTCB, len, tasks[i].pxTopOfStack, tasks[i].pxEndOfStack);
  142. tasks[i].pxTCB = 0; // make TCB addr invalid to skip it in dump
  143. write_cfg->bad_tasks_num++;
  144. } else {
  145. ESP_COREDUMP_LOG_PROCESS("Stack len = %lu (%x %x)", len, tasks[i].pxTopOfStack, tasks[i].pxEndOfStack);
  146. // take stack padding into account
  147. len = (len + sizeof(uint32_t) - 1) & ~(sizeof(uint32_t) - 1);
  148. data_len += len;
  149. }
  150. }
  151. data_len -= write_cfg->bad_tasks_num*(tcb_sz_padded + sizeof(core_dump_task_header_t));
  152. ESP_COREDUMP_LOG_PROCESS("Core dump len = %lu (%d %d)", data_len, task_num, write_cfg->bad_tasks_num);
  153. // prepare write
  154. if (write_cfg->prepare) {
  155. err = write_cfg->prepare(write_cfg->priv, &data_len);
  156. if (err != ESP_OK) {
  157. ESP_COREDUMP_LOGE("Failed to prepare core dump (%d)!", err);
  158. return;
  159. }
  160. }
  161. // write start
  162. if (write_cfg->start) {
  163. err = write_cfg->start(write_cfg->priv);
  164. if (err != ESP_OK) {
  165. ESP_COREDUMP_LOGE("Failed to start core dump (%d)!", err);
  166. return;
  167. }
  168. }
  169. // write header
  170. dump_data.hdr.data_len = data_len;
  171. dump_data.hdr.tasks_num = task_num - write_cfg->bad_tasks_num;
  172. dump_data.hdr.tcb_sz = tcb_sz;
  173. err = write_cfg->write(write_cfg->priv, &dump_data, sizeof(core_dump_header_t));
  174. if (err != ESP_OK) {
  175. ESP_COREDUMP_LOGE("Failed to write core dump header (%d)!", err);
  176. return;
  177. }
  178. // write tasks
  179. for (i = 0; i < task_num; i++) {
  180. if (!esp_tcb_addr_is_sane((uint32_t)tasks[i].pxTCB, tcb_sz)) {
  181. ESP_COREDUMP_LOG_PROCESS("Skip TCB with bad addr %x!", tasks[i].pxTCB);
  182. continue;
  183. }
  184. ESP_COREDUMP_LOG_PROCESS("Dump task %x", tasks[i].pxTCB);
  185. // save TCB address, stack base and stack top addr
  186. dump_data.task_hdr.tcb_addr = tasks[i].pxTCB;
  187. dump_data.task_hdr.stack_start = (uint32_t)tasks[i].pxTopOfStack;
  188. dump_data.task_hdr.stack_end = (uint32_t)tasks[i].pxEndOfStack;
  189. err = write_cfg->write(write_cfg->priv, &dump_data, sizeof(core_dump_task_header_t));
  190. if (err != ESP_OK) {
  191. ESP_COREDUMP_LOGE("Failed to write task header (%d)!", err);
  192. return;
  193. }
  194. // save TCB
  195. err = write_cfg->write(write_cfg->priv, tasks[i].pxTCB, tcb_sz);
  196. if (err != ESP_OK) {
  197. ESP_COREDUMP_LOGE("Failed to write TCB (%d)!", err);
  198. return;
  199. }
  200. // save task stack
  201. if (tasks[i].pxTopOfStack != 0 && tasks[i].pxEndOfStack != 0) {
  202. err = write_cfg->write(write_cfg->priv, tasks[i].pxTopOfStack,
  203. (uint32_t)tasks[i].pxEndOfStack - (uint32_t)tasks[i].pxTopOfStack);
  204. if (err != ESP_OK) {
  205. ESP_COREDUMP_LOGE("Failed to write task stack (%d)!", err);
  206. return;
  207. }
  208. } else {
  209. ESP_COREDUMP_LOG_PROCESS("Skip corrupted task %x stack!", tasks[i].pxTCB);
  210. }
  211. }
  212. // write end
  213. if (write_cfg->end) {
  214. err = write_cfg->end(write_cfg->priv);
  215. if (err != ESP_OK) {
  216. ESP_COREDUMP_LOGE("Failed to end core dump (%d)!", err);
  217. return;
  218. }
  219. }
  220. if (write_cfg->bad_tasks_num) {
  221. ESP_COREDUMP_LOGE("Skipped %d tasks with bad TCB!", write_cfg->bad_tasks_num);
  222. if (cur_task_bad) {
  223. ESP_COREDUMP_LOGE("Crashed task has been skipped!");
  224. }
  225. }
  226. }
  227. #if CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH
  228. // magic numbers to control core dump data consistency
  229. #define COREDUMP_FLASH_MAGIC_START 0xE32C04EDUL
  230. #define COREDUMP_FLASH_MAGIC_END 0xE32C04EDUL
  231. typedef struct _core_dump_write_flash_data_t
  232. {
  233. uint32_t off;
  234. } core_dump_write_flash_data_t;
  235. typedef struct _core_dump_partition_t
  236. {
  237. // core dump partition start
  238. uint32_t start;
  239. // core dump partition size
  240. uint32_t size;
  241. } core_dump_partition_t;
  242. typedef struct _core_dump_flash_config_t
  243. {
  244. // core dump partition start
  245. core_dump_partition_t partition;
  246. // core dump partition size
  247. uint32_t crc;
  248. } core_dump_flash_config_t;
  249. // core dump flash data
  250. static core_dump_flash_config_t s_core_flash_config;
  251. static uint32_t esp_core_dump_write_flash_padded(size_t off, uint8_t *data, uint32_t data_size)
  252. {
  253. esp_err_t err;
  254. uint32_t data_len = 0, k, len;
  255. union
  256. {
  257. uint8_t data8[4];
  258. uint32_t data32;
  259. } rom_data;
  260. data_len = (data_size / sizeof(uint32_t)) * sizeof(uint32_t);
  261. assert(off >= s_core_flash_config.partition.start);
  262. assert((off + data_len + (data_size % sizeof(uint32_t) ? sizeof(uint32_t) : 0)) <=
  263. s_core_flash_config.partition.start + s_core_flash_config.partition.size);
  264. err = spi_flash_write(off, data, data_len);
  265. if (err != ESP_OK) {
  266. ESP_COREDUMP_LOGE("Failed to write data to flash (%d)!", err);
  267. return 0;
  268. }
  269. len = data_size % sizeof(uint32_t);
  270. if (len) {
  271. // write last bytes with padding, actual TCB len can be retrieved by esptool from core dump header
  272. rom_data.data32 = 0;
  273. for (k = 0; k < len; k++)
  274. rom_data.data8[k] = *(data + data_len + k);
  275. err = spi_flash_write(off + data_len, &rom_data, sizeof(uint32_t));
  276. if (err != ESP_OK) {
  277. ESP_COREDUMP_LOGE("Failed to finish write data to flash (%d)!", err);
  278. return 0;
  279. }
  280. data_len += sizeof(uint32_t);
  281. }
  282. return data_len;
  283. }
  284. static esp_err_t esp_core_dump_flash_write_prepare(void *priv, uint32_t *data_len)
  285. {
  286. esp_err_t err;
  287. uint32_t sec_num;
  288. core_dump_write_flash_data_t *wr_data = (core_dump_write_flash_data_t *)priv;
  289. // check for available space in partition
  290. // add space for 2 magics. TODO: change to CRC
  291. if ((*data_len + 2*sizeof(uint32_t)) > s_core_flash_config.partition.size) {
  292. ESP_COREDUMP_LOGE("Not enough space to save core dump!");
  293. return ESP_ERR_NO_MEM;
  294. }
  295. *data_len += 2*sizeof(uint32_t);
  296. wr_data->off = 0;
  297. sec_num = *data_len / SPI_FLASH_SEC_SIZE;
  298. if (*data_len % SPI_FLASH_SEC_SIZE)
  299. sec_num++;
  300. assert(sec_num * SPI_FLASH_SEC_SIZE <= s_core_flash_config.partition.size);
  301. err = spi_flash_erase_range(s_core_flash_config.partition.start + 0, sec_num * SPI_FLASH_SEC_SIZE);
  302. if (err != ESP_OK) {
  303. ESP_COREDUMP_LOGE("Failed to erase flash (%d)!", err);
  304. return err;
  305. }
  306. return err;
  307. }
  308. static esp_err_t esp_core_dump_flash_write_word(core_dump_write_flash_data_t *wr_data, uint32_t word)
  309. {
  310. esp_err_t err = ESP_OK;
  311. uint32_t data32 = word;
  312. assert(wr_data->off + sizeof(uint32_t) <= s_core_flash_config.partition.size);
  313. err = spi_flash_write(s_core_flash_config.partition.start + wr_data->off, &data32, sizeof(uint32_t));
  314. if (err != ESP_OK) {
  315. ESP_COREDUMP_LOGE("Failed to write to flash (%d)!", err);
  316. return err;
  317. }
  318. wr_data->off += sizeof(uint32_t);
  319. return err;
  320. }
  321. static esp_err_t esp_core_dump_flash_write_start(void *priv)
  322. {
  323. core_dump_write_flash_data_t *wr_data = (core_dump_write_flash_data_t *)priv;
  324. // save magic 1
  325. return esp_core_dump_flash_write_word(wr_data, COREDUMP_FLASH_MAGIC_START);
  326. }
  327. static esp_err_t esp_core_dump_flash_write_end(void *priv)
  328. {
  329. core_dump_write_flash_data_t *wr_data = (core_dump_write_flash_data_t *)priv;
  330. #if LOG_LOCAL_LEVEL >= ESP_LOG_DEBUG
  331. union
  332. {
  333. uint8_t data8[16];
  334. uint32_t data32[4];
  335. } rom_data;
  336. esp_err_t err = spi_flash_read(s_core_flash_config.partition.start + 0, &rom_data, sizeof(rom_data));
  337. if (err != ESP_OK) {
  338. ESP_COREDUMP_LOGE("Failed to read flash (%d)!", err);
  339. return err;
  340. }
  341. else {
  342. ESP_COREDUMP_LOG_PROCESS("Data from flash:");
  343. for (uint32_t i = 0; i < sizeof(rom_data)/sizeof(rom_data.data32[0]); i++) {
  344. ESP_COREDUMP_LOG_PROCESS("%x", rom_data.data32[i]);
  345. }
  346. }
  347. #endif
  348. // save magic 2
  349. return esp_core_dump_flash_write_word(wr_data, COREDUMP_FLASH_MAGIC_END);
  350. }
  351. static esp_err_t esp_core_dump_flash_write_data(void *priv, void * data, uint32_t data_len)
  352. {
  353. esp_err_t err = ESP_OK;
  354. core_dump_write_flash_data_t *wr_data = (core_dump_write_flash_data_t *)priv;
  355. uint32_t len = esp_core_dump_write_flash_padded(s_core_flash_config.partition.start + wr_data->off, data, data_len);
  356. if (len != data_len)
  357. return ESP_FAIL;
  358. wr_data->off += len;
  359. return err;
  360. }
  361. void esp_core_dump_to_flash(XtExcFrame *frame)
  362. {
  363. core_dump_write_config_t wr_cfg;
  364. core_dump_write_flash_data_t wr_data;
  365. uint32_t crc = crc32_le(UINT32_MAX, (uint8_t const *)&s_core_flash_config.partition,
  366. sizeof(s_core_flash_config.partition));
  367. if (s_core_flash_config.crc != crc) {
  368. ESP_COREDUMP_LOGE("Core dump flash config is corrupted! CRC=0x%x instead of 0x%x", crc, s_core_flash_config.crc);
  369. return;
  370. }
  371. /* init non-OS flash access critical section */
  372. spi_flash_guard_set(&g_flash_guard_no_os_ops);
  373. memset(&wr_cfg, 0, sizeof(wr_cfg));
  374. wr_cfg.prepare = esp_core_dump_flash_write_prepare;
  375. wr_cfg.start = esp_core_dump_flash_write_start;
  376. wr_cfg.end = esp_core_dump_flash_write_end;
  377. wr_cfg.write = esp_core_dump_flash_write_data;
  378. wr_cfg.priv = &wr_data;
  379. ESP_COREDUMP_LOGI("Save core dump to flash...");
  380. esp_core_dump_write(frame, &wr_cfg);
  381. ESP_COREDUMP_LOGI("Core dump has been saved to flash.");
  382. }
  383. #endif
  384. #if CONFIG_ESP32_ENABLE_COREDUMP_TO_UART
  385. static void esp_core_dump_b64_encode(const uint8_t *src, uint32_t src_len, uint8_t *dst) {
  386. const static DRAM_ATTR char b64[] =
  387. "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789+/";
  388. int i, j, a, b, c;
  389. for (i = j = 0; i < src_len; i += 3) {
  390. a = src[i];
  391. b = i + 1 >= src_len ? 0 : src[i + 1];
  392. c = i + 2 >= src_len ? 0 : src[i + 2];
  393. dst[j++] = b64[a >> 2];
  394. dst[j++] = b64[((a & 3) << 4) | (b >> 4)];
  395. if (i + 1 < src_len) {
  396. dst[j++] = b64[(b & 0x0F) << 2 | (c >> 6)];
  397. }
  398. if (i + 2 < src_len) {
  399. dst[j++] = b64[c & 0x3F];
  400. }
  401. }
  402. while (j % 4 != 0) {
  403. dst[j++] = '=';
  404. }
  405. dst[j++] = '\0';
  406. }
  407. static esp_err_t esp_core_dump_uart_write_start(void *priv)
  408. {
  409. esp_err_t err = ESP_OK;
  410. ets_printf(DRAM_STR("================= CORE DUMP START =================\r\n"));
  411. return err;
  412. }
  413. static esp_err_t esp_core_dump_uart_write_end(void *priv)
  414. {
  415. esp_err_t err = ESP_OK;
  416. ets_printf(DRAM_STR("================= CORE DUMP END =================\r\n"));
  417. return err;
  418. }
  419. static esp_err_t esp_core_dump_uart_write_data(void *priv, void * data, uint32_t data_len)
  420. {
  421. esp_err_t err = ESP_OK;
  422. char buf[64 + 4], *addr = data;
  423. char *end = addr + data_len;
  424. while (addr < end) {
  425. size_t len = end - addr;
  426. if (len > 48) len = 48;
  427. /* Copy to stack to avoid alignment restrictions. */
  428. char *tmp = buf + (sizeof(buf) - len);
  429. memcpy(tmp, addr, len);
  430. esp_core_dump_b64_encode((const uint8_t *)tmp, len, (uint8_t *)buf);
  431. addr += len;
  432. ets_printf(DRAM_STR("%s\r\n"), buf);
  433. }
  434. return err;
  435. }
  436. static int esp_core_dump_uart_get_char() {
  437. int i;
  438. uint32_t reg = (READ_PERI_REG(UART_STATUS_REG(0)) >> UART_RXFIFO_CNT_S) & UART_RXFIFO_CNT;
  439. if (reg)
  440. i = READ_PERI_REG(UART_FIFO_REG(0));
  441. else
  442. i = -1;
  443. return i;
  444. }
  445. void esp_core_dump_to_uart(XtExcFrame *frame)
  446. {
  447. core_dump_write_config_t wr_cfg;
  448. uint32_t tm_end, tm_cur;
  449. int ch;
  450. memset(&wr_cfg, 0, sizeof(wr_cfg));
  451. wr_cfg.prepare = NULL;
  452. wr_cfg.start = esp_core_dump_uart_write_start;
  453. wr_cfg.end = esp_core_dump_uart_write_end;
  454. wr_cfg.write = esp_core_dump_uart_write_data;
  455. wr_cfg.priv = NULL;
  456. //Make sure txd/rxd are enabled
  457. // use direct reg access instead of gpio_pullup_dis which can cause exception when flash cache is disabled
  458. REG_CLR_BIT(GPIO_PIN_REG_1, FUN_PU);
  459. PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD_U0RXD);
  460. PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD_U0TXD);
  461. ESP_COREDUMP_LOGI("Press Enter to print core dump to UART...");
  462. const int cpu_ticks_per_ms = esp_clk_cpu_freq() / 1000;
  463. tm_end = xthal_get_ccount() / cpu_ticks_per_ms + CONFIG_ESP32_CORE_DUMP_UART_DELAY;
  464. ch = esp_core_dump_uart_get_char();
  465. while (!(ch == '\n' || ch == '\r')) {
  466. tm_cur = xthal_get_ccount() / cpu_ticks_per_ms;
  467. if (tm_cur >= tm_end)
  468. break;
  469. ch = esp_core_dump_uart_get_char();
  470. }
  471. ESP_COREDUMP_LOGI("Print core dump to uart...");
  472. esp_core_dump_write(frame, &wr_cfg);
  473. ESP_COREDUMP_LOGI("Core dump has been written to uart.");
  474. }
  475. #endif
  476. void esp_core_dump_init()
  477. {
  478. #if CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH
  479. const esp_partition_t *core_part;
  480. ESP_COREDUMP_LOGI("Init core dump to flash");
  481. core_part = esp_partition_find_first(ESP_PARTITION_TYPE_DATA, ESP_PARTITION_SUBTYPE_DATA_COREDUMP, NULL);
  482. if (!core_part) {
  483. ESP_COREDUMP_LOGE("No core dump partition found!");
  484. return;
  485. }
  486. ESP_COREDUMP_LOGI("Found partition '%s' @ %x %d bytes", core_part->label, core_part->address, core_part->size);
  487. s_core_flash_config.partition.start = core_part->address;
  488. s_core_flash_config.partition.size = core_part->size;
  489. s_core_flash_config.crc = crc32_le(UINT32_MAX, (uint8_t const *)&s_core_flash_config.partition,
  490. sizeof(s_core_flash_config.partition));
  491. #endif
  492. #if CONFIG_ESP32_ENABLE_COREDUMP_TO_UART
  493. ESP_COREDUMP_LOGI("Init core dump to UART");
  494. #endif
  495. }
  496. #endif