flash_encryption_secure_features.c 2.3 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include <strings.h>
  7. #include "esp_flash_encrypt.h"
  8. #include "esp_secure_boot.h"
  9. #include "esp_efuse.h"
  10. #include "esp_efuse_table.h"
  11. #include "esp_log.h"
  12. #include "sdkconfig.h"
  13. static __attribute__((unused)) const char *TAG = "flash_encrypt";
  14. esp_err_t esp_flash_encryption_enable_secure_features(void)
  15. {
  16. #ifndef CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC
  17. ESP_LOGI(TAG, "Disable UART bootloader encryption...");
  18. esp_efuse_write_field_bit(ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT);
  19. #else
  20. ESP_LOGW(TAG, "Not disabling UART bootloader encryption");
  21. #endif
  22. #ifndef CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE
  23. ESP_LOGI(TAG, "Disable UART bootloader cache...");
  24. esp_efuse_write_field_bit(ESP_EFUSE_DIS_DOWNLOAD_DCACHE);
  25. esp_efuse_write_field_bit(ESP_EFUSE_DIS_DOWNLOAD_ICACHE);
  26. #else
  27. ESP_LOGW(TAG, "Not disabling UART bootloader cache - SECURITY COMPROMISED");
  28. #endif
  29. #ifndef CONFIG_SECURE_BOOT_ALLOW_JTAG
  30. ESP_LOGI(TAG, "Disable JTAG...");
  31. esp_efuse_write_field_bit(ESP_EFUSE_HARD_DIS_JTAG);
  32. esp_efuse_write_field_bit(ESP_EFUSE_DIS_USB_JTAG);
  33. #else
  34. ESP_LOGW(TAG, "Not disabling JTAG - SECURITY COMPROMISED");
  35. #endif
  36. esp_efuse_write_field_bit(ESP_EFUSE_DIS_DIRECT_BOOT);
  37. #if defined(CONFIG_SECURE_BOOT_V2_ENABLED) && !defined(CONFIG_SECURE_BOOT_V2_ALLOW_EFUSE_RD_DIS)
  38. // This bit is set when enabling Secure Boot V2, but we can't enable it until this later point in the first boot
  39. // otherwise the Flash Encryption key cannot be read protected
  40. esp_efuse_write_field_bit(ESP_EFUSE_WR_DIS_RD_DIS);
  41. #endif
  42. #ifdef CONFIG_SECURE_FLASH_ENCRYPTION_MODE_RELEASE
  43. // Set write-protection for DIS_ICACHE and DIS_DCACHE to prevent bricking chip in case it will be set accidentally.
  44. // esp32s3 has DIS_ICACHE and DIS_DCACHE. Write-protection bit = 2 for both.
  45. // List of eFuses with the same write protection bit:
  46. // DIS_ICACHE, DIS_DCACHE, DIS_DOWNLOAD_ICACHE, DIS_DOWNLOAD_DCACHE,
  47. // DIS_FORCE_DOWNLOAD, DIS_USB_OTG, DIS_TWAI, DIS_APP_CPU, DIS_PAD_JTAG,
  48. // DIS_DOWNLOAD_MANUAL_ENCRYPT, DIS_USB_JTAG, DIS_USB_SERIAL_JTAG, STRAP_JTAG_SEL, USB_PHY_SEL.
  49. esp_efuse_write_field_bit(ESP_EFUSE_WR_DIS_DIS_ICACHE);
  50. #endif
  51. return ESP_OK;
  52. }