test_i2s.c 19 KB

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  1. /**
  2. * I2S test environment UT_T1_I2S:
  3. * We use internal signals instead of external wiring, but please keep the following IO connections, or connect nothing to prevent the signal from being disturbed.
  4. * connect GPIO15 and GPIO19, GPIO25(ESP32)/GPIO17(ESP32-S2) and GPIO26, GPIO21 and GPIO22(ESP32)/GPIO20(ESP32-S2)
  5. * Please do not connect GPIO32(ESP32) any pull-up resistors externally, it will be used to test i2s adc function.
  6. */
  7. #include <stdio.h>
  8. #include <string.h>
  9. #include "freertos/FreeRTOS.h"
  10. #include "freertos/task.h"
  11. #include "driver/i2s.h"
  12. #include "driver/gpio.h"
  13. #include "unity.h"
  14. #include "math.h"
  15. #define SAMPLE_RATE (36000)
  16. #define SAMPLE_BITS (16)
  17. #define MASTER_BCK_IO 15
  18. #define SLAVE_BCK_IO 19
  19. #define SLAVE_WS_IO 26
  20. #define DATA_IN_IO 21
  21. #if CONFIG_IDF_TARGET_ESP32
  22. #define MASTER_WS_IO 25
  23. #define DATA_OUT_IO 22
  24. #define ADC1_CHANNEL_4_IO 32
  25. #elif CONFIG_IDF_TARGET_ESP32S2
  26. #define MASTER_WS_IO 28
  27. #define DATA_OUT_IO 20
  28. #endif
  29. #define PERCENT_DIFF 0.0001
  30. #define I2S_TEST_MODE_SLAVE_TO_MAXTER 0
  31. #define I2S_TEST_MODE_MASTER_TO_SLAVE 1
  32. #define I2S_TEST_MODE_LOOPBACK 2
  33. // mode: 0, master rx, slave tx. mode: 1, master tx, slave rx. mode: 2, master tx rx loopback
  34. // Since ESP32-S2 has only one I2S, only loop back test can be tested.
  35. static void i2s_test_io_config(int mode)
  36. {
  37. // Connect internal signals using IO matrix.
  38. PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[MASTER_BCK_IO], PIN_FUNC_GPIO);
  39. PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[MASTER_WS_IO], PIN_FUNC_GPIO);
  40. PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[DATA_OUT_IO], PIN_FUNC_GPIO);
  41. gpio_set_direction(MASTER_BCK_IO, GPIO_MODE_INPUT_OUTPUT);
  42. gpio_set_direction(MASTER_WS_IO, GPIO_MODE_INPUT_OUTPUT);
  43. gpio_set_direction(DATA_OUT_IO, GPIO_MODE_INPUT_OUTPUT);
  44. switch (mode) {
  45. #if SOC_I2S_NUM > 1
  46. case I2S_TEST_MODE_SLAVE_TO_MAXTER: {
  47. gpio_matrix_out(MASTER_BCK_IO, I2S0I_BCK_OUT_IDX, 0, 0);
  48. gpio_matrix_in(MASTER_BCK_IO, I2S1O_BCK_IN_IDX, 0);
  49. gpio_matrix_out(MASTER_WS_IO, I2S0I_WS_OUT_IDX, 0, 0);
  50. gpio_matrix_in(MASTER_WS_IO, I2S1O_WS_IN_IDX, 0);
  51. gpio_matrix_out(DATA_OUT_IO, I2S1O_DATA_OUT23_IDX, 0, 0);
  52. gpio_matrix_in(DATA_OUT_IO, I2S0I_DATA_IN15_IDX, 0);
  53. }
  54. break;
  55. case I2S_TEST_MODE_MASTER_TO_SLAVE: {
  56. gpio_matrix_out(MASTER_BCK_IO, I2S0O_BCK_OUT_IDX, 0, 0);
  57. gpio_matrix_in(MASTER_BCK_IO, I2S1I_BCK_IN_IDX, 0);
  58. gpio_matrix_out(MASTER_WS_IO, I2S0O_WS_OUT_IDX, 0, 0);
  59. gpio_matrix_in(MASTER_WS_IO, I2S1I_WS_IN_IDX, 0);
  60. gpio_matrix_out(DATA_OUT_IO, I2S0O_DATA_OUT23_IDX, 0, 0);
  61. gpio_matrix_in(DATA_OUT_IO, I2S1I_DATA_IN15_IDX, 0);
  62. }
  63. break;
  64. #endif
  65. case I2S_TEST_MODE_LOOPBACK: {
  66. gpio_matrix_out(DATA_OUT_IO, I2S0O_DATA_OUT23_IDX, 0, 0);
  67. gpio_matrix_in(DATA_OUT_IO, I2S0I_DATA_IN15_IDX, 0);
  68. }
  69. break;
  70. default: {
  71. TEST_FAIL_MESSAGE("error: mode not supported");
  72. }
  73. break;
  74. }
  75. }
  76. /**
  77. * i2s initialize test
  78. * 1. i2s_driver_install
  79. * 2. i2s_set_pin
  80. */
  81. TEST_CASE("I2S basic driver install, uninstall, set pin test", "[i2s]")
  82. {
  83. // dac, adc i2s
  84. i2s_config_t i2s_config = {
  85. .mode = I2S_MODE_MASTER | I2S_MODE_TX,
  86. .sample_rate = SAMPLE_RATE,
  87. .bits_per_sample = SAMPLE_BITS,
  88. .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
  89. .communication_format = I2S_COMM_FORMAT_I2S | I2S_COMM_FORMAT_I2S_MSB,
  90. .dma_buf_count = 6,
  91. .dma_buf_len = 60,
  92. .use_apll = 0,
  93. .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
  94. };
  95. #if CONFIG_IDF_TARGET_ESP32
  96. //install and start i2s driver
  97. TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
  98. //for internal DAC, this will enable both of the internal channels
  99. TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, NULL));
  100. //stop & destroy i2s driver
  101. TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
  102. #endif
  103. // normal i2s
  104. i2s_pin_config_t pin_config = {
  105. .bck_io_num = MASTER_BCK_IO,
  106. .ws_io_num = MASTER_WS_IO,
  107. .data_out_num = DATA_OUT_IO,
  108. .data_in_num = -1
  109. };
  110. TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
  111. TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &pin_config));
  112. TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
  113. //error param test
  114. TEST_ASSERT(i2s_driver_install(I2S_NUM_MAX, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG);
  115. TEST_ASSERT(i2s_driver_install(I2S_NUM_0, NULL, 0, NULL) == ESP_ERR_INVALID_ARG);
  116. i2s_config.dma_buf_count = 1;
  117. TEST_ASSERT(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG);
  118. i2s_config.dma_buf_count = 129;
  119. TEST_ASSERT(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG);
  120. TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
  121. }
  122. TEST_CASE("I2S Loopback test(master tx and rx)", "[i2s]")
  123. {
  124. // master driver installed and send data
  125. i2s_config_t master_i2s_config = {
  126. .mode = I2S_MODE_MASTER | I2S_MODE_TX | I2S_MODE_RX,
  127. .sample_rate = SAMPLE_RATE,
  128. .bits_per_sample = SAMPLE_BITS,
  129. .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
  130. .communication_format = I2S_COMM_FORMAT_I2S | I2S_COMM_FORMAT_I2S_MSB,
  131. .dma_buf_count = 6,
  132. .dma_buf_len = 100,
  133. .use_apll = 0,
  134. .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
  135. };
  136. i2s_pin_config_t master_pin_config = {
  137. .bck_io_num = MASTER_BCK_IO,
  138. .ws_io_num = MASTER_WS_IO,
  139. .data_out_num = DATA_OUT_IO,
  140. .data_in_num = DATA_IN_IO
  141. };
  142. TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
  143. TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
  144. i2s_test_io_config(I2S_TEST_MODE_LOOPBACK);
  145. printf("\r\nheap size: %d\n", esp_get_free_heap_size());
  146. uint8_t* data_wr = (uint8_t*)malloc(sizeof(uint8_t)*400);
  147. size_t i2s_bytes_write = 0;
  148. size_t bytes_read = 0;
  149. int length = 0;
  150. uint8_t *i2s_read_buff = (uint8_t*)malloc(sizeof(uint8_t)*10000);
  151. for(int i=0; i<100; i++) {
  152. data_wr[i] = i+1;
  153. }
  154. int flag=0; // break loop flag
  155. int end_position = 0;
  156. // write data to slave
  157. i2s_write(I2S_NUM_0, data_wr, sizeof(uint8_t)*400, &i2s_bytes_write, 1000 / portTICK_PERIOD_MS);
  158. while(!flag){
  159. if (length >= 10000 - 500) {
  160. break;
  161. }
  162. i2s_read(I2S_NUM_0, i2s_read_buff + length, sizeof(uint8_t)*500, &bytes_read, 1000/portMAX_DELAY);
  163. if(bytes_read>0) {
  164. printf("read data size: %d\n", bytes_read);
  165. for(int i=length; i<length + bytes_read; i++) {
  166. if(i2s_read_buff[i] == 100) {
  167. flag=1;
  168. end_position = i;
  169. break;
  170. }
  171. }
  172. }
  173. length = length + bytes_read;
  174. }
  175. // test the read data right or not
  176. for(int i=end_position-99; i<=end_position; i++) {
  177. TEST_ASSERT_EQUAL_UINT8((i-end_position+100), *(i2s_read_buff + i));
  178. }
  179. free(data_wr);
  180. free(i2s_read_buff);
  181. i2s_driver_uninstall(I2S_NUM_0);
  182. }
  183. #if !DISABLED_FOR_TARGETS(ESP32S2)
  184. /* ESP32S2 has only single I2S port and hence following test cases are not applicable */
  185. TEST_CASE("I2S adc test", "[i2s]")
  186. {
  187. // init I2S ADC
  188. i2s_config_t i2s_config = {
  189. .mode = I2S_MODE_MASTER | I2S_MODE_RX | I2S_MODE_ADC_BUILT_IN,
  190. .sample_rate = SAMPLE_RATE,
  191. .bits_per_sample = SAMPLE_BITS,
  192. .communication_format = I2S_COMM_FORMAT_PCM,
  193. .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
  194. .intr_alloc_flags = 0,
  195. .dma_buf_count = 2,
  196. .dma_buf_len = 1024,
  197. .use_apll = 0,
  198. };
  199. // install and start I2S driver
  200. i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL);
  201. // init ADC pad
  202. i2s_set_adc_mode(ADC_UNIT_1, ADC1_CHANNEL_4);
  203. // enable adc sampling, ADC_WIDTH_BIT_12, ADC_ATTEN_DB_11 hard-coded in adc_i2s_mode_init
  204. i2s_adc_enable(I2S_NUM_0);
  205. // init read buffer
  206. uint16_t* i2sReadBuffer = (uint16_t*)calloc(1024, sizeof(uint16_t));
  207. size_t bytesRead;
  208. for (int loop = 0; loop < 10; loop++) {
  209. for (int level = 0; level <= 1; level++) {
  210. if (level == 0) {
  211. gpio_set_pull_mode(ADC1_CHANNEL_4_IO, GPIO_PULLDOWN_ONLY);
  212. } else {
  213. gpio_set_pull_mode(ADC1_CHANNEL_4_IO, GPIO_PULLUP_ONLY);
  214. }
  215. vTaskDelay(200 / portTICK_RATE_MS);
  216. // read data from adc, will block until buffer is full
  217. i2s_read(I2S_NUM_0, (void*)i2sReadBuffer, 1024 * sizeof(uint16_t), &bytesRead, portMAX_DELAY);
  218. // calc average
  219. int64_t adcSumValue = 0;
  220. for (size_t i = 0; i < 1024; i++) {
  221. adcSumValue += i2sReadBuffer[i] & 0xfff;
  222. }
  223. int adcAvgValue = adcSumValue / 1024;
  224. printf("adc average val: %d\n", adcAvgValue);
  225. if (level == 0) {
  226. TEST_ASSERT_LESS_THAN(100, adcAvgValue);
  227. } else {
  228. TEST_ASSERT_GREATER_THAN(4000, adcAvgValue);
  229. }
  230. }
  231. }
  232. i2s_adc_disable(I2S_NUM_0);
  233. free(i2sReadBuffer);
  234. i2s_driver_uninstall(I2S_NUM_0);
  235. }
  236. TEST_CASE("I2S write and read test(master tx and slave rx)", "[i2s]")
  237. {
  238. // master driver installed and send data
  239. i2s_config_t master_i2s_config = {
  240. .mode = I2S_MODE_MASTER | I2S_MODE_TX,
  241. .sample_rate = SAMPLE_RATE,
  242. .bits_per_sample = SAMPLE_BITS,
  243. .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
  244. .communication_format = I2S_COMM_FORMAT_I2S | I2S_COMM_FORMAT_I2S_MSB,
  245. .dma_buf_count = 6,
  246. .dma_buf_len = 100,
  247. .use_apll = 0,
  248. .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
  249. };
  250. i2s_pin_config_t master_pin_config = {
  251. .bck_io_num = MASTER_BCK_IO,
  252. .ws_io_num = MASTER_WS_IO,
  253. .data_out_num = DATA_OUT_IO,
  254. .data_in_num = -1
  255. };
  256. TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
  257. TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
  258. i2s_test_io_config(I2S_TEST_MODE_MASTER_TO_SLAVE);
  259. printf("\r\nheap size: %d\n", esp_get_free_heap_size());
  260. i2s_config_t slave_i2s_config = {
  261. .mode = I2S_MODE_SLAVE | I2S_MODE_RX,
  262. .sample_rate = SAMPLE_RATE,
  263. .bits_per_sample = SAMPLE_BITS,
  264. .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
  265. .communication_format = I2S_COMM_FORMAT_I2S | I2S_COMM_FORMAT_I2S_MSB,
  266. .dma_buf_count = 6,
  267. .dma_buf_len = 100,
  268. .use_apll = 0,
  269. .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
  270. };
  271. i2s_pin_config_t slave_pin_config = {
  272. .bck_io_num = SLAVE_BCK_IO,
  273. .ws_io_num = SLAVE_WS_IO,
  274. .data_out_num = -1,
  275. .data_in_num = DATA_IN_IO,
  276. };
  277. // slave driver installed and receive data
  278. TEST_ESP_OK(i2s_driver_install(I2S_NUM_1, &slave_i2s_config, 0, NULL));
  279. TEST_ESP_OK(i2s_set_pin(I2S_NUM_1, &slave_pin_config));
  280. i2s_test_io_config(I2S_TEST_MODE_MASTER_TO_SLAVE);
  281. printf("\r\nheap size: %d\n", esp_get_free_heap_size());
  282. uint8_t* data_wr = (uint8_t*)malloc(sizeof(uint8_t)*400);
  283. size_t i2s_bytes_write = 0;
  284. size_t bytes_read = 0;
  285. int length = 0;
  286. uint8_t *i2s_read_buff = (uint8_t*)malloc(sizeof(uint8_t)*10000);
  287. for(int i=0; i<100; i++) {
  288. data_wr[i] = i+1;
  289. }
  290. int flag=0; // break loop flag
  291. int end_position = 0;
  292. // write data to slave
  293. i2s_write(I2S_NUM_0, data_wr, sizeof(uint8_t)*400, &i2s_bytes_write, 1000 / portTICK_PERIOD_MS);
  294. while(!flag){
  295. i2s_read(I2S_NUM_1, i2s_read_buff + length, sizeof(uint8_t)*500, &bytes_read, 1000/portMAX_DELAY);
  296. if(bytes_read>0) {
  297. printf("read data size: %d\n", bytes_read);
  298. for(int i=length; i<length + bytes_read; i++) {
  299. if(i2s_read_buff[i] == 100) {
  300. flag=1;
  301. end_position = i;
  302. break;
  303. }
  304. }
  305. }
  306. length = length + bytes_read;
  307. }
  308. // test the readed data right or not
  309. for(int i=end_position-99; i<=end_position; i++) {
  310. TEST_ASSERT_EQUAL_UINT8((i-end_position+100), *(i2s_read_buff + i));
  311. }
  312. free(data_wr);
  313. free(i2s_read_buff);
  314. i2s_driver_uninstall(I2S_NUM_0);
  315. i2s_driver_uninstall(I2S_NUM_1);
  316. }
  317. TEST_CASE("I2S write and read test(master rx and slave tx)", "[i2s]")
  318. {
  319. // master driver installed and send data
  320. i2s_config_t master_i2s_config = {
  321. .mode = I2S_MODE_MASTER | I2S_MODE_RX,
  322. .sample_rate = SAMPLE_RATE,
  323. .bits_per_sample = SAMPLE_BITS,
  324. .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
  325. .communication_format = I2S_COMM_FORMAT_I2S | I2S_COMM_FORMAT_I2S_MSB,
  326. .dma_buf_count = 6,
  327. .dma_buf_len = 100,
  328. .use_apll = 1,
  329. .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
  330. };
  331. i2s_pin_config_t master_pin_config = {
  332. .bck_io_num = MASTER_BCK_IO,
  333. .ws_io_num = MASTER_WS_IO,
  334. .data_out_num = -1,
  335. .data_in_num = DATA_IN_IO,
  336. };
  337. TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
  338. TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
  339. i2s_test_io_config(I2S_TEST_MODE_SLAVE_TO_MAXTER);
  340. printf("\r\nheap size: %d\n", esp_get_free_heap_size());
  341. i2s_config_t slave_i2s_config = {
  342. .mode = I2S_MODE_SLAVE | I2S_MODE_TX, // Only RX
  343. .sample_rate = SAMPLE_RATE,
  344. .bits_per_sample = SAMPLE_BITS,
  345. .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, //2-channels
  346. .communication_format = I2S_COMM_FORMAT_I2S | I2S_COMM_FORMAT_I2S_MSB,
  347. .dma_buf_count = 6,
  348. .dma_buf_len = 100,
  349. .use_apll = 1,
  350. .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
  351. };
  352. i2s_pin_config_t slave_pin_config = {
  353. .bck_io_num = SLAVE_BCK_IO,
  354. .ws_io_num = SLAVE_WS_IO,
  355. .data_out_num = DATA_OUT_IO,
  356. .data_in_num = -1
  357. };
  358. // slave driver installed and receive data
  359. TEST_ESP_OK(i2s_driver_install(I2S_NUM_1, &slave_i2s_config, 0, NULL));
  360. TEST_ESP_OK(i2s_set_pin(I2S_NUM_1, &slave_pin_config));
  361. i2s_test_io_config(I2S_TEST_MODE_SLAVE_TO_MAXTER);
  362. uint8_t* data_wr = (uint8_t*)malloc(sizeof(uint8_t)*400);
  363. size_t i2s_bytes_write = 0;
  364. size_t bytes_read = 0;
  365. int length = 0;
  366. uint8_t *i2s_read_buff = (uint8_t*)malloc(sizeof(uint8_t)*100000);
  367. for(int i=0; i<100; i++) {
  368. data_wr[i] = i+1;
  369. }
  370. // slave write data to master
  371. i2s_write(I2S_NUM_1, data_wr, sizeof(uint8_t)*400, &i2s_bytes_write, 1000 / portTICK_PERIOD_MS);
  372. int flag=0; // break loop flag
  373. int end_position = 0;
  374. // write data to slave
  375. while(!flag){
  376. TEST_ESP_OK(i2s_read(I2S_NUM_0, i2s_read_buff + length, 10000-length, &bytes_read, 1000/portMAX_DELAY));
  377. if(bytes_read > 0) {
  378. for(int i=length; i<length+bytes_read; i++) {
  379. if(i2s_read_buff[i] == 100) {
  380. flag=1;
  381. end_position = i;
  382. break;
  383. }
  384. }
  385. }
  386. length = length + bytes_read;
  387. }
  388. // test the readed data right or not
  389. for(int i=end_position-99; i<=end_position; i++) {
  390. TEST_ASSERT_EQUAL_UINT8((i-end_position+100), *(i2s_read_buff + i));
  391. }
  392. free(data_wr);
  393. free(i2s_read_buff);
  394. i2s_driver_uninstall(I2S_NUM_0);
  395. i2s_driver_uninstall(I2S_NUM_1);
  396. }
  397. #endif
  398. TEST_CASE("I2S memory leaking test", "[i2s]")
  399. {
  400. i2s_config_t master_i2s_config = {
  401. .mode = I2S_MODE_MASTER | I2S_MODE_RX,
  402. .sample_rate = SAMPLE_RATE,
  403. .bits_per_sample = SAMPLE_BITS,
  404. .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
  405. .communication_format = I2S_COMM_FORMAT_I2S | I2S_COMM_FORMAT_I2S_MSB,
  406. .dma_buf_count = 6,
  407. .dma_buf_len = 100,
  408. .use_apll = 0,
  409. .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
  410. };
  411. i2s_pin_config_t master_pin_config = {
  412. .bck_io_num = MASTER_BCK_IO,
  413. .ws_io_num = MASTER_WS_IO,
  414. .data_out_num = -1,
  415. .data_in_num = DATA_IN_IO
  416. };
  417. TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
  418. TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
  419. i2s_driver_uninstall(I2S_NUM_0);
  420. int initial_size = esp_get_free_heap_size();
  421. for(int i=0; i<100; i++) {
  422. TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
  423. TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
  424. i2s_driver_uninstall(I2S_NUM_0);
  425. TEST_ASSERT(initial_size == esp_get_free_heap_size());
  426. }
  427. vTaskDelay(100 / portTICK_PERIOD_MS);
  428. TEST_ASSERT(initial_size == esp_get_free_heap_size());
  429. }
  430. /*
  431. * The I2S APLL clock variation test used to test the difference between the different sample rates, different bits per sample
  432. * and the APLL clock generate for it. The TEST_CASE passes PERCENT_DIFF variation from the provided sample rate in APLL generated clock
  433. * The percentage difference calculated as (mod((obtained clock rate - desired clock rate)/(desired clock rate))) * 100.
  434. */
  435. TEST_CASE("I2S APLL clock variation test", "[i2s]")
  436. {
  437. i2s_pin_config_t pin_config = {
  438. .bck_io_num = MASTER_BCK_IO,
  439. .ws_io_num = MASTER_WS_IO,
  440. .data_out_num = DATA_OUT_IO,
  441. .data_in_num = -1
  442. };
  443. i2s_config_t i2s_config = {
  444. .mode = I2S_MODE_MASTER | I2S_MODE_TX,
  445. .sample_rate = SAMPLE_RATE,
  446. .bits_per_sample = SAMPLE_BITS,
  447. .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
  448. .communication_format = I2S_COMM_FORMAT_I2S,
  449. .dma_buf_count = 6,
  450. .dma_buf_len = 60,
  451. .use_apll = true,
  452. .intr_alloc_flags = 0,
  453. };
  454. TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
  455. TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &pin_config));
  456. TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
  457. int initial_size = esp_get_free_heap_size();
  458. uint32_t sample_rate_arr[8] = { 10675, 11025, 16000, 22050, 32000, 44100, 48000, 96000 };
  459. int bits_per_sample_arr[3] = { 16, 24, 32 };
  460. for (int i = 0; i < (sizeof(sample_rate_arr)/sizeof(sample_rate_arr[0])); i++) {
  461. for (int j = 0; j < (sizeof(bits_per_sample_arr)/sizeof(bits_per_sample_arr[0])); j++) {
  462. i2s_config.sample_rate = sample_rate_arr[i];
  463. i2s_config.bits_per_sample = bits_per_sample_arr[j];
  464. TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
  465. TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &pin_config));
  466. TEST_ASSERT((fabs((i2s_get_clk(I2S_NUM_0) - sample_rate_arr[i]))/(sample_rate_arr[i]))*100 < PERCENT_DIFF);
  467. TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
  468. TEST_ASSERT(initial_size == esp_get_free_heap_size());
  469. }
  470. }
  471. vTaskDelay(100 / portTICK_PERIOD_MS);
  472. TEST_ASSERT(initial_size == esp_get_free_heap_size());
  473. }