stdatomic.c 7.8 KB

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  1. // Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. //
  7. // http://www.apache.org/licenses/LICENSE-2.0
  8. //
  9. // Unless required by applicable law or agreed to in writing, software
  10. // distributed under the License is distributed on an "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. // See the License for the specific language governing permissions and
  13. // limitations under the License.
  14. //replacement for gcc built-in functions
  15. #include "sdkconfig.h"
  16. #include <stdbool.h>
  17. #include <stdint.h>
  18. #ifdef __XTENSA__
  19. #include "xtensa/config/core-isa.h"
  20. #include "xtensa/xtruntime.h"
  21. // This allows nested interrupts disabling and restoring via local registers or stack.
  22. // They can be called from interrupts too.
  23. // WARNING: Only applies to current CPU.
  24. #define _ATOMIC_ENTER_CRITICAL(void) ({ \
  25. unsigned state = XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL); \
  26. atomic_benchmark_intr_disable(); \
  27. state; \
  28. })
  29. #define _ATOMIC_EXIT_CRITICAL(state) do { \
  30. atomic_benchmark_intr_restore(state); \
  31. XTOS_RESTORE_JUST_INTLEVEL(state); \
  32. } while (0)
  33. #ifndef XCHAL_HAVE_S32C1I
  34. #error "XCHAL_HAVE_S32C1I not defined, include correct header!"
  35. #endif
  36. #define NO_ATOMICS_SUPPORT (XCHAL_HAVE_S32C1I == 0)
  37. #else // RISCV
  38. #include "freertos/portmacro.h"
  39. // This allows nested interrupts disabling and restoring via local registers or stack.
  40. // They can be called from interrupts too.
  41. // WARNING: Only applies to current CPU.
  42. #define _ATOMIC_ENTER_CRITICAL(void) ({ \
  43. unsigned state = portENTER_CRITICAL_NESTED(); \
  44. atomic_benchmark_intr_disable(); \
  45. state; \
  46. })
  47. #define _ATOMIC_EXIT_CRITICAL(state) do { \
  48. atomic_benchmark_intr_restore(state); \
  49. portEXIT_CRITICAL_NESTED(state); \
  50. } while (0)
  51. #ifndef __riscv_atomic // GCC toolchain will define this pre-processor if "A" extension is supported
  52. #define __riscv_atomic 0
  53. #endif
  54. #define NO_ATOMICS_SUPPORT (__riscv_atomic == 0)
  55. #endif
  56. //reserved to measure atomic operation time
  57. #define atomic_benchmark_intr_disable()
  58. #define atomic_benchmark_intr_restore(STATE)
  59. #define ATOMIC_EXCHANGE(n, type) type __atomic_exchange_ ## n (type* mem, type val, int memorder) \
  60. { \
  61. unsigned state = _ATOMIC_ENTER_CRITICAL(); \
  62. type ret = *mem; \
  63. *mem = val; \
  64. _ATOMIC_EXIT_CRITICAL(state); \
  65. return ret; \
  66. }
  67. #define CMP_EXCHANGE(n, type) bool __atomic_compare_exchange_ ## n (type* mem, type* expect, type desired, int success, int failure) \
  68. { \
  69. bool ret = false; \
  70. unsigned state = _ATOMIC_ENTER_CRITICAL(); \
  71. if (*mem == *expect) { \
  72. ret = true; \
  73. *mem = desired; \
  74. } else { \
  75. *expect = *mem; \
  76. } \
  77. _ATOMIC_EXIT_CRITICAL(state); \
  78. return ret; \
  79. }
  80. #define FETCH_ADD(n, type) type __atomic_fetch_add_ ## n (type* ptr, type value, int memorder) \
  81. { \
  82. unsigned state = _ATOMIC_ENTER_CRITICAL(); \
  83. type ret = *ptr; \
  84. *ptr = *ptr + value; \
  85. _ATOMIC_EXIT_CRITICAL(state); \
  86. return ret; \
  87. }
  88. #define FETCH_SUB(n, type) type __atomic_fetch_sub_ ## n (type* ptr, type value, int memorder) \
  89. { \
  90. unsigned state = _ATOMIC_ENTER_CRITICAL(); \
  91. type ret = *ptr; \
  92. *ptr = *ptr - value; \
  93. _ATOMIC_EXIT_CRITICAL(state); \
  94. return ret; \
  95. }
  96. #define FETCH_AND(n, type) type __atomic_fetch_and_ ## n (type* ptr, type value, int memorder) \
  97. { \
  98. unsigned state = _ATOMIC_ENTER_CRITICAL(); \
  99. type ret = *ptr; \
  100. *ptr = *ptr & value; \
  101. _ATOMIC_EXIT_CRITICAL(state); \
  102. return ret; \
  103. }
  104. #define FETCH_OR(n, type) type __atomic_fetch_or_ ## n (type* ptr, type value, int memorder) \
  105. { \
  106. unsigned state = _ATOMIC_ENTER_CRITICAL(); \
  107. type ret = *ptr; \
  108. *ptr = *ptr | value; \
  109. _ATOMIC_EXIT_CRITICAL(state); \
  110. return ret; \
  111. }
  112. #define FETCH_XOR(n, type) type __atomic_fetch_xor_ ## n (type* ptr, type value, int memorder) \
  113. { \
  114. unsigned state = _ATOMIC_ENTER_CRITICAL(); \
  115. type ret = *ptr; \
  116. *ptr = *ptr ^ value; \
  117. _ATOMIC_EXIT_CRITICAL(state); \
  118. return ret; \
  119. }
  120. #define SYNC_FETCH_OP(op, n, type) type __sync_fetch_and_ ## op ##_ ## n (type* ptr, type value, ...) \
  121. { \
  122. return __atomic_fetch_ ## op ##_ ## n (ptr, value, __ATOMIC_SEQ_CST); \
  123. }
  124. #define SYNC_BOOL_CMP_EXCHANGE(n, type) bool __sync_bool_compare_and_swap_ ## n (type *ptr, type oldval, type newval, ...) \
  125. { \
  126. bool ret = false; \
  127. unsigned state = _ATOMIC_ENTER_CRITICAL(); \
  128. if (*ptr == oldval) { \
  129. *ptr = newval; \
  130. ret = true; \
  131. } \
  132. _ATOMIC_EXIT_CRITICAL(state); \
  133. return ret; \
  134. }
  135. #define SYNC_VAL_CMP_EXCHANGE(n, type) type __sync_val_compare_and_swap_ ## n (type *ptr, type oldval, type newval, ...) \
  136. { \
  137. unsigned state = _ATOMIC_ENTER_CRITICAL(); \
  138. type ret = *ptr; \
  139. if (*ptr == oldval) { \
  140. *ptr = newval; \
  141. } \
  142. _ATOMIC_EXIT_CRITICAL(state); \
  143. return ret; \
  144. }
  145. #pragma GCC diagnostic ignored "-Wbuiltin-declaration-mismatch"
  146. #if NO_ATOMICS_SUPPORT
  147. ATOMIC_EXCHANGE(1, uint8_t)
  148. ATOMIC_EXCHANGE(2, uint16_t)
  149. ATOMIC_EXCHANGE(4, uint32_t)
  150. ATOMIC_EXCHANGE(8, uint64_t)
  151. CMP_EXCHANGE(1, uint8_t)
  152. CMP_EXCHANGE(2, uint16_t)
  153. CMP_EXCHANGE(4, uint32_t)
  154. CMP_EXCHANGE(8, uint64_t)
  155. FETCH_ADD(1, uint8_t)
  156. FETCH_ADD(2, uint16_t)
  157. FETCH_ADD(4, uint32_t)
  158. FETCH_ADD(8, uint64_t)
  159. FETCH_SUB(1, uint8_t)
  160. FETCH_SUB(2, uint16_t)
  161. FETCH_SUB(4, uint32_t)
  162. FETCH_SUB(8, uint64_t)
  163. FETCH_AND(1, uint8_t)
  164. FETCH_AND(2, uint16_t)
  165. FETCH_AND(4, uint32_t)
  166. FETCH_AND(8, uint64_t)
  167. FETCH_OR(1, uint8_t)
  168. FETCH_OR(2, uint16_t)
  169. FETCH_OR(4, uint32_t)
  170. FETCH_OR(8, uint64_t)
  171. FETCH_XOR(1, uint8_t)
  172. FETCH_XOR(2, uint16_t)
  173. FETCH_XOR(4, uint32_t)
  174. FETCH_XOR(8, uint64_t)
  175. SYNC_FETCH_OP(add, 1, uint8_t)
  176. SYNC_FETCH_OP(add, 2, uint16_t)
  177. SYNC_FETCH_OP(add, 4, uint32_t)
  178. SYNC_FETCH_OP(add, 8, uint64_t)
  179. SYNC_FETCH_OP(sub, 1, uint8_t)
  180. SYNC_FETCH_OP(sub, 2, uint16_t)
  181. SYNC_FETCH_OP(sub, 4, uint32_t)
  182. SYNC_FETCH_OP(sub, 8, uint64_t)
  183. SYNC_FETCH_OP(and, 1, uint8_t)
  184. SYNC_FETCH_OP(and, 2, uint16_t)
  185. SYNC_FETCH_OP(and, 4, uint32_t)
  186. SYNC_FETCH_OP(and, 8, uint64_t)
  187. SYNC_FETCH_OP(or, 1, uint8_t)
  188. SYNC_FETCH_OP(or, 2, uint16_t)
  189. SYNC_FETCH_OP(or, 4, uint32_t)
  190. SYNC_FETCH_OP(or, 8, uint64_t)
  191. SYNC_FETCH_OP(xor, 1, uint8_t)
  192. SYNC_FETCH_OP(xor, 2, uint16_t)
  193. SYNC_FETCH_OP(xor, 4, uint32_t)
  194. SYNC_FETCH_OP(xor, 8, uint64_t)
  195. SYNC_BOOL_CMP_EXCHANGE(1, uint8_t)
  196. SYNC_BOOL_CMP_EXCHANGE(2, uint16_t)
  197. SYNC_BOOL_CMP_EXCHANGE(4, uint32_t)
  198. SYNC_BOOL_CMP_EXCHANGE(8, uint64_t)
  199. SYNC_VAL_CMP_EXCHANGE(1, uint8_t)
  200. SYNC_VAL_CMP_EXCHANGE(2, uint16_t)
  201. SYNC_VAL_CMP_EXCHANGE(4, uint32_t)
  202. SYNC_VAL_CMP_EXCHANGE(8, uint64_t)
  203. #endif