bt.c 54 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include <stddef.h>
  7. #include <stdlib.h>
  8. #include <stdio.h>
  9. #include <string.h>
  10. #include "sdkconfig.h"
  11. #include "esp_heap_caps.h"
  12. #include "esp_heap_caps_init.h"
  13. #include "freertos/FreeRTOS.h"
  14. #include "freertos/task.h"
  15. #include "freertos/queue.h"
  16. #include "freertos/semphr.h"
  17. #include "freertos/portmacro.h"
  18. #include "esp_types.h"
  19. #include "esp_mac.h"
  20. #include "esp_random.h"
  21. #include "esp_task.h"
  22. #include "esp_attr.h"
  23. #include "esp_phy_init.h"
  24. #include "esp_bt.h"
  25. #include "esp_err.h"
  26. #include "esp_log.h"
  27. #include "esp_pm.h"
  28. #include "esp_ipc.h"
  29. #include "esp_private/periph_ctrl.h"
  30. #include "esp_private/esp_clk.h"
  31. #include "soc/soc_caps.h"
  32. #include "soc/rtc.h"
  33. #include "soc/rtc_cntl_reg.h"
  34. #include "soc/soc_memory_layout.h"
  35. #include "esp_coexist_internal.h"
  36. #include "esp_timer.h"
  37. #include "esp_sleep.h"
  38. #include "esp_rom_sys.h"
  39. #include "esp_private/phy.h"
  40. #if CONFIG_IDF_TARGET_ESP32C3
  41. #include "riscv/interrupt.h"
  42. #include "esp32c3/rom/rom_layout.h"
  43. #else //CONFIG_IDF_TARGET_ESP32S3
  44. #include "freertos/xtensa_api.h"
  45. #include "xtensa/core-macros.h"
  46. #include "esp32s3/rom/rom_layout.h"
  47. #endif
  48. #if CONFIG_BT_ENABLED
  49. /* Macro definition
  50. ************************************************************************
  51. */
  52. #define BT_LOG_TAG "BLE_INIT"
  53. #define BTDM_INIT_PERIOD (5000) /* ms */
  54. /* Low Power Clock Selection */
  55. #define BTDM_LPCLK_SEL_XTAL (0)
  56. #define BTDM_LPCLK_SEL_XTAL32K (1)
  57. #define BTDM_LPCLK_SEL_RTC_SLOW (2)
  58. #define BTDM_LPCLK_SEL_8M (3)
  59. // wakeup request sources
  60. enum {
  61. BTDM_ASYNC_WAKEUP_SRC_VHCI = 0,
  62. BTDM_ASYNC_WAKEUP_SRC_DISA,
  63. BTDM_ASYNC_WAKEUP_SRC_TMR,
  64. BTDM_ASYNC_WAKEUP_SRC_MAX,
  65. };
  66. // low power control struct
  67. typedef union {
  68. struct {
  69. uint32_t enable : 1; // whether low power mode is required
  70. uint32_t lpclk_sel : 2; // low power clock source
  71. uint32_t mac_bb_pd : 1; // whether hardware(MAC, BB) force-power-down is required during sleep
  72. uint32_t wakeup_timer_required : 1; // whether system timer is needed
  73. uint32_t no_light_sleep : 1; // do not allow system to enter light sleep after bluetooth is enabled
  74. uint32_t main_xtal_pu : 1; // power up main XTAL
  75. uint32_t reserved : 25; // reserved
  76. };
  77. uint32_t val;
  78. } btdm_lpcntl_t;
  79. // low power control status
  80. typedef union {
  81. struct {
  82. uint32_t pm_lock_released : 1; // whether power management lock is released
  83. uint32_t mac_bb_pd : 1; // whether hardware(MAC, BB) is powered down
  84. uint32_t phy_enabled : 1; // whether phy is switched on
  85. uint32_t wakeup_timer_started : 1; // whether wakeup timer is started
  86. uint32_t reserved : 28; // reserved
  87. };
  88. uint32_t val;
  89. } btdm_lpstat_t;
  90. /* Sleep and wakeup interval control */
  91. #define BTDM_MIN_SLEEP_DURATION (24) // threshold of interval in half slots to allow to fall into modem sleep
  92. #define BTDM_MODEM_WAKE_UP_DELAY (8) // delay in half slots of modem wake up procedure, including re-enable PHY/RF
  93. #define BT_DEBUG(...)
  94. #define BT_API_CALL_CHECK(info, api_call, ret) \
  95. do{\
  96. esp_err_t __err = (api_call);\
  97. if ((ret) != __err) {\
  98. BT_DEBUG("%s %d %s ret=0x%X\n", __FUNCTION__, __LINE__, (info), __err);\
  99. return __err;\
  100. }\
  101. } while(0)
  102. #define OSI_FUNCS_TIME_BLOCKING 0xffffffff
  103. #define OSI_VERSION 0x00010007
  104. #define OSI_MAGIC_VALUE 0xFADEBEAD
  105. /* Types definition
  106. ************************************************************************
  107. */
  108. /* vendor dependent signals to be posted to controller task */
  109. typedef enum {
  110. BTDM_VND_OL_SIG_WAKEUP_TMR = 0,
  111. BTDM_VND_OL_SIG_NUM,
  112. } btdm_vnd_ol_sig_t;
  113. /* prototype of function to handle vendor dependent signals */
  114. typedef void (* btdm_vnd_ol_task_func_t)(void *param);
  115. /* VHCI function interface */
  116. typedef struct vhci_host_callback {
  117. void (*notify_host_send_available)(void); /*!< callback used to notify that the host can send packet to controller */
  118. int (*notify_host_recv)(uint8_t *data, uint16_t len); /*!< callback used to notify that the controller has a packet to send to the host*/
  119. } vhci_host_callback_t;
  120. typedef struct {
  121. void *handle;
  122. } btdm_queue_item_t;
  123. typedef void (* osi_intr_handler)(void);
  124. /* OSI function */
  125. struct osi_funcs_t {
  126. uint32_t _magic;
  127. uint32_t _version;
  128. void (*_interrupt_set)(int cpu_no, int intr_source, int interrupt_no, int interrpt_prio);
  129. void (*_interrupt_clear)(int interrupt_source, int interrupt_no);
  130. void (*_interrupt_handler_set)(int interrupt_no, intr_handler_t fn, void *arg);
  131. void (*_interrupt_disable)(void);
  132. void (*_interrupt_restore)(void);
  133. void (*_task_yield)(void);
  134. void (*_task_yield_from_isr)(void);
  135. void *(*_semphr_create)(uint32_t max, uint32_t init);
  136. void (*_semphr_delete)(void *semphr);
  137. int (*_semphr_take_from_isr)(void *semphr, void *hptw);
  138. int (*_semphr_give_from_isr)(void *semphr, void *hptw);
  139. int (*_semphr_take)(void *semphr, uint32_t block_time_ms);
  140. int (*_semphr_give)(void *semphr);
  141. void *(*_mutex_create)(void);
  142. void (*_mutex_delete)(void *mutex);
  143. int (*_mutex_lock)(void *mutex);
  144. int (*_mutex_unlock)(void *mutex);
  145. void *(* _queue_create)(uint32_t queue_len, uint32_t item_size);
  146. void (* _queue_delete)(void *queue);
  147. int (* _queue_send)(void *queue, void *item, uint32_t block_time_ms);
  148. int (* _queue_send_from_isr)(void *queue, void *item, void *hptw);
  149. int (* _queue_recv)(void *queue, void *item, uint32_t block_time_ms);
  150. int (* _queue_recv_from_isr)(void *queue, void *item, void *hptw);
  151. int (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  152. void (* _task_delete)(void *task_handle);
  153. bool (* _is_in_isr)(void);
  154. int (* _cause_sw_intr_to_core)(int core_id, int intr_no);
  155. void *(* _malloc)(size_t size);
  156. void *(* _malloc_internal)(size_t size);
  157. void (* _free)(void *p);
  158. int (* _read_efuse_mac)(uint8_t mac[6]);
  159. void (* _srand)(unsigned int seed);
  160. int (* _rand)(void);
  161. uint32_t (* _btdm_lpcycles_2_hus)(uint32_t cycles, uint32_t *error_corr);
  162. uint32_t (* _btdm_hus_2_lpcycles)(uint32_t hus);
  163. bool (* _btdm_sleep_check_duration)(int32_t *slot_cnt);
  164. void (* _btdm_sleep_enter_phase1)(uint32_t lpcycles); /* called when interrupt is disabled */
  165. void (* _btdm_sleep_enter_phase2)(void);
  166. void (* _btdm_sleep_exit_phase1)(void); /* called from ISR */
  167. void (* _btdm_sleep_exit_phase2)(void); /* called from ISR */
  168. void (* _btdm_sleep_exit_phase3)(void); /* called from task */
  169. void (* _coex_wifi_sleep_set)(bool sleep);
  170. int (* _coex_core_ble_conn_dyn_prio_get)(bool *low, bool *high);
  171. void (* _coex_schm_status_bit_set)(uint32_t type, uint32_t status);
  172. void (* _coex_schm_status_bit_clear)(uint32_t type, uint32_t status);
  173. void (* _interrupt_on)(int intr_num);
  174. void (* _interrupt_off)(int intr_num);
  175. void (* _esp_hw_power_down)(void);
  176. void (* _esp_hw_power_up)(void);
  177. void (* _ets_backup_dma_copy)(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_rem);
  178. void (* _ets_delay_us)(uint32_t us);
  179. void (* _btdm_rom_table_ready)(void);
  180. };
  181. /* External functions or values
  182. ************************************************************************
  183. */
  184. /* not for user call, so don't put to include file */
  185. /* OSI */
  186. extern int btdm_osi_funcs_register(void *osi_funcs);
  187. /* Initialise and De-initialise */
  188. extern int btdm_controller_init(esp_bt_controller_config_t *config_opts);
  189. extern void btdm_controller_deinit(void);
  190. extern int btdm_controller_enable(esp_bt_mode_t mode);
  191. extern void btdm_controller_disable(void);
  192. extern uint8_t btdm_controller_get_mode(void);
  193. extern const char *btdm_controller_get_compile_version(void);
  194. extern void btdm_rf_bb_init_phase2(void); // shall be called after PHY/RF is enabled
  195. /* Sleep */
  196. extern void btdm_controller_enable_sleep(bool enable);
  197. extern uint8_t btdm_controller_get_sleep_mode(void);
  198. extern bool btdm_power_state_active(void);
  199. extern void btdm_wakeup_request(void);
  200. extern void btdm_in_wakeup_requesting_set(bool in_wakeup_requesting);
  201. /* vendor dependent tasks to be posted and handled by controller task*/
  202. extern int btdm_vnd_offload_task_register(btdm_vnd_ol_sig_t sig, btdm_vnd_ol_task_func_t func);
  203. extern int btdm_vnd_offload_task_deregister(btdm_vnd_ol_sig_t sig);
  204. extern int r_btdm_vnd_offload_post_from_isr(btdm_vnd_ol_sig_t sig, void *param, bool need_yield);
  205. extern int r_btdm_vnd_offload_post(btdm_vnd_ol_sig_t sig, void *param);
  206. /* Low Power Clock */
  207. extern bool btdm_lpclk_select_src(uint32_t sel);
  208. extern bool btdm_lpclk_set_div(uint32_t div);
  209. extern int btdm_hci_tl_io_event_post(int event);
  210. /* VHCI */
  211. extern bool API_vhci_host_check_send_available(void);
  212. extern void API_vhci_host_send_packet(uint8_t *data, uint16_t len);
  213. extern int API_vhci_host_register_callback(const vhci_host_callback_t *callback);
  214. /* TX power */
  215. extern int ble_txpwr_set(int power_type, int power_level);
  216. extern int ble_txpwr_get(int power_type);
  217. extern uint16_t l2c_ble_link_get_tx_buf_num(void);
  218. extern void coex_pti_v2(void);
  219. extern bool btdm_deep_sleep_mem_init(void);
  220. extern void btdm_deep_sleep_mem_deinit(void);
  221. extern void btdm_ble_power_down_dma_copy(bool copy);
  222. extern uint8_t btdm_sleep_clock_sync(void);
  223. #if CONFIG_MAC_BB_PD
  224. extern void esp_mac_bb_power_down(void);
  225. extern void esp_mac_bb_power_up(void);
  226. extern void ets_backup_dma_copy(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem);
  227. #endif
  228. extern void btdm_cca_feature_enable(void);
  229. extern uint32_t _bt_bss_start;
  230. extern uint32_t _bt_bss_end;
  231. extern uint32_t _btdm_bss_start;
  232. extern uint32_t _btdm_bss_end;
  233. extern uint32_t _nimble_bss_start;
  234. extern uint32_t _nimble_bss_end;
  235. extern uint32_t _bt_data_start;
  236. extern uint32_t _bt_data_end;
  237. extern uint32_t _btdm_data_start;
  238. extern uint32_t _btdm_data_end;
  239. extern uint32_t _nimble_data_start;
  240. extern uint32_t _nimble_data_end;
  241. /* Local Function Declare
  242. *********************************************************************
  243. */
  244. static void interrupt_set_wrapper(int cpu_no, int intr_source, int intr_num, int intr_prio);
  245. static void interrupt_clear_wrapper(int intr_source, int intr_num);
  246. static void interrupt_handler_set_wrapper(int n, intr_handler_t fn, void *arg);
  247. static void interrupt_disable(void);
  248. static void interrupt_restore(void);
  249. static void task_yield_from_isr(void);
  250. static void *semphr_create_wrapper(uint32_t max, uint32_t init);
  251. static void semphr_delete_wrapper(void *semphr);
  252. static int semphr_take_from_isr_wrapper(void *semphr, void *hptw);
  253. static int semphr_give_from_isr_wrapper(void *semphr, void *hptw);
  254. static int semphr_take_wrapper(void *semphr, uint32_t block_time_ms);
  255. static int semphr_give_wrapper(void *semphr);
  256. static void *mutex_create_wrapper(void);
  257. static void mutex_delete_wrapper(void *mutex);
  258. static int mutex_lock_wrapper(void *mutex);
  259. static int mutex_unlock_wrapper(void *mutex);
  260. static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size);
  261. static void queue_delete_wrapper(void *queue);
  262. static int queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms);
  263. static int queue_send_from_isr_wrapper(void *queue, void *item, void *hptw);
  264. static int queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms);
  265. static int queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw);
  266. static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  267. static void task_delete_wrapper(void *task_handle);
  268. static bool is_in_isr_wrapper(void);
  269. static void *malloc_internal_wrapper(size_t size);
  270. static int read_mac_wrapper(uint8_t mac[6]);
  271. static void srand_wrapper(unsigned int seed);
  272. static int rand_wrapper(void);
  273. static uint32_t btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr);
  274. static uint32_t btdm_hus_2_lpcycles(uint32_t hus);
  275. static bool btdm_sleep_check_duration(int32_t *slot_cnt);
  276. static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles);
  277. static void btdm_sleep_enter_phase2_wrapper(void);
  278. static void btdm_sleep_exit_phase3_wrapper(void);
  279. static void coex_wifi_sleep_set_hook(bool sleep);
  280. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status);
  281. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status);
  282. static void interrupt_on_wrapper(int intr_num);
  283. static void interrupt_off_wrapper(int intr_num);
  284. static void btdm_hw_mac_power_up_wrapper(void);
  285. static void btdm_hw_mac_power_down_wrapper(void);
  286. static void btdm_backup_dma_copy_wrapper(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem);
  287. static void btdm_funcs_table_ready_wrapper(void);
  288. static void btdm_slp_tmr_callback(void *arg);
  289. static esp_err_t try_heap_caps_add_region(intptr_t start, intptr_t end);
  290. static void bt_controller_deinit_internal(void);
  291. /* Local variable definition
  292. ***************************************************************************
  293. */
  294. /* OSI funcs */
  295. static const struct osi_funcs_t osi_funcs_ro = {
  296. ._magic = OSI_MAGIC_VALUE,
  297. ._version = OSI_VERSION,
  298. ._interrupt_set = interrupt_set_wrapper,
  299. ._interrupt_clear = interrupt_clear_wrapper,
  300. ._interrupt_handler_set = interrupt_handler_set_wrapper,
  301. ._interrupt_disable = interrupt_disable,
  302. ._interrupt_restore = interrupt_restore,
  303. ._task_yield = vPortYield,
  304. ._task_yield_from_isr = task_yield_from_isr,
  305. ._semphr_create = semphr_create_wrapper,
  306. ._semphr_delete = semphr_delete_wrapper,
  307. ._semphr_take_from_isr = semphr_take_from_isr_wrapper,
  308. ._semphr_give_from_isr = semphr_give_from_isr_wrapper,
  309. ._semphr_take = semphr_take_wrapper,
  310. ._semphr_give = semphr_give_wrapper,
  311. ._mutex_create = mutex_create_wrapper,
  312. ._mutex_delete = mutex_delete_wrapper,
  313. ._mutex_lock = mutex_lock_wrapper,
  314. ._mutex_unlock = mutex_unlock_wrapper,
  315. ._queue_create = queue_create_wrapper,
  316. ._queue_delete = queue_delete_wrapper,
  317. ._queue_send = queue_send_wrapper,
  318. ._queue_send_from_isr = queue_send_from_isr_wrapper,
  319. ._queue_recv = queue_recv_wrapper,
  320. ._queue_recv_from_isr = queue_recv_from_isr_wrapper,
  321. ._task_create = task_create_wrapper,
  322. ._task_delete = task_delete_wrapper,
  323. ._is_in_isr = is_in_isr_wrapper,
  324. ._cause_sw_intr_to_core = NULL,
  325. ._malloc = malloc,
  326. ._malloc_internal = malloc_internal_wrapper,
  327. ._free = free,
  328. ._read_efuse_mac = read_mac_wrapper,
  329. ._srand = srand_wrapper,
  330. ._rand = rand_wrapper,
  331. ._btdm_lpcycles_2_hus = btdm_lpcycles_2_hus,
  332. ._btdm_hus_2_lpcycles = btdm_hus_2_lpcycles,
  333. ._btdm_sleep_check_duration = btdm_sleep_check_duration,
  334. ._btdm_sleep_enter_phase1 = btdm_sleep_enter_phase1_wrapper,
  335. ._btdm_sleep_enter_phase2 = btdm_sleep_enter_phase2_wrapper,
  336. ._btdm_sleep_exit_phase1 = NULL,
  337. ._btdm_sleep_exit_phase2 = NULL,
  338. ._btdm_sleep_exit_phase3 = btdm_sleep_exit_phase3_wrapper,
  339. ._coex_wifi_sleep_set = coex_wifi_sleep_set_hook,
  340. ._coex_core_ble_conn_dyn_prio_get = NULL,
  341. ._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper,
  342. ._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper,
  343. ._interrupt_on = interrupt_on_wrapper,
  344. ._interrupt_off = interrupt_off_wrapper,
  345. ._esp_hw_power_down = btdm_hw_mac_power_down_wrapper,
  346. ._esp_hw_power_up = btdm_hw_mac_power_up_wrapper,
  347. ._ets_backup_dma_copy = btdm_backup_dma_copy_wrapper,
  348. ._ets_delay_us = esp_rom_delay_us,
  349. ._btdm_rom_table_ready = btdm_funcs_table_ready_wrapper,
  350. };
  351. static DRAM_ATTR struct osi_funcs_t *osi_funcs_p;
  352. /* Static variable declare */
  353. static DRAM_ATTR esp_bt_controller_status_t btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  354. static DRAM_ATTR portMUX_TYPE global_int_mux = portMUX_INITIALIZER_UNLOCKED;
  355. // low power control struct
  356. static DRAM_ATTR btdm_lpcntl_t s_lp_cntl;
  357. // low power status struct
  358. static DRAM_ATTR btdm_lpstat_t s_lp_stat;
  359. // measured average low power clock period in micro seconds
  360. static DRAM_ATTR uint32_t btdm_lpcycle_us = 0;
  361. // number of fractional bit for btdm_lpcycle_us
  362. static DRAM_ATTR uint8_t btdm_lpcycle_us_frac = 0;
  363. // semaphore used for blocking VHCI API to wait for controller to wake up
  364. static DRAM_ATTR QueueHandle_t s_wakeup_req_sem = NULL;
  365. // wakeup timer
  366. static DRAM_ATTR esp_timer_handle_t s_btdm_slp_tmr;
  367. #ifdef CONFIG_PM_ENABLE
  368. static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock;
  369. // pm_lock to prevent light sleep due to incompatibility currently
  370. static DRAM_ATTR esp_pm_lock_handle_t s_light_sleep_pm_lock;
  371. #endif
  372. void IRAM_ATTR btdm_hw_mac_power_down_wrapper(void)
  373. {
  374. #if CONFIG_MAC_BB_PD
  375. #if SOC_PM_SUPPORT_BT_PD
  376. // Bluetooth module power down
  377. SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO);
  378. SET_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_BT_FORCE_PD);
  379. #endif
  380. esp_mac_bb_power_down();
  381. #endif
  382. }
  383. void IRAM_ATTR btdm_hw_mac_power_up_wrapper(void)
  384. {
  385. #if CONFIG_MAC_BB_PD
  386. #if SOC_PM_SUPPORT_BT_PD
  387. // Bluetooth module power up
  388. CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_BT_FORCE_PD);
  389. CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO);
  390. #endif
  391. esp_mac_bb_power_up();
  392. #endif
  393. }
  394. void IRAM_ATTR btdm_backup_dma_copy_wrapper(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem)
  395. {
  396. #if CONFIG_MAC_BB_PD
  397. ets_backup_dma_copy(reg, mem_addr, num, to_mem);
  398. #endif
  399. }
  400. static inline void esp_bt_power_domain_on(void)
  401. {
  402. // Bluetooth module power up
  403. #if SOC_PM_SUPPORT_BT_PD
  404. CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_BT_FORCE_PD);
  405. CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO);
  406. #endif
  407. esp_wifi_bt_power_domain_on();
  408. }
  409. static inline void esp_bt_power_domain_off(void)
  410. {
  411. // Bluetooth module power down
  412. #if SOC_PM_SUPPORT_BT_PD
  413. SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO);
  414. SET_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_BT_FORCE_PD);
  415. #endif
  416. esp_wifi_bt_power_domain_off();
  417. }
  418. static void interrupt_set_wrapper(int cpu_no, int intr_source, int intr_num, int intr_prio)
  419. {
  420. esp_rom_route_intr_matrix(cpu_no, intr_source, intr_num);
  421. #if __riscv
  422. esprv_intc_int_set_priority(intr_num, intr_prio);
  423. //esprv_intc_int_enable_level(1 << intr_num);
  424. esprv_intc_int_set_type(intr_num, 0);
  425. #endif
  426. }
  427. static void interrupt_clear_wrapper(int intr_source, int intr_num)
  428. {
  429. }
  430. static void interrupt_handler_set_wrapper(int n, intr_handler_t fn, void *arg)
  431. {
  432. esp_cpu_intr_set_handler(n, fn, arg);
  433. }
  434. static void interrupt_on_wrapper(int intr_num)
  435. {
  436. esp_cpu_intr_enable(1 << intr_num);
  437. }
  438. static void interrupt_off_wrapper(int intr_num)
  439. {
  440. esp_cpu_intr_disable(1<<intr_num);
  441. }
  442. static void IRAM_ATTR interrupt_disable(void)
  443. {
  444. if (xPortInIsrContext()) {
  445. portENTER_CRITICAL_ISR(&global_int_mux);
  446. } else {
  447. portENTER_CRITICAL(&global_int_mux);
  448. }
  449. }
  450. static void IRAM_ATTR interrupt_restore(void)
  451. {
  452. if (xPortInIsrContext()) {
  453. portEXIT_CRITICAL_ISR(&global_int_mux);
  454. } else {
  455. portEXIT_CRITICAL(&global_int_mux);
  456. }
  457. }
  458. static void IRAM_ATTR task_yield_from_isr(void)
  459. {
  460. portYIELD_FROM_ISR();
  461. }
  462. static void *semphr_create_wrapper(uint32_t max, uint32_t init)
  463. {
  464. btdm_queue_item_t *semphr = heap_caps_calloc(1, sizeof(btdm_queue_item_t), MALLOC_CAP_8BIT|MALLOC_CAP_INTERNAL);
  465. assert(semphr);
  466. /* IDF FreeRTOS guarantees that all dynamic memory allocation goes to internal RAM. */
  467. semphr->handle = (void *)xSemaphoreCreateCounting(max, init);
  468. assert(semphr->handle);
  469. return semphr;
  470. }
  471. static void semphr_delete_wrapper(void *semphr)
  472. {
  473. if (semphr == NULL) {
  474. return;
  475. }
  476. btdm_queue_item_t *semphr_item = (btdm_queue_item_t *)semphr;
  477. if (semphr_item->handle) {
  478. vSemaphoreDelete(semphr_item->handle);
  479. }
  480. free(semphr);
  481. }
  482. static int IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw)
  483. {
  484. return (int)xSemaphoreTakeFromISR(((btdm_queue_item_t *)semphr)->handle, hptw);
  485. }
  486. static int IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw)
  487. {
  488. return (int)xSemaphoreGiveFromISR(((btdm_queue_item_t *)semphr)->handle, hptw);
  489. }
  490. static int semphr_take_wrapper(void *semphr, uint32_t block_time_ms)
  491. {
  492. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  493. return (int)xSemaphoreTake(((btdm_queue_item_t *)semphr)->handle, portMAX_DELAY);
  494. } else {
  495. return (int)xSemaphoreTake(((btdm_queue_item_t *)semphr)->handle, block_time_ms / portTICK_PERIOD_MS);
  496. }
  497. }
  498. static int semphr_give_wrapper(void *semphr)
  499. {
  500. return (int)xSemaphoreGive(((btdm_queue_item_t *)semphr)->handle);
  501. }
  502. static void *mutex_create_wrapper(void)
  503. {
  504. return (void *)xSemaphoreCreateMutex();
  505. }
  506. static void mutex_delete_wrapper(void *mutex)
  507. {
  508. vSemaphoreDelete(mutex);
  509. }
  510. static int mutex_lock_wrapper(void *mutex)
  511. {
  512. return (int)xSemaphoreTake(mutex, portMAX_DELAY);
  513. }
  514. static int mutex_unlock_wrapper(void *mutex)
  515. {
  516. return (int)xSemaphoreGive(mutex);
  517. }
  518. static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size)
  519. {
  520. btdm_queue_item_t *queue = NULL;
  521. queue = (btdm_queue_item_t*)heap_caps_malloc(sizeof(btdm_queue_item_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  522. assert(queue);
  523. /* IDF FreeRTOS guarantees that all dynamic memory allocation goes to internal RAM. */
  524. queue->handle = xQueueCreate( queue_len, item_size);
  525. assert(queue->handle);
  526. return queue;
  527. }
  528. static void queue_delete_wrapper(void *queue)
  529. {
  530. btdm_queue_item_t *queue_item = (btdm_queue_item_t *)queue;
  531. if (queue_item) {
  532. if(queue_item->handle){
  533. vQueueDelete(queue_item->handle);
  534. }
  535. free(queue_item);
  536. }
  537. }
  538. static int queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms)
  539. {
  540. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  541. return (int)xQueueSend(((btdm_queue_item_t*)queue)->handle, item, portMAX_DELAY);
  542. } else {
  543. return (int)xQueueSend(((btdm_queue_item_t*)queue)->handle, item, block_time_ms / portTICK_PERIOD_MS);
  544. }
  545. }
  546. static int IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw)
  547. {
  548. return (int)xQueueSendFromISR(((btdm_queue_item_t*)queue)->handle, item, hptw);
  549. }
  550. static int queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms)
  551. {
  552. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  553. return (int)xQueueReceive(((btdm_queue_item_t*)queue)->handle, item, portMAX_DELAY);
  554. } else {
  555. return (int)xQueueReceive(((btdm_queue_item_t*)queue)->handle, item, block_time_ms / portTICK_PERIOD_MS);
  556. }
  557. }
  558. static int IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw)
  559. {
  560. return (int)xQueueReceiveFromISR(((btdm_queue_item_t*)queue)->handle, item, hptw);
  561. }
  562. static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
  563. {
  564. return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
  565. }
  566. static void task_delete_wrapper(void *task_handle)
  567. {
  568. vTaskDelete(task_handle);
  569. }
  570. static bool IRAM_ATTR is_in_isr_wrapper(void)
  571. {
  572. return (bool)xPortInIsrContext();
  573. }
  574. static void *malloc_internal_wrapper(size_t size)
  575. {
  576. void *p = heap_caps_malloc(size, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL|MALLOC_CAP_DMA);
  577. if(p == NULL) {
  578. ESP_LOGE(BT_LOG_TAG, "Malloc failed");
  579. }
  580. return p;
  581. }
  582. static int IRAM_ATTR read_mac_wrapper(uint8_t mac[6])
  583. {
  584. int ret = esp_read_mac(mac, ESP_MAC_BT);
  585. ESP_LOGI(BT_LOG_TAG, "Bluetooth MAC: %02x:%02x:%02x:%02x:%02x:%02x",
  586. mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
  587. return ret;
  588. }
  589. static void IRAM_ATTR srand_wrapper(unsigned int seed)
  590. {
  591. /* empty function */
  592. }
  593. static int IRAM_ATTR rand_wrapper(void)
  594. {
  595. return (int)esp_random();
  596. }
  597. static uint32_t IRAM_ATTR btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr)
  598. {
  599. uint64_t local_error_corr = (error_corr == NULL) ? 0 : (uint64_t)(*error_corr);
  600. uint64_t res = (uint64_t)btdm_lpcycle_us * cycles * 2;
  601. local_error_corr += res;
  602. res = (local_error_corr >> btdm_lpcycle_us_frac);
  603. local_error_corr -= (res << btdm_lpcycle_us_frac);
  604. if (error_corr) {
  605. *error_corr = (uint32_t) local_error_corr;
  606. }
  607. return (uint32_t)res;
  608. }
  609. /*
  610. * @brief Converts a duration in half us into a number of low power clock cycles.
  611. */
  612. static uint32_t IRAM_ATTR btdm_hus_2_lpcycles(uint32_t hus)
  613. {
  614. // The number of sleep duration(us) should not lead to overflow. Thrs: 100s
  615. // Compute the sleep duration in us to low power clock cycles, with calibration result applied
  616. // clock measurement is conducted
  617. uint64_t cycles = ((uint64_t)(hus) << btdm_lpcycle_us_frac) / btdm_lpcycle_us;
  618. cycles >>= 1;
  619. return (uint32_t)cycles;
  620. }
  621. static bool IRAM_ATTR btdm_sleep_check_duration(int32_t *half_slot_cnt)
  622. {
  623. if (*half_slot_cnt < BTDM_MIN_SLEEP_DURATION) {
  624. return false;
  625. }
  626. /* wake up in advance considering the delay in enabling PHY/RF */
  627. *half_slot_cnt -= BTDM_MODEM_WAKE_UP_DELAY;
  628. return true;
  629. }
  630. static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles)
  631. {
  632. if (s_lp_cntl.wakeup_timer_required == 0) {
  633. return;
  634. }
  635. // start a timer to wake up and acquire the pm_lock before modem_sleep awakes
  636. uint32_t us_to_sleep = btdm_lpcycles_2_hus(lpcycles, NULL) >> 1;
  637. #define BTDM_MIN_TIMER_UNCERTAINTY_US (1800)
  638. assert(us_to_sleep > BTDM_MIN_TIMER_UNCERTAINTY_US);
  639. // allow a maximum time uncertainty to be about 488ppm(1/2048) at least as clock drift
  640. // and set the timer in advance
  641. uint32_t uncertainty = (us_to_sleep >> 11);
  642. if (uncertainty < BTDM_MIN_TIMER_UNCERTAINTY_US) {
  643. uncertainty = BTDM_MIN_TIMER_UNCERTAINTY_US;
  644. }
  645. assert (s_lp_stat.wakeup_timer_started == 0);
  646. if (esp_timer_start_once(s_btdm_slp_tmr, us_to_sleep - uncertainty) == ESP_OK) {
  647. s_lp_stat.wakeup_timer_started = 1;
  648. } else {
  649. ESP_LOGE(BT_LOG_TAG, "timer start failed");
  650. assert(0);
  651. }
  652. }
  653. static void btdm_sleep_enter_phase2_wrapper(void)
  654. {
  655. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  656. if (s_lp_stat.phy_enabled) {
  657. esp_phy_disable();
  658. s_lp_stat.phy_enabled = 0;
  659. } else {
  660. assert(0);
  661. }
  662. if (s_lp_stat.pm_lock_released == 0) {
  663. #ifdef CONFIG_PM_ENABLE
  664. esp_pm_lock_release(s_pm_lock);
  665. #endif
  666. s_lp_stat.pm_lock_released = 1;
  667. }
  668. }
  669. }
  670. static void btdm_sleep_exit_phase3_wrapper(void)
  671. {
  672. #ifdef CONFIG_PM_ENABLE
  673. // If BT wakeup before esp timer coming due to timer task have no chance to run.
  674. // Then we will not run into `btdm_sleep_exit_phase0` and acquire PM lock,
  675. // Do it again here to fix this issue.
  676. if (s_lp_stat.pm_lock_released) {
  677. esp_pm_lock_acquire(s_pm_lock);
  678. s_lp_stat.pm_lock_released = 0;
  679. }
  680. #endif
  681. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  682. if (s_lp_stat.phy_enabled == 0) {
  683. esp_phy_enable();
  684. s_lp_stat.phy_enabled = 1;
  685. }
  686. }
  687. // If BT wakeup before esp timer coming due to timer task have no chance to run.
  688. // Then we will not run into `btdm_sleep_exit_phase0` and stop esp timer,
  689. // Do it again here to fix this issue.
  690. if (s_lp_cntl.wakeup_timer_required && s_lp_stat.wakeup_timer_started) {
  691. esp_timer_stop(s_btdm_slp_tmr);
  692. s_lp_stat.wakeup_timer_started = 0;
  693. }
  694. // wait for the sleep state to change
  695. // the procedure duration is at micro-second level or less
  696. while (btdm_sleep_clock_sync()) {
  697. ;
  698. }
  699. }
  700. static void IRAM_ATTR btdm_sleep_exit_phase0(void *param)
  701. {
  702. assert(s_lp_cntl.enable == 1);
  703. #ifdef CONFIG_PM_ENABLE
  704. if (s_lp_stat.pm_lock_released) {
  705. esp_pm_lock_acquire(s_pm_lock);
  706. s_lp_stat.pm_lock_released = 0;
  707. }
  708. #endif
  709. int event = (int) param;
  710. if (event == BTDM_ASYNC_WAKEUP_SRC_VHCI || event == BTDM_ASYNC_WAKEUP_SRC_DISA) {
  711. btdm_wakeup_request();
  712. }
  713. if (s_lp_cntl.wakeup_timer_required && s_lp_stat.wakeup_timer_started) {
  714. esp_timer_stop(s_btdm_slp_tmr);
  715. s_lp_stat.wakeup_timer_started = 0;
  716. }
  717. if (event == BTDM_ASYNC_WAKEUP_SRC_VHCI || event == BTDM_ASYNC_WAKEUP_SRC_DISA) {
  718. semphr_give_wrapper(s_wakeup_req_sem);
  719. }
  720. }
  721. static void IRAM_ATTR btdm_slp_tmr_callback(void *arg)
  722. {
  723. #ifdef CONFIG_PM_ENABLE
  724. r_btdm_vnd_offload_post(BTDM_VND_OL_SIG_WAKEUP_TMR, (void *)BTDM_ASYNC_WAKEUP_SRC_TMR);
  725. #endif
  726. }
  727. static bool async_wakeup_request(int event)
  728. {
  729. if (s_lp_cntl.enable == 0) {
  730. return false;
  731. }
  732. bool do_wakeup_request = false;
  733. switch (event) {
  734. case BTDM_ASYNC_WAKEUP_SRC_VHCI:
  735. case BTDM_ASYNC_WAKEUP_SRC_DISA:
  736. btdm_in_wakeup_requesting_set(true);
  737. if (!btdm_power_state_active()) {
  738. r_btdm_vnd_offload_post(BTDM_VND_OL_SIG_WAKEUP_TMR, (void *)event);
  739. do_wakeup_request = true;
  740. semphr_take_wrapper(s_wakeup_req_sem, OSI_FUNCS_TIME_BLOCKING);
  741. }
  742. break;
  743. default:
  744. break;
  745. }
  746. return do_wakeup_request;
  747. }
  748. static void async_wakeup_request_end(int event)
  749. {
  750. if (s_lp_cntl.enable == 0) {
  751. return;
  752. }
  753. bool allow_to_sleep;
  754. switch (event) {
  755. case BTDM_ASYNC_WAKEUP_SRC_VHCI:
  756. case BTDM_ASYNC_WAKEUP_SRC_DISA:
  757. allow_to_sleep = true;
  758. break;
  759. default:
  760. allow_to_sleep = true;
  761. break;
  762. }
  763. if (allow_to_sleep) {
  764. btdm_in_wakeup_requesting_set(false);
  765. }
  766. return;
  767. }
  768. static void btdm_funcs_table_ready_wrapper(void)
  769. {
  770. #if BT_BLE_CCA_MODE == 2
  771. btdm_cca_feature_enable();
  772. #endif
  773. }
  774. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
  775. {
  776. #if CONFIG_SW_COEXIST_ENABLE
  777. coex_schm_status_bit_set(type, status);
  778. #endif
  779. }
  780. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
  781. {
  782. #if CONFIG_SW_COEXIST_ENABLE
  783. coex_schm_status_bit_clear(type, status);
  784. #endif
  785. }
  786. bool esp_vhci_host_check_send_available(void)
  787. {
  788. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  789. return false;
  790. }
  791. return API_vhci_host_check_send_available();
  792. }
  793. void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
  794. {
  795. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  796. return;
  797. }
  798. async_wakeup_request(BTDM_ASYNC_WAKEUP_SRC_VHCI);
  799. API_vhci_host_send_packet(data, len);
  800. async_wakeup_request_end(BTDM_ASYNC_WAKEUP_SRC_VHCI);
  801. }
  802. esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
  803. {
  804. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  805. return ESP_FAIL;
  806. }
  807. return API_vhci_host_register_callback((const vhci_host_callback_t *)callback) == 0 ? ESP_OK : ESP_FAIL;
  808. }
  809. static void btdm_controller_mem_init(void)
  810. {
  811. extern void btdm_controller_rom_data_init(void );
  812. btdm_controller_rom_data_init();
  813. }
  814. esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
  815. {
  816. intptr_t mem_start=(intptr_t) NULL, mem_end=(intptr_t) NULL;
  817. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
  818. return ESP_ERR_INVALID_STATE;
  819. }
  820. if (mode & ESP_BT_MODE_BLE) {
  821. /* if the addresses of rom btdm .data and .bss are consecutive,
  822. they are registered in the system heap as a piece of memory
  823. */
  824. if(ets_rom_layout_p->data_end_btdm == ets_rom_layout_p->bss_start_btdm) {
  825. mem_start = (intptr_t)ets_rom_layout_p->data_start_btdm;
  826. mem_end = (intptr_t)ets_rom_layout_p->bss_end_btdm;
  827. if (mem_start != mem_end) {
  828. ESP_LOGD(BT_LOG_TAG, "Release rom btdm [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  829. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  830. }
  831. } else {
  832. mem_start = (intptr_t)ets_rom_layout_p->bss_start_btdm;
  833. mem_end = (intptr_t)ets_rom_layout_p->bss_end_btdm;
  834. if (mem_start != mem_end) {
  835. ESP_LOGD(BT_LOG_TAG, "Release rom btdm BSS [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  836. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  837. }
  838. mem_start = (intptr_t)ets_rom_layout_p->data_start_btdm;
  839. mem_end = (intptr_t)ets_rom_layout_p->data_end_btdm;
  840. if (mem_start != mem_end) {
  841. ESP_LOGD(BT_LOG_TAG, "Release rom btdm Data [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  842. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  843. }
  844. }
  845. /* if the addresses of rom interface btdm .data and .bss are consecutive,
  846. they are registered in the system heap as a piece of memory
  847. */
  848. if(ets_rom_layout_p->data_end_interface_btdm == ets_rom_layout_p->bss_start_interface_btdm) {
  849. mem_start = (intptr_t)ets_rom_layout_p->data_start_interface_btdm;
  850. mem_end = (intptr_t)ets_rom_layout_p->bss_end_interface_btdm;
  851. if (mem_start != mem_end) {
  852. ESP_LOGD(BT_LOG_TAG, "Release rom interface btdm [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  853. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  854. }
  855. } else {
  856. mem_start = (intptr_t)ets_rom_layout_p->data_start_interface_btdm;
  857. mem_end = (intptr_t)ets_rom_layout_p->data_end_interface_btdm;
  858. if (mem_start != mem_end) {
  859. ESP_LOGD(BT_LOG_TAG, "Release rom interface btdm Data [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  860. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  861. }
  862. mem_start = (intptr_t)ets_rom_layout_p->bss_start_interface_btdm;
  863. mem_end = (intptr_t)ets_rom_layout_p->bss_end_interface_btdm;
  864. if (mem_start != mem_end) {
  865. ESP_LOGD(BT_LOG_TAG, "Release rom interface btdm BSS [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  866. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  867. }
  868. }
  869. }
  870. return ESP_OK;
  871. }
  872. esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
  873. {
  874. int ret;
  875. intptr_t mem_start, mem_end;
  876. ret = esp_bt_controller_mem_release(mode);
  877. if (ret != ESP_OK) {
  878. return ret;
  879. }
  880. if (mode & ESP_BT_MODE_BLE) {
  881. /* if the addresses of btdm .bss and bt .bss are consecutive,
  882. they are registered in the system heap as a piece of memory
  883. */
  884. if(_bt_bss_end == _btdm_bss_start) {
  885. mem_start = (intptr_t)&_bt_bss_start;
  886. mem_end = (intptr_t)&_btdm_bss_end;
  887. if (mem_start != mem_end) {
  888. ESP_LOGD(BT_LOG_TAG, "Release BSS [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  889. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  890. }
  891. } else {
  892. mem_start = (intptr_t)&_bt_bss_start;
  893. mem_end = (intptr_t)&_bt_bss_end;
  894. if (mem_start != mem_end) {
  895. ESP_LOGD(BT_LOG_TAG, "Release BT BSS [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  896. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  897. }
  898. mem_start = (intptr_t)&_btdm_bss_start;
  899. mem_end = (intptr_t)&_btdm_bss_end;
  900. if (mem_start != mem_end) {
  901. ESP_LOGD(BT_LOG_TAG, "Release BTDM BSS [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  902. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  903. }
  904. }
  905. /* if the addresses of btdm .data and bt .data are consecutive,
  906. they are registered in the system heap as a piece of memory
  907. */
  908. if(_bt_data_end == _btdm_data_start) {
  909. mem_start = (intptr_t)&_bt_data_start;
  910. mem_end = (intptr_t)&_btdm_data_end;
  911. if (mem_start != mem_end) {
  912. ESP_LOGD(BT_LOG_TAG, "Release data [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  913. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  914. }
  915. } else {
  916. mem_start = (intptr_t)&_bt_data_start;
  917. mem_end = (intptr_t)&_bt_data_end;
  918. if (mem_start != mem_end) {
  919. ESP_LOGD(BT_LOG_TAG, "Release BT Data [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  920. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  921. }
  922. mem_start = (intptr_t)&_btdm_data_start;
  923. mem_end = (intptr_t)&_btdm_data_end;
  924. if (mem_start != mem_end) {
  925. ESP_LOGD(BT_LOG_TAG, "Release BTDM Data [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  926. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  927. }
  928. }
  929. mem_start = (intptr_t)&_nimble_bss_start;
  930. mem_end = (intptr_t)&_nimble_bss_end;
  931. if (mem_start != mem_end) {
  932. ESP_LOGD(BT_LOG_TAG, "Release NimBLE BSS [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  933. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  934. }
  935. mem_start = (intptr_t)&_nimble_data_start;
  936. mem_end = (intptr_t)&_nimble_data_end;
  937. if (mem_start != mem_end) {
  938. ESP_LOGD(BT_LOG_TAG, "Release NimBLE Data [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  939. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  940. }
  941. }
  942. return ESP_OK;
  943. }
  944. static esp_err_t try_heap_caps_add_region(intptr_t start, intptr_t end)
  945. {
  946. int ret = heap_caps_add_region(start, end);
  947. /* heap_caps_add_region() returns ESP_ERR_INVALID_SIZE if the memory region is
  948. * is too small to fit a heap. This cannot be termed as a fatal error and hence
  949. * we replace it by ESP_OK
  950. */
  951. if (ret == ESP_ERR_INVALID_SIZE) {
  952. return ESP_OK;
  953. }
  954. return ret;
  955. }
  956. #if CONFIG_MAC_BB_PD
  957. static void IRAM_ATTR btdm_mac_bb_power_down_cb(void)
  958. {
  959. if (s_lp_cntl.mac_bb_pd && s_lp_stat.mac_bb_pd == 0) {
  960. btdm_ble_power_down_dma_copy(true);
  961. s_lp_stat.mac_bb_pd = 1;
  962. }
  963. }
  964. static void IRAM_ATTR btdm_mac_bb_power_up_cb(void)
  965. {
  966. if (s_lp_cntl.mac_bb_pd && s_lp_stat.mac_bb_pd) {
  967. btdm_ble_power_down_dma_copy(false);
  968. s_lp_stat.mac_bb_pd = 0;
  969. }
  970. }
  971. #endif
  972. esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
  973. {
  974. esp_err_t err = ESP_FAIL;
  975. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
  976. return ESP_ERR_INVALID_STATE;
  977. }
  978. if (cfg == NULL) {
  979. return ESP_ERR_INVALID_ARG;
  980. }
  981. if (cfg->controller_task_prio != ESP_TASK_BT_CONTROLLER_PRIO
  982. || cfg->controller_task_stack_size < ESP_TASK_BT_CONTROLLER_STACK) {
  983. ESP_LOGE(BT_LOG_TAG, "Invalid controller task prioriy or stack size");
  984. return ESP_ERR_INVALID_ARG;
  985. }
  986. if (cfg->bluetooth_mode != ESP_BT_MODE_BLE) {
  987. ESP_LOGE(BT_LOG_TAG, "%s controller only support BLE only mode", __func__);
  988. return ESP_ERR_NOT_SUPPORTED;
  989. }
  990. if (cfg->bluetooth_mode & ESP_BT_MODE_BLE) {
  991. if ((cfg->ble_max_act <= 0) || (cfg->ble_max_act > BT_CTRL_BLE_MAX_ACT_LIMIT)) {
  992. ESP_LOGE(BT_LOG_TAG, "Invalid value of ble_max_act");
  993. return ESP_ERR_INVALID_ARG;
  994. }
  995. }
  996. if (cfg->sleep_mode == ESP_BT_SLEEP_MODE_1) {
  997. if (cfg->sleep_clock == ESP_BT_SLEEP_CLOCK_NONE) {
  998. ESP_LOGE(BT_LOG_TAG, "SLEEP_MODE_1 enabled but sleep clock not configured");
  999. return ESP_ERR_INVALID_ARG;
  1000. }
  1001. }
  1002. // overwrite some parameters
  1003. cfg->magic = ESP_BT_CTRL_CONFIG_MAGIC_VAL;
  1004. #if CONFIG_MAC_BB_PD
  1005. esp_mac_bb_pd_mem_init();
  1006. #endif
  1007. esp_phy_modem_init();
  1008. esp_bt_power_domain_on();
  1009. btdm_controller_mem_init();
  1010. #if CONFIG_MAC_BB_PD
  1011. if (esp_register_mac_bb_pd_callback(btdm_mac_bb_power_down_cb) != 0) {
  1012. err = ESP_ERR_INVALID_ARG;
  1013. goto error;
  1014. }
  1015. if (esp_register_mac_bb_pu_callback(btdm_mac_bb_power_up_cb) != 0) {
  1016. err = ESP_ERR_INVALID_ARG;
  1017. goto error;
  1018. }
  1019. #endif
  1020. osi_funcs_p = (struct osi_funcs_t *)malloc_internal_wrapper(sizeof(struct osi_funcs_t));
  1021. if (osi_funcs_p == NULL) {
  1022. return ESP_ERR_NO_MEM;
  1023. }
  1024. memcpy(osi_funcs_p, &osi_funcs_ro, sizeof(struct osi_funcs_t));
  1025. if (btdm_osi_funcs_register(osi_funcs_p) != 0) {
  1026. return ESP_ERR_INVALID_ARG;
  1027. }
  1028. ESP_LOGI(BT_LOG_TAG, "BT controller compile version [%s]", btdm_controller_get_compile_version());
  1029. // init low-power control resources
  1030. do {
  1031. // set default values for global states or resources
  1032. s_lp_stat.val = 0;
  1033. s_lp_cntl.val = 0;
  1034. s_lp_cntl.main_xtal_pu = 0;
  1035. s_wakeup_req_sem = NULL;
  1036. s_btdm_slp_tmr = NULL;
  1037. // configure and initialize resources
  1038. s_lp_cntl.enable = (cfg->sleep_mode == ESP_BT_SLEEP_MODE_1) ? 1 : 0;
  1039. s_lp_cntl.no_light_sleep = 0;
  1040. if (s_lp_cntl.enable) {
  1041. #if CONFIG_MAC_BB_PD
  1042. if (!btdm_deep_sleep_mem_init()) {
  1043. err = ESP_ERR_NO_MEM;
  1044. goto error;
  1045. }
  1046. s_lp_cntl.mac_bb_pd = 1;
  1047. #endif
  1048. #ifdef CONFIG_PM_ENABLE
  1049. s_lp_cntl.wakeup_timer_required = 1;
  1050. #endif
  1051. // async wakeup semaphore for VHCI
  1052. s_wakeup_req_sem = semphr_create_wrapper(1, 0);
  1053. if (s_wakeup_req_sem == NULL) {
  1054. err = ESP_ERR_NO_MEM;
  1055. goto error;
  1056. }
  1057. btdm_vnd_offload_task_register(BTDM_VND_OL_SIG_WAKEUP_TMR, btdm_sleep_exit_phase0);
  1058. }
  1059. if (s_lp_cntl.wakeup_timer_required) {
  1060. esp_timer_create_args_t create_args = {
  1061. .callback = btdm_slp_tmr_callback,
  1062. .arg = NULL,
  1063. .name = "btSlp",
  1064. };
  1065. if ((err = esp_timer_create(&create_args, &s_btdm_slp_tmr)) != ESP_OK) {
  1066. goto error;
  1067. }
  1068. }
  1069. // set default bluetooth sleep clock cycle and its fractional bits
  1070. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  1071. btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
  1072. // set default bluetooth sleep clock source
  1073. s_lp_cntl.lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
  1074. #if CONFIG_BT_CTRL_LPCLK_SEL_EXT_32K_XTAL
  1075. // check whether or not EXT_CRYS is working
  1076. if (rtc_clk_slow_src_get() == SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
  1077. s_lp_cntl.lpclk_sel = BTDM_LPCLK_SEL_XTAL32K; // External 32 kHz XTAL
  1078. } else {
  1079. ESP_LOGW(BT_LOG_TAG, "32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock");
  1080. #if !CONFIG_BT_CTRL_MAIN_XTAL_PU_DURING_LIGHT_SLEEP
  1081. s_lp_cntl.no_light_sleep = 1;
  1082. #endif
  1083. }
  1084. #elif (CONFIG_BT_CTRL_LPCLK_SEL_MAIN_XTAL)
  1085. ESP_LOGI(BT_LOG_TAG, "Bluetooth will use main XTAL as Bluetooth sleep clock.");
  1086. #if !CONFIG_BT_CTRL_MAIN_XTAL_PU_DURING_LIGHT_SLEEP
  1087. s_lp_cntl.no_light_sleep = 1;
  1088. #endif
  1089. #elif (CONFIG_BT_CTRL_LPCLK_SEL_RTC_SLOW)
  1090. // check whether or not internal 150 kHz RC oscillator is working
  1091. if (rtc_clk_slow_src_get() == SOC_RTC_SLOW_CLK_SRC_RC_SLOW) {
  1092. s_lp_cntl.lpclk_sel = BTDM_LPCLK_SEL_RTC_SLOW; // Internal 150 kHz RC oscillator
  1093. ESP_LOGW(BT_LOG_TAG, "Internal 150kHz RC osciallator. The accuracy of this clock is a lot larger than 500ppm which is "
  1094. "required in Bluetooth communication, so don't select this option in scenarios such as BLE connection state.");
  1095. } else {
  1096. ESP_LOGW(BT_LOG_TAG, "Internal 150kHz RC oscillator not detected.");
  1097. assert(0);
  1098. }
  1099. #endif
  1100. bool select_src_ret __attribute__((unused));
  1101. bool set_div_ret __attribute__((unused));
  1102. if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_XTAL) {
  1103. #ifdef CONFIG_BT_CTRL_MAIN_XTAL_PU_DURING_LIGHT_SLEEP
  1104. ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_ON));
  1105. s_lp_cntl.main_xtal_pu = 1;
  1106. #endif
  1107. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL);
  1108. set_div_ret = btdm_lpclk_set_div(esp_clk_xtal_freq() / MHZ);
  1109. assert(select_src_ret && set_div_ret);
  1110. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  1111. btdm_lpcycle_us = 1 << (btdm_lpcycle_us_frac);
  1112. } else if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_XTAL32K) {
  1113. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL32K);
  1114. set_div_ret = btdm_lpclk_set_div(0);
  1115. assert(select_src_ret && set_div_ret);
  1116. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  1117. btdm_lpcycle_us = (RTC_CLK_CAL_FRACT > 15) ? (1000000 << (RTC_CLK_CAL_FRACT - 15)) :
  1118. (1000000 >> (15 - RTC_CLK_CAL_FRACT));
  1119. assert(btdm_lpcycle_us != 0);
  1120. } else if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_RTC_SLOW) {
  1121. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_RTC_SLOW);
  1122. set_div_ret = btdm_lpclk_set_div(0);
  1123. assert(select_src_ret && set_div_ret);
  1124. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  1125. btdm_lpcycle_us = esp_clk_slowclk_cal_get();
  1126. } else {
  1127. err = ESP_ERR_INVALID_ARG;
  1128. goto error;
  1129. }
  1130. #if CONFIG_SW_COEXIST_ENABLE
  1131. coex_update_lpclk_interval();
  1132. #endif
  1133. #ifdef CONFIG_PM_ENABLE
  1134. if (s_lp_cntl.no_light_sleep) {
  1135. if ((err = esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, "btLS", &s_light_sleep_pm_lock)) != ESP_OK) {
  1136. err = ESP_ERR_NO_MEM;
  1137. goto error;
  1138. }
  1139. ESP_LOGW(BT_LOG_TAG, "light sleep mode will not be able to apply when bluetooth is enabled.");
  1140. }
  1141. if ((err = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "bt", &s_pm_lock)) != ESP_OK) {
  1142. err = ESP_ERR_NO_MEM;
  1143. goto error;
  1144. } else {
  1145. s_lp_stat.pm_lock_released = 1;
  1146. }
  1147. #endif
  1148. } while (0);
  1149. #if CONFIG_SW_COEXIST_ENABLE
  1150. coex_init();
  1151. #endif
  1152. periph_module_enable(PERIPH_BT_MODULE);
  1153. periph_module_reset(PERIPH_BT_MODULE);
  1154. if (btdm_controller_init(cfg) != 0) {
  1155. err = ESP_ERR_NO_MEM;
  1156. goto error;
  1157. }
  1158. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  1159. return ESP_OK;
  1160. error:
  1161. bt_controller_deinit_internal();
  1162. return err;
  1163. }
  1164. esp_err_t esp_bt_controller_deinit(void)
  1165. {
  1166. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  1167. return ESP_ERR_INVALID_STATE;
  1168. }
  1169. btdm_controller_deinit();
  1170. bt_controller_deinit_internal();
  1171. return ESP_OK;
  1172. }
  1173. static void bt_controller_deinit_internal(void)
  1174. {
  1175. periph_module_disable(PERIPH_BT_MODULE);
  1176. // deinit low power control resources
  1177. do {
  1178. #if CONFIG_MAC_BB_PD
  1179. if (s_lp_cntl.mac_bb_pd) {
  1180. btdm_deep_sleep_mem_deinit();
  1181. s_lp_cntl.mac_bb_pd = 0;
  1182. }
  1183. #endif
  1184. #ifdef CONFIG_PM_ENABLE
  1185. if (s_lp_cntl.no_light_sleep) {
  1186. if (s_light_sleep_pm_lock != NULL) {
  1187. esp_pm_lock_delete(s_light_sleep_pm_lock);
  1188. s_light_sleep_pm_lock = NULL;
  1189. }
  1190. }
  1191. if (s_pm_lock != NULL) {
  1192. esp_pm_lock_delete(s_pm_lock);
  1193. s_pm_lock = NULL;
  1194. s_lp_stat.pm_lock_released = 0;
  1195. }
  1196. #endif
  1197. if (s_lp_cntl.wakeup_timer_required) {
  1198. if (s_lp_stat.wakeup_timer_started) {
  1199. esp_timer_stop(s_btdm_slp_tmr);
  1200. }
  1201. s_lp_stat.wakeup_timer_started = 0;
  1202. esp_timer_delete(s_btdm_slp_tmr);
  1203. s_btdm_slp_tmr = NULL;
  1204. }
  1205. if (s_lp_cntl.enable) {
  1206. btdm_vnd_offload_task_deregister(BTDM_VND_OL_SIG_WAKEUP_TMR);
  1207. if (s_wakeup_req_sem != NULL) {
  1208. semphr_delete_wrapper(s_wakeup_req_sem);
  1209. s_wakeup_req_sem = NULL;
  1210. }
  1211. }
  1212. if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_XTAL) {
  1213. #ifdef CONFIG_BT_CTRL_MAIN_XTAL_PU_DURING_LIGHT_SLEEP
  1214. if (s_lp_cntl.main_xtal_pu) {
  1215. ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_OFF));
  1216. s_lp_cntl.main_xtal_pu = 0;
  1217. }
  1218. #endif
  1219. btdm_lpclk_select_src(BTDM_LPCLK_SEL_RTC_SLOW);
  1220. btdm_lpclk_set_div(0);
  1221. #if CONFIG_SW_COEXIST_ENABLE
  1222. coex_update_lpclk_interval();
  1223. #endif
  1224. }
  1225. btdm_lpcycle_us = 0;
  1226. } while (0);
  1227. #if CONFIG_MAC_BB_PD
  1228. esp_unregister_mac_bb_pd_callback(btdm_mac_bb_power_down_cb);
  1229. esp_unregister_mac_bb_pu_callback(btdm_mac_bb_power_up_cb);
  1230. #endif
  1231. esp_bt_power_domain_off();
  1232. #if CONFIG_MAC_BB_PD
  1233. esp_mac_bb_pd_mem_deinit();
  1234. #endif
  1235. esp_phy_modem_deinit();
  1236. if (osi_funcs_p != NULL) {
  1237. free(osi_funcs_p);
  1238. osi_funcs_p = NULL;
  1239. }
  1240. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  1241. }
  1242. esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
  1243. {
  1244. esp_err_t ret = ESP_OK;
  1245. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  1246. return ESP_ERR_INVALID_STATE;
  1247. }
  1248. //As the history reason, mode should be equal to the mode which set in esp_bt_controller_init()
  1249. if (mode != btdm_controller_get_mode()) {
  1250. ESP_LOGE(BT_LOG_TAG, "invalid mode %d, controller support mode is %d", mode, btdm_controller_get_mode());
  1251. return ESP_ERR_INVALID_ARG;
  1252. }
  1253. /* Enable PHY when enabling controller to reduce power dissipation after controller init
  1254. * Notice the init order: esp_phy_enable() -> bt_bb_v2_init_cmplx() -> coex_pti_v2()
  1255. */
  1256. esp_phy_enable();
  1257. s_lp_stat.phy_enabled = 1;
  1258. #if CONFIG_SW_COEXIST_ENABLE
  1259. coex_enable();
  1260. #endif
  1261. // enable low power mode
  1262. do {
  1263. #ifdef CONFIG_PM_ENABLE
  1264. if (s_lp_cntl.no_light_sleep) {
  1265. esp_pm_lock_acquire(s_light_sleep_pm_lock);
  1266. }
  1267. esp_pm_lock_acquire(s_pm_lock);
  1268. s_lp_stat.pm_lock_released = 0;
  1269. #endif
  1270. if (s_lp_cntl.enable) {
  1271. btdm_controller_enable_sleep(true);
  1272. }
  1273. } while (0);
  1274. if (btdm_controller_enable(mode) != 0) {
  1275. ret = ESP_ERR_INVALID_STATE;
  1276. goto error;
  1277. }
  1278. coex_pti_v2();
  1279. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
  1280. return ret;
  1281. error:
  1282. // disable low power mode
  1283. do {
  1284. btdm_controller_enable_sleep(false);
  1285. #ifdef CONFIG_PM_ENABLE
  1286. if (s_lp_cntl.no_light_sleep) {
  1287. esp_pm_lock_release(s_light_sleep_pm_lock);
  1288. }
  1289. if (s_lp_stat.pm_lock_released == 0) {
  1290. esp_pm_lock_release(s_pm_lock);
  1291. s_lp_stat.pm_lock_released = 1;
  1292. }
  1293. #endif
  1294. } while (0);
  1295. #if CONFIG_SW_COEXIST_ENABLE
  1296. coex_disable();
  1297. #endif
  1298. if (s_lp_stat.phy_enabled) {
  1299. esp_phy_disable();
  1300. s_lp_stat.phy_enabled = 0;
  1301. }
  1302. return ret;
  1303. }
  1304. esp_err_t esp_bt_controller_disable(void)
  1305. {
  1306. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1307. return ESP_ERR_INVALID_STATE;
  1308. }
  1309. async_wakeup_request(BTDM_ASYNC_WAKEUP_SRC_DISA);
  1310. while (!btdm_power_state_active()){}
  1311. btdm_controller_disable();
  1312. async_wakeup_request_end(BTDM_ASYNC_WAKEUP_SRC_DISA);
  1313. #if CONFIG_SW_COEXIST_ENABLE
  1314. coex_disable();
  1315. #endif
  1316. if (s_lp_stat.phy_enabled) {
  1317. esp_phy_disable();
  1318. s_lp_stat.phy_enabled = 0;
  1319. }
  1320. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  1321. // disable low power mode
  1322. do {
  1323. #ifdef CONFIG_PM_ENABLE
  1324. if (s_lp_cntl.no_light_sleep) {
  1325. esp_pm_lock_release(s_light_sleep_pm_lock);
  1326. }
  1327. if (s_lp_stat.pm_lock_released == 0) {
  1328. esp_pm_lock_release(s_pm_lock);
  1329. s_lp_stat.pm_lock_released = 1;
  1330. } else {
  1331. assert(0);
  1332. }
  1333. #endif
  1334. } while (0);
  1335. return ESP_OK;
  1336. }
  1337. esp_bt_controller_status_t esp_bt_controller_get_status(void)
  1338. {
  1339. return btdm_controller_status;
  1340. }
  1341. /* extra functions */
  1342. esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
  1343. {
  1344. esp_err_t stat = ESP_FAIL;
  1345. switch (power_type) {
  1346. case ESP_BLE_PWR_TYPE_ADV:
  1347. case ESP_BLE_PWR_TYPE_SCAN:
  1348. case ESP_BLE_PWR_TYPE_DEFAULT:
  1349. if (ble_txpwr_set(power_type, power_level) == 0) {
  1350. stat = ESP_OK;
  1351. }
  1352. break;
  1353. default:
  1354. stat = ESP_ERR_NOT_SUPPORTED;
  1355. break;
  1356. }
  1357. return stat;
  1358. }
  1359. esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
  1360. {
  1361. esp_power_level_t lvl;
  1362. switch (power_type) {
  1363. case ESP_BLE_PWR_TYPE_ADV:
  1364. case ESP_BLE_PWR_TYPE_SCAN:
  1365. lvl = (esp_power_level_t)ble_txpwr_get(power_type);
  1366. break;
  1367. case ESP_BLE_PWR_TYPE_CONN_HDL0:
  1368. case ESP_BLE_PWR_TYPE_CONN_HDL1:
  1369. case ESP_BLE_PWR_TYPE_CONN_HDL2:
  1370. case ESP_BLE_PWR_TYPE_CONN_HDL3:
  1371. case ESP_BLE_PWR_TYPE_CONN_HDL4:
  1372. case ESP_BLE_PWR_TYPE_CONN_HDL5:
  1373. case ESP_BLE_PWR_TYPE_CONN_HDL6:
  1374. case ESP_BLE_PWR_TYPE_CONN_HDL7:
  1375. case ESP_BLE_PWR_TYPE_CONN_HDL8:
  1376. case ESP_BLE_PWR_TYPE_DEFAULT:
  1377. lvl = (esp_power_level_t)ble_txpwr_get(ESP_BLE_PWR_TYPE_DEFAULT);
  1378. break;
  1379. default:
  1380. lvl = ESP_PWR_LVL_INVALID;
  1381. break;
  1382. }
  1383. return lvl;
  1384. }
  1385. esp_err_t esp_bt_sleep_enable (void)
  1386. {
  1387. esp_err_t status;
  1388. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1389. return ESP_ERR_INVALID_STATE;
  1390. }
  1391. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  1392. btdm_controller_enable_sleep (true);
  1393. status = ESP_OK;
  1394. } else {
  1395. status = ESP_ERR_NOT_SUPPORTED;
  1396. }
  1397. return status;
  1398. }
  1399. esp_err_t esp_bt_sleep_disable (void)
  1400. {
  1401. esp_err_t status;
  1402. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1403. return ESP_ERR_INVALID_STATE;
  1404. }
  1405. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  1406. btdm_controller_enable_sleep (false);
  1407. status = ESP_OK;
  1408. } else {
  1409. status = ESP_ERR_NOT_SUPPORTED;
  1410. }
  1411. return status;
  1412. }
  1413. bool esp_bt_controller_is_sleeping(void)
  1414. {
  1415. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED ||
  1416. btdm_controller_get_sleep_mode() != ESP_BT_SLEEP_MODE_1) {
  1417. return false;
  1418. }
  1419. return !btdm_power_state_active();
  1420. }
  1421. void esp_bt_controller_wakeup_request(void)
  1422. {
  1423. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED ||
  1424. btdm_controller_get_sleep_mode() != ESP_BT_SLEEP_MODE_1) {
  1425. return;
  1426. }
  1427. btdm_wakeup_request();
  1428. }
  1429. int IRAM_ATTR esp_bt_h4tl_eif_io_event_notify(int event)
  1430. {
  1431. return btdm_hci_tl_io_event_post(event);
  1432. }
  1433. uint16_t esp_bt_get_tx_buf_num(void)
  1434. {
  1435. return l2c_ble_link_get_tx_buf_num();
  1436. }
  1437. static void coex_wifi_sleep_set_hook(bool sleep)
  1438. {
  1439. }
  1440. #endif /* CONFIG_BT_ENABLED */