bt.c 46 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include <stddef.h>
  7. #include <stdlib.h>
  8. #include <stdio.h>
  9. #include <string.h>
  10. #include "esp_random.h"
  11. #include "esp_heap_caps.h"
  12. #include "esp_heap_caps_init.h"
  13. #include <esp_mac.h>
  14. #include "sdkconfig.h"
  15. #include "nimble/nimble_port.h"
  16. #include "nimble/nimble_port_freertos.h"
  17. #include "esp_private/esp_modem_clock.h"
  18. #ifdef ESP_PLATFORM
  19. #include "esp_log.h"
  20. #endif // ESP_PLATFORM
  21. #if CONFIG_SW_COEXIST_ENABLE
  22. #include "esp_coexist_internal.h"
  23. #endif // CONFIG_SW_COEXIST_ENABLE
  24. #include "nimble/nimble_npl_os.h"
  25. #include "nimble/ble_hci_trans.h"
  26. #include "os/endian.h"
  27. #include "esp_bt.h"
  28. #include "esp_intr_alloc.h"
  29. #include "esp_sleep.h"
  30. #include "esp_pm.h"
  31. #include "esp_phy_init.h"
  32. #include "esp_private/periph_ctrl.h"
  33. #include "hci_uart.h"
  34. #include "bt_osi_mem.h"
  35. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
  36. #include "esp_private/sleep_retention.h"
  37. #endif
  38. #ifdef CONFIG_BT_BLUEDROID_ENABLED
  39. #include "hci/hci_hal.h"
  40. #endif // CONFIG_BT_BLUEDROID_ENABLED
  41. #include "freertos/FreeRTOS.h"
  42. #include "freertos/task.h"
  43. #include "esp_private/periph_ctrl.h"
  44. #include "esp_sleep.h"
  45. #include "hal/efuse_hal.h"
  46. /* Macro definition
  47. ************************************************************************
  48. */
  49. #define NIMBLE_PORT_LOG_TAG "BLE_INIT"
  50. #define OSI_COEX_VERSION 0x00010006
  51. #define OSI_COEX_MAGIC_VALUE 0xFADEBEAD
  52. #define EXT_FUNC_VERSION 0x20221122
  53. #define EXT_FUNC_MAGIC_VALUE 0xA5A5A5A5
  54. #define BT_ASSERT_PRINT ets_printf
  55. #ifdef CONFIG_BT_BLUEDROID_ENABLED
  56. /* ACL_DATA_MBUF_LEADINGSPCAE: The leadingspace in user info header for ACL data */
  57. #define ACL_DATA_MBUF_LEADINGSPCAE 4
  58. #endif // CONFIG_BT_BLUEDROID_ENABLED
  59. /* Types definition
  60. ************************************************************************
  61. */
  62. struct osi_coex_funcs_t {
  63. uint32_t _magic;
  64. uint32_t _version;
  65. void (* _coex_wifi_sleep_set)(bool sleep);
  66. int (* _coex_core_ble_conn_dyn_prio_get)(bool *low, bool *high);
  67. void (* _coex_schm_status_bit_set)(uint32_t type, uint32_t status);
  68. void (* _coex_schm_status_bit_clear)(uint32_t type, uint32_t status);
  69. };
  70. struct ext_funcs_t {
  71. uint32_t ext_version;
  72. int (*_esp_intr_alloc)(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle);
  73. int (*_esp_intr_free)(void **ret_handle);
  74. void *(* _malloc)(size_t size);
  75. void (*_free)(void *p);
  76. void (*_hal_uart_start_tx)(int);
  77. int (*_hal_uart_init_cbs)(int, hci_uart_tx_char, hci_uart_tx_done, hci_uart_rx_char, void *);
  78. int (*_hal_uart_config)(int, int32_t, uint8_t, uint8_t, uart_parity_t, uart_hw_flowcontrol_t);
  79. int (*_hal_uart_close)(int);
  80. void (*_hal_uart_blocking_tx)(int, uint8_t);
  81. int (*_hal_uart_init)(int, void *);
  82. int (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param,
  83. uint32_t prio, void *task_handle, uint32_t core_id);
  84. void (* _task_delete)(void *task_handle);
  85. void (*_osi_assert)(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2);
  86. uint32_t (* _os_random)(void);
  87. int (* _ecc_gen_key_pair)(uint8_t *public, uint8_t *priv);
  88. int (* _ecc_gen_dh_key)(const uint8_t *remote_pub_key_x, const uint8_t *remote_pub_key_y,
  89. const uint8_t *local_priv_key, uint8_t *dhkey);
  90. void (* _esp_reset_rpa_moudle)(void);
  91. uint32_t magic;
  92. };
  93. #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  94. typedef void (*interface_func_t) (uint32_t len, const uint8_t*addr, bool end);
  95. #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  96. /* External functions or variables
  97. ************************************************************************
  98. */
  99. extern int ble_osi_coex_funcs_register(struct osi_coex_funcs_t *coex_funcs);
  100. extern int ble_controller_init(esp_bt_controller_config_t *cfg);
  101. #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  102. extern int ble_log_init_async(interface_func_t bt_controller_log_interface, bool task_create);
  103. extern int ble_log_deinit_async(void);
  104. extern void ble_log_async_output_dump_all(bool output);
  105. #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  106. extern int ble_controller_deinit(void);
  107. extern int ble_controller_enable(uint8_t mode);
  108. extern int ble_controller_disable(void);
  109. extern int esp_register_ext_funcs (struct ext_funcs_t *);
  110. extern void esp_unregister_ext_funcs (void);
  111. extern int esp_ble_ll_set_public_addr(const uint8_t *addr);
  112. extern int esp_register_npl_funcs (struct npl_funcs_t *p_npl_func);
  113. extern void esp_unregister_npl_funcs (void);
  114. extern void npl_freertos_mempool_deinit(void);
  115. extern int os_msys_buf_alloc(void);
  116. extern uint32_t r_os_cputime_get32(void);
  117. extern uint32_t r_os_cputime_ticks_to_usecs(uint32_t ticks);
  118. extern void ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg,
  119. void *w_arg, uint32_t us_to_enabled);
  120. extern void r_ble_rtc_wake_up_state_clr(void);
  121. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
  122. extern const sleep_retention_entries_config_t *esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
  123. #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
  124. extern int os_msys_init(void);
  125. extern void os_msys_buf_free(void);
  126. extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
  127. const uint8_t *peer_pub_key_y,
  128. const uint8_t *our_priv_key, uint8_t *out_dhkey);
  129. extern int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv);
  130. extern int ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
  131. extern int ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
  132. extern int ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_count_info_t * npl_info);
  133. extern uint32_t _bt_bss_start;
  134. extern uint32_t _bt_bss_end;
  135. extern uint32_t _bt_controller_bss_start;
  136. extern uint32_t _bt_controller_bss_end;
  137. extern uint32_t _bt_data_start;
  138. extern uint32_t _bt_data_end;
  139. extern uint32_t _bt_controller_data_start;
  140. extern uint32_t _bt_controller_data_end;
  141. /* Local Function Declaration
  142. *********************************************************************
  143. */
  144. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status);
  145. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status);
  146. static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth,
  147. void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  148. static void task_delete_wrapper(void *task_handle);
  149. #if CONFIG_BT_LE_HCI_INTERFACE_USE_UART
  150. static void hci_uart_start_tx_wrapper(int uart_no);
  151. static int hci_uart_init_cbs_wrapper(int uart_no, hci_uart_tx_char tx_func,
  152. hci_uart_tx_done tx_done, hci_uart_rx_char rx_func, void *arg);
  153. static int hci_uart_config_wrapper(int uart_no, int32_t speed, uint8_t databits, uint8_t stopbits,
  154. uart_parity_t parity, uart_hw_flowcontrol_t flow_ctl);
  155. static int hci_uart_close_wrapper(int uart_no);
  156. static void hci_uart_blocking_tx_wrapper(int port, uint8_t data);
  157. static int hci_uart_init_wrapper(int uart_no, void *cfg);
  158. #endif // CONFIG_BT_LE_HCI_INTERFACE_USE_UART
  159. static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler,
  160. void *arg, void **ret_handle_in);
  161. static int esp_intr_free_wrapper(void **ret_handle);
  162. static void osi_assert_wrapper(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2);
  163. static uint32_t osi_random_wrapper(void);
  164. static void esp_reset_rpa_moudle(void);
  165. static int esp_ecc_gen_key_pair(uint8_t *pub, uint8_t *priv);
  166. static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_key_y,
  167. const uint8_t *our_priv_key, uint8_t *out_dhkey);
  168. #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  169. static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, bool end);
  170. #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  171. /* Local variable definition
  172. ***************************************************************************
  173. */
  174. /* Static variable declare */
  175. static DRAM_ATTR esp_bt_controller_status_t ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  176. /* This variable tells if BLE is running */
  177. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
  178. static bool s_ble_backed_up = false;
  179. #endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
  180. static bool s_ble_active = false;
  181. #ifdef CONFIG_PM_ENABLE
  182. static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock = NULL;
  183. #define BTDM_MIN_TIMER_UNCERTAINTY_US (200)
  184. #endif // CONFIG_PM_ENABLE
  185. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  186. #define BLE_RTC_DELAY_US_LIGHT_SLEEP (2500)
  187. #define BLE_RTC_DELAY_US_MODEM_SLEEP (500)
  188. #endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  189. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  190. #define BLE_RTC_DELAY_US_LIGHT_SLEEP (2000)
  191. #define BLE_RTC_DELAY_US_MODEM_SLEEP (0)
  192. static void ble_sleep_timer_callback(void *arg);
  193. static DRAM_ATTR esp_timer_handle_t s_ble_sleep_timer = NULL;
  194. #endif // CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  195. static const struct osi_coex_funcs_t s_osi_coex_funcs_ro = {
  196. ._magic = OSI_COEX_MAGIC_VALUE,
  197. ._version = OSI_COEX_VERSION,
  198. ._coex_wifi_sleep_set = NULL,
  199. ._coex_core_ble_conn_dyn_prio_get = NULL,
  200. ._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper,
  201. ._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper,
  202. };
  203. struct ext_funcs_t ext_funcs_ro = {
  204. .ext_version = EXT_FUNC_VERSION,
  205. ._esp_intr_alloc = esp_intr_alloc_wrapper,
  206. ._esp_intr_free = esp_intr_free_wrapper,
  207. ._malloc = bt_osi_mem_malloc_internal,
  208. ._free = bt_osi_mem_free,
  209. #if CONFIG_BT_LE_HCI_INTERFACE_USE_UART
  210. ._hal_uart_start_tx = hci_uart_start_tx_wrapper,
  211. ._hal_uart_init_cbs = hci_uart_init_cbs_wrapper,
  212. ._hal_uart_config = hci_uart_config_wrapper,
  213. ._hal_uart_close = hci_uart_close_wrapper,
  214. ._hal_uart_blocking_tx = hci_uart_blocking_tx_wrapper,
  215. ._hal_uart_init = hci_uart_init_wrapper,
  216. #endif //CONFIG_BT_LE_HCI_INTERFACE_USE_UART
  217. ._task_create = task_create_wrapper,
  218. ._task_delete = task_delete_wrapper,
  219. ._osi_assert = osi_assert_wrapper,
  220. ._os_random = osi_random_wrapper,
  221. ._ecc_gen_key_pair = esp_ecc_gen_key_pair,
  222. ._ecc_gen_dh_key = esp_ecc_gen_dh_key,
  223. ._esp_reset_rpa_moudle = esp_reset_rpa_moudle,
  224. .magic = EXT_FUNC_MAGIC_VALUE,
  225. };
  226. static void IRAM_ATTR esp_reset_rpa_moudle(void)
  227. {
  228. }
  229. static void IRAM_ATTR osi_assert_wrapper(const uint32_t ln, const char *fn,
  230. uint32_t param1, uint32_t param2)
  231. {
  232. BT_ASSERT_PRINT("BLE assert: line %d in function %s, param: 0x%x, 0x%x", ln, fn, param1, param2);
  233. assert(0);
  234. }
  235. static uint32_t IRAM_ATTR osi_random_wrapper(void)
  236. {
  237. return esp_random();
  238. }
  239. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
  240. {
  241. #if CONFIG_SW_COEXIST_ENABLE
  242. coex_schm_status_bit_set(type, status);
  243. #endif // CONFIG_SW_COEXIST_ENABLE
  244. }
  245. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
  246. {
  247. #if CONFIG_SW_COEXIST_ENABLE
  248. coex_schm_status_bit_clear(type, status);
  249. #endif // CONFIG_SW_COEXIST_ENABLE
  250. }
  251. #ifdef CONFIG_BT_BLUEDROID_ENABLED
  252. bool esp_vhci_host_check_send_available(void)
  253. {
  254. if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  255. return false;
  256. }
  257. return true;
  258. }
  259. static struct os_mbuf *ble_hs_mbuf_gen_pkt(uint16_t leading_space)
  260. {
  261. struct os_mbuf *om;
  262. int rc;
  263. om = os_msys_get_pkthdr(0, 0);
  264. if (om == NULL) {
  265. return NULL;
  266. }
  267. if (om->om_omp->omp_databuf_len < leading_space) {
  268. rc = os_mbuf_free_chain(om);
  269. assert(rc == 0);
  270. return NULL;
  271. }
  272. om->om_data += leading_space;
  273. return om;
  274. }
  275. struct os_mbuf *ble_hs_mbuf_acl_pkt(void)
  276. {
  277. return ble_hs_mbuf_gen_pkt(4 + 1);
  278. }
  279. void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
  280. {
  281. if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  282. return;
  283. }
  284. if (*(data) == DATA_TYPE_COMMAND) {
  285. struct ble_hci_cmd *cmd = NULL;
  286. cmd = (struct ble_hci_cmd *) ble_hci_trans_buf_alloc(BLE_HCI_TRANS_BUF_CMD);
  287. memcpy((uint8_t *)cmd, data + 1, len - 1);
  288. ble_hci_trans_hs_cmd_tx((uint8_t *)cmd);
  289. }
  290. if (*(data) == DATA_TYPE_ACL) {
  291. struct os_mbuf *om = os_msys_get_pkthdr(len, ACL_DATA_MBUF_LEADINGSPCAE);
  292. assert(om);
  293. assert(os_mbuf_append(om, &data[1], len - 1) == 0);
  294. ble_hci_trans_hs_acl_tx(om);
  295. }
  296. }
  297. esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
  298. {
  299. if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  300. return ESP_FAIL;
  301. }
  302. ble_hci_trans_cfg_hs(ble_hs_hci_rx_evt, NULL, ble_hs_rx_data, NULL);
  303. return ESP_OK;
  304. }
  305. #endif // CONFIG_BT_BLUEDROID_ENABLED
  306. static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth,
  307. void *param, uint32_t prio, void *task_handle, uint32_t core_id)
  308. {
  309. return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle,
  310. (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
  311. }
  312. static void task_delete_wrapper(void *task_handle)
  313. {
  314. vTaskDelete(task_handle);
  315. }
  316. static int esp_ecc_gen_key_pair(uint8_t *pub, uint8_t *priv)
  317. {
  318. int rc = -1;
  319. #if CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
  320. rc = ble_sm_alg_gen_key_pair(pub, priv);
  321. #endif // CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
  322. return rc;
  323. }
  324. static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_key_y,
  325. const uint8_t *our_priv_key, uint8_t *out_dhkey)
  326. {
  327. int rc = -1;
  328. #if CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
  329. rc = ble_sm_alg_gen_dhkey(peer_pub_key_x, peer_pub_key_y, our_priv_key, out_dhkey);
  330. #endif // CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
  331. return rc;
  332. }
  333. #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  334. static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, bool end)
  335. {
  336. if (!end) {
  337. for (int i = 0; i < len; i++) {
  338. esp_rom_printf("%02x,", addr[i]);
  339. }
  340. } else {
  341. for (int i = 0; i < len; i++) {
  342. esp_rom_printf("%02x,", addr[i]);
  343. }
  344. esp_rom_printf("\n");
  345. }
  346. }
  347. #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  348. #ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
  349. static void hci_uart_start_tx_wrapper(int uart_no)
  350. {
  351. hci_uart_start_tx(uart_no);
  352. }
  353. static int hci_uart_init_cbs_wrapper(int uart_no, hci_uart_tx_char tx_func,
  354. hci_uart_tx_done tx_done, hci_uart_rx_char rx_func, void *arg)
  355. {
  356. int rc = -1;
  357. rc = hci_uart_init_cbs(uart_no, tx_func, tx_done, rx_func, arg);
  358. return rc;
  359. }
  360. static int hci_uart_config_wrapper(int port_num, int32_t baud_rate, uint8_t data_bits,
  361. uint8_t stop_bits, uart_parity_t parity,
  362. uart_hw_flowcontrol_t flow_ctl)
  363. {
  364. int rc = -1;
  365. rc = hci_uart_config(port_num, baud_rate, data_bits, stop_bits, parity, flow_ctl);
  366. return rc;
  367. }
  368. static int hci_uart_close_wrapper(int uart_no)
  369. {
  370. int rc = -1;
  371. rc = hci_uart_close(uart_no);
  372. return rc;
  373. }
  374. static void hci_uart_blocking_tx_wrapper(int port, uint8_t data)
  375. {
  376. //This function is nowhere to use.
  377. }
  378. static int hci_uart_init_wrapper(int uart_no, void *cfg)
  379. {
  380. //This function is nowhere to use.
  381. return 0;
  382. }
  383. #endif //CONFIG_BT_LE_HCI_INTERFACE_USE_UART
  384. static int ble_hci_unregistered_hook(void*, void*)
  385. {
  386. ESP_LOGD(NIMBLE_PORT_LOG_TAG,"%s ble hci rx_evt is not registered.",__func__);
  387. return 0;
  388. }
  389. static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler,
  390. void *arg, void **ret_handle_in)
  391. {
  392. int rc = esp_intr_alloc(source, flags | ESP_INTR_FLAG_IRAM, handler,
  393. arg, (intr_handle_t *)ret_handle_in);
  394. return rc;
  395. }
  396. static int esp_intr_free_wrapper(void **ret_handle)
  397. {
  398. int rc = 0;
  399. rc = esp_intr_free((intr_handle_t) * ret_handle);
  400. *ret_handle = NULL;
  401. return rc;
  402. }
  403. IRAM_ATTR void controller_sleep_cb(uint32_t enable_tick, void *arg)
  404. {
  405. if (!s_ble_active) {
  406. return;
  407. }
  408. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
  409. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  410. uint32_t delta_tick;
  411. uint32_t us_to_sleep;
  412. uint32_t sleep_tick;
  413. uint32_t tick_invalid = *(uint32_t*)(arg);
  414. assert(arg != NULL);
  415. if (!tick_invalid) {
  416. sleep_tick = r_os_cputime_get32();
  417. /* start a timer to wake up and acquire the pm_lock before modem_sleep awakes */
  418. delta_tick = enable_tick - sleep_tick;
  419. if (delta_tick & 0x80000000) {
  420. return;
  421. }
  422. us_to_sleep = r_os_cputime_ticks_to_usecs(delta_tick);
  423. if (us_to_sleep <= BTDM_MIN_TIMER_UNCERTAINTY_US) {
  424. return;
  425. }
  426. esp_err_t err = esp_timer_start_once(s_ble_sleep_timer,
  427. us_to_sleep - BTDM_MIN_TIMER_UNCERTAINTY_US);
  428. if (err != ESP_OK) {
  429. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ESP timer start failed");
  430. return;
  431. }
  432. }
  433. #endif // CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  434. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  435. r_ble_rtc_wake_up_state_clr();
  436. #endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  437. #if SOC_PM_RETENTION_HAS_CLOCK_BUG
  438. sleep_retention_do_extra_retention(true);
  439. s_ble_backed_up = true;
  440. #endif // SOC_PM_RETENTION_HAS_CLOCK_BUG
  441. #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
  442. esp_phy_disable();
  443. #ifdef CONFIG_PM_ENABLE
  444. esp_pm_lock_release(s_pm_lock);
  445. #endif // CONFIG_PM_ENABLE
  446. s_ble_active = false;
  447. }
  448. IRAM_ATTR void controller_wakeup_cb(void *arg)
  449. {
  450. if (s_ble_active) {
  451. return;
  452. }
  453. #ifdef CONFIG_PM_ENABLE
  454. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  455. esp_pm_lock_acquire(s_pm_lock);
  456. r_ble_rtc_wake_up_state_clr();
  457. #endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  458. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE && SOC_PM_RETENTION_HAS_CLOCK_BUG
  459. sleep_retention_do_extra_retention(false);
  460. s_ble_backed_up = false;
  461. #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE && SOC_PM_RETENTION_HAS_CLOCK_BUG */
  462. #endif //CONFIG_PM_ENABLE
  463. esp_phy_enable();
  464. s_ble_active = true;
  465. }
  466. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
  467. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  468. static void ble_sleep_timer_callback(void * arg)
  469. {
  470. esp_pm_lock_acquire(s_pm_lock);
  471. }
  472. #endif // CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  473. esp_err_t sleep_modem_ble_mac_modem_state_init(uint8_t extra)
  474. {
  475. uint8_t size;
  476. const sleep_retention_entries_config_t *ble_mac_modem_config = esp_ble_mac_retention_link_get(&size, extra);
  477. esp_err_t err = sleep_retention_entries_create(ble_mac_modem_config, size, REGDMA_LINK_PRI_5, SLEEP_RETENTION_MODULE_BLE_MAC);
  478. if (err == ESP_OK) {
  479. ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Modem BLE MAC retention initialization");
  480. }
  481. return err;
  482. }
  483. static void sleep_modem_ble_mac_modem_state_deinit(void)
  484. {
  485. sleep_retention_entries_destroy(SLEEP_RETENTION_MODULE_BLE_MAC);
  486. }
  487. #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
  488. esp_err_t controller_sleep_init(void)
  489. {
  490. esp_err_t rc = 0;
  491. #ifdef CONFIG_BT_LE_SLEEP_ENABLE
  492. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "BLE modem sleep is enabled");
  493. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
  494. ble_lll_rfmgmt_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0,
  495. BLE_RTC_DELAY_US_LIGHT_SLEEP);
  496. #else
  497. ble_lll_rfmgmt_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0,
  498. BLE_RTC_DELAY_US_MODEM_SLEEP);
  499. #endif /* FREERTOS_USE_TICKLESS_IDLE */
  500. #endif // CONFIG_BT_LE_SLEEP_ENABLE
  501. #ifdef CONFIG_PM_ENABLE
  502. rc = esp_pm_lock_create(ESP_PM_CPU_FREQ_MAX, 0, "bt", &s_pm_lock);
  503. if (rc != ESP_OK) {
  504. goto error;
  505. }
  506. esp_pm_lock_acquire(s_pm_lock);
  507. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
  508. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  509. esp_timer_create_args_t create_args = {
  510. .callback = ble_sleep_timer_callback,
  511. .arg = NULL,
  512. .name = "btSlp"
  513. };
  514. rc = esp_timer_create(&create_args, &s_ble_sleep_timer);
  515. if (rc != ESP_OK) {
  516. goto error;
  517. }
  518. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is ESP timer");
  519. #endif //CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  520. /* Create a new regdma link for BLE related register restoration */
  521. rc = sleep_modem_ble_mac_modem_state_init(1);
  522. assert(rc == 0);
  523. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  524. esp_sleep_enable_bt_wakeup();
  525. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is BLE timer");
  526. #endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  527. #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
  528. return rc;
  529. error:
  530. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
  531. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  532. esp_sleep_disable_bt_wakeup();
  533. #endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  534. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  535. if (s_ble_sleep_timer != NULL) {
  536. esp_timer_stop(s_ble_sleep_timer);
  537. esp_timer_delete(s_ble_sleep_timer);
  538. s_ble_sleep_timer = NULL;
  539. }
  540. #endif // CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  541. #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
  542. /*lock should release first and then delete*/
  543. if (s_pm_lock != NULL) {
  544. esp_pm_lock_release(s_pm_lock);
  545. esp_pm_lock_delete(s_pm_lock);
  546. s_pm_lock = NULL;
  547. }
  548. #endif // CONFIG_PM_ENABLE
  549. return rc;
  550. }
  551. void controller_sleep_deinit(void)
  552. {
  553. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
  554. if (s_ble_backed_up) {
  555. sleep_retention_module_deinit();
  556. s_ble_backed_up = false;
  557. }
  558. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  559. r_ble_rtc_wake_up_state_clr();
  560. esp_sleep_disable_bt_wakeup();
  561. #endif //CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  562. sleep_modem_ble_mac_modem_state_deinit();
  563. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  564. if (s_ble_sleep_timer != NULL) {
  565. esp_timer_stop(s_ble_sleep_timer);
  566. esp_timer_delete(s_ble_sleep_timer);
  567. s_ble_sleep_timer = NULL;
  568. }
  569. #endif //CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  570. #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
  571. #ifdef CONFIG_PM_ENABLE
  572. /* lock should be released first */
  573. esp_pm_lock_release(s_pm_lock);
  574. esp_pm_lock_delete(s_pm_lock);
  575. s_pm_lock = NULL;
  576. #endif //CONFIG_PM_ENABLE
  577. }
  578. typedef enum {
  579. FILTER_DUPLICATE_PDUTYPE = BIT(0),
  580. FILTER_DUPLICATE_LENGTH = BIT(1),
  581. FILTER_DUPLICATE_ADDRESS = BIT(2),
  582. FILTER_DUPLICATE_ADVDATA = BIT(3),
  583. FILTER_DUPLICATE_DEFAULT = FILTER_DUPLICATE_PDUTYPE | FILTER_DUPLICATE_ADDRESS,
  584. FILTER_DUPLICATE_PDU_ALL = 0xF,
  585. FILTER_DUPLICATE_EXCEPTION_FOR_MESH = BIT(4),
  586. FILTER_DUPLICATE_AD_TYPE = BIT(5),
  587. }disc_duplicate_mode_t;
  588. extern void filter_duplicate_mode_enable(disc_duplicate_mode_t mode);
  589. extern void filter_duplicate_mode_disable(disc_duplicate_mode_t mode);
  590. extern void filter_duplicate_set_ring_list_max_num(uint32_t max_num);
  591. extern void scan_duplicate_cache_refresh_set_time(uint32_t period_time);
  592. int
  593. ble_vhci_disc_duplicate_mode_enable(int mode)
  594. {
  595. // TODO: use vendor hci to update
  596. filter_duplicate_mode_enable(mode);
  597. return true;
  598. }
  599. int
  600. ble_vhci_disc_duplicate_mode_disable(int mode)
  601. {
  602. // TODO: use vendor hci to update
  603. filter_duplicate_mode_disable(mode);
  604. return true;
  605. }
  606. int ble_vhci_disc_duplicate_set_max_cache_size(int max_cache_size){
  607. // TODO: use vendor hci to update
  608. filter_duplicate_set_ring_list_max_num(max_cache_size);
  609. return true;
  610. }
  611. int ble_vhci_disc_duplicate_set_period_refresh_time(int refresh_period_time){
  612. // TODO: use vendor hci to update
  613. scan_duplicate_cache_refresh_set_time(refresh_period_time);
  614. return true;
  615. }
  616. /**
  617. * @brief Config scan duplicate option mode from menuconfig (Adapt to the old configuration method.)
  618. */
  619. void ble_controller_scan_duplicate_config(void)
  620. {
  621. uint32_t duplicate_mode = FILTER_DUPLICATE_DEFAULT;
  622. uint32_t cache_size = 100;
  623. #if CONFIG_BT_LE_SCAN_DUPL == true
  624. cache_size = CONFIG_BT_LE_SCAN_DUPL_CACHE_SIZE;
  625. if (CONFIG_BT_LE_SCAN_DUPL_TYPE == 0) {
  626. duplicate_mode = FILTER_DUPLICATE_ADDRESS | FILTER_DUPLICATE_PDUTYPE;
  627. } else if (CONFIG_BT_LE_SCAN_DUPL_TYPE == 1) {
  628. duplicate_mode = FILTER_DUPLICATE_ADVDATA;
  629. } else if (CONFIG_BT_LE_SCAN_DUPL_TYPE == 2) {
  630. duplicate_mode = FILTER_DUPLICATE_ADDRESS | FILTER_DUPLICATE_ADVDATA;
  631. }
  632. duplicate_mode |= FILTER_DUPLICATE_EXCEPTION_FOR_MESH;
  633. ble_vhci_disc_duplicate_set_period_refresh_time(CONFIG_BT_LE_SCAN_DUPL_CACHE_REFRESH_PERIOD);
  634. #endif
  635. ble_vhci_disc_duplicate_mode_disable(0xFFFFFFFF);
  636. ble_vhci_disc_duplicate_mode_enable(duplicate_mode);
  637. ble_vhci_disc_duplicate_set_max_cache_size(cache_size);
  638. }
  639. esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
  640. {
  641. uint8_t mac[6];
  642. esp_err_t ret = ESP_OK;
  643. ble_npl_count_info_t npl_info;
  644. memset(&npl_info, 0, sizeof(ble_npl_count_info_t));
  645. if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
  646. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
  647. return ESP_ERR_INVALID_STATE;
  648. }
  649. if (!cfg) {
  650. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "cfg is NULL");
  651. return ESP_ERR_INVALID_ARG;
  652. }
  653. ret = esp_register_ext_funcs(&ext_funcs_ro);
  654. if (ret != ESP_OK) {
  655. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "register extend functions failed");
  656. return ret;
  657. }
  658. /* Initialize the function pointers for OS porting */
  659. npl_freertos_funcs_init();
  660. struct npl_funcs_t *p_npl_funcs = npl_freertos_funcs_get();
  661. if (!p_npl_funcs) {
  662. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl functions get failed");
  663. return ESP_ERR_INVALID_ARG;
  664. }
  665. ret = esp_register_npl_funcs(p_npl_funcs);
  666. if (ret != ESP_OK) {
  667. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl functions register failed");
  668. goto free_mem;
  669. }
  670. ble_get_npl_element_info(cfg, &npl_info);
  671. npl_freertos_set_controller_npl_info(&npl_info);
  672. if (npl_freertos_mempool_init() != 0) {
  673. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl mempool init failed");
  674. ret = ESP_ERR_INVALID_ARG;
  675. goto free_mem;
  676. }
  677. /* Initialize the global memory pool */
  678. ret = os_msys_buf_alloc();
  679. if (ret != ESP_OK) {
  680. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "os msys alloc failed");
  681. goto free_mem;
  682. }
  683. os_msys_init();
  684. #if CONFIG_BT_NIMBLE_ENABLED
  685. /* ble_npl_eventq_init() needs to use npl functions in rom and
  686. * must be called after esp_bt_controller_init().
  687. */
  688. ble_npl_eventq_init(nimble_port_get_dflt_eventq());
  689. #endif // CONFIG_BT_NIMBLE_ENABLED
  690. /* Enable BT-related clocks */
  691. modem_clock_module_enable(PERIPH_BT_MODULE);
  692. /* Select slow clock source for BT momdule */
  693. #if CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL
  694. uint32_t chip_version = efuse_hal_chip_revision();
  695. ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using main XTAL as clock source");
  696. if (chip_version == 0) {
  697. modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL, (400 - 1));
  698. } else{
  699. modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL, (5 - 1));
  700. }
  701. #else
  702. #if CONFIG_RTC_CLK_SRC_INT_RC
  703. ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 136 kHz RC as clock source, can only run legacy ADV or SCAN due to low clock accuracy!");
  704. modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_RC_SLOW, (5 - 1));
  705. #elif CONFIG_RTC_CLK_SRC_EXT_CRYS
  706. ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using external 32.768 kHz XTAL as clock source");
  707. modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_XTAL32K, (1 - 1));
  708. #elif CONFIG_RTC_CLK_SRC_INT_RC32K
  709. ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 32 kHz RC as clock source, can only run legacy ADV or SCAN due to low clock accuracy!");
  710. modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_RC32K, (1 - 1));
  711. #elif CONFIG_RTC_CLK_SRC_EXT_OSC
  712. ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 32 kHz oscillator as clock source, can only run legacy ADV or SCAN due to low clock accuracy!");
  713. modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_EXT32K, (1 - 1));
  714. #else
  715. ESP_LOGE(NIMBLE_PORT_LOG_TAG, "Unsupported clock source");
  716. assert(0);
  717. #endif
  718. #endif /* CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL */
  719. esp_phy_modem_init();
  720. esp_phy_enable();
  721. esp_btbb_enable();
  722. s_ble_active = true;
  723. if (ble_osi_coex_funcs_register((struct osi_coex_funcs_t *)&s_osi_coex_funcs_ro) != 0) {
  724. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "osi coex funcs reg failed");
  725. ret = ESP_ERR_INVALID_ARG;
  726. goto free_controller;
  727. }
  728. #if CONFIG_SW_COEXIST_ENABLE
  729. coex_init();
  730. #endif // CONFIG_SW_COEXIST_ENABLE
  731. ret = ble_controller_init(cfg);
  732. if (ret != ESP_OK) {
  733. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_init failed %d", ret);
  734. goto free_controller;
  735. }
  736. #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  737. interface_func_t bt_controller_log_interface;
  738. bt_controller_log_interface = esp_bt_controller_log_interface;
  739. #if CONFIG_BT_LE_CONTROLLER_LOG_DUMP_ONLY
  740. ret = ble_log_init_async(bt_controller_log_interface, false);
  741. #else
  742. ret = ble_log_init_async(bt_controller_log_interface, true);
  743. #endif // CONFIG_BT_CONTROLLER_LOG_DUMP
  744. if (ret != ESP_OK) {
  745. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_log_init failed %d", ret);
  746. goto free_controller;
  747. }
  748. #endif // CONFIG_BT_CONTROLLER_LOG_ENABLED
  749. ble_controller_scan_duplicate_config();
  750. ret = controller_sleep_init();
  751. if (ret != ESP_OK) {
  752. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "controller_sleep_init failed %d", ret);
  753. goto free_controller;
  754. }
  755. ESP_ERROR_CHECK(esp_read_mac((uint8_t *)mac, ESP_MAC_BT));
  756. swap_in_place(mac, 6);
  757. esp_ble_ll_set_public_addr(mac);
  758. ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  759. ble_hci_trans_cfg_hs((ble_hci_trans_rx_cmd_fn *)ble_hci_unregistered_hook,NULL,
  760. (ble_hci_trans_rx_acl_fn *)ble_hci_unregistered_hook,NULL);
  761. return ESP_OK;
  762. free_controller:
  763. controller_sleep_deinit();
  764. #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  765. ble_log_deinit_async();
  766. #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  767. ble_controller_deinit();
  768. esp_btbb_disable();
  769. esp_phy_disable();
  770. esp_phy_modem_deinit();
  771. modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
  772. modem_clock_module_disable(PERIPH_BT_MODULE);
  773. #if CONFIG_BT_NIMBLE_ENABLED
  774. ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
  775. #endif // CONFIG_BT_NIMBLE_ENABLED
  776. free_mem:
  777. os_msys_buf_free();
  778. npl_freertos_mempool_deinit();
  779. esp_unregister_npl_funcs();
  780. npl_freertos_funcs_deinit();
  781. esp_unregister_ext_funcs();
  782. return ret;
  783. }
  784. esp_err_t esp_bt_controller_deinit(void)
  785. {
  786. if ((ble_controller_status < ESP_BT_CONTROLLER_STATUS_INITED) ||
  787. (ble_controller_status >= ESP_BT_CONTROLLER_STATUS_ENABLED)) {
  788. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
  789. return ESP_FAIL;
  790. }
  791. controller_sleep_deinit();
  792. esp_btbb_disable();
  793. if (s_ble_active) {
  794. esp_phy_disable();
  795. s_ble_active = false;
  796. }
  797. esp_phy_modem_deinit();
  798. modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
  799. modem_clock_module_disable(PERIPH_BT_MODULE);
  800. #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  801. ble_log_deinit_async();
  802. #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  803. ble_controller_deinit();
  804. #if CONFIG_BT_NIMBLE_ENABLED
  805. /* De-initialize default event queue */
  806. ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
  807. #endif // CONFIG_BT_NIMBLE_ENABLED
  808. os_msys_buf_free();
  809. esp_unregister_npl_funcs();
  810. esp_unregister_ext_funcs();
  811. /* De-initialize npl functions */
  812. npl_freertos_funcs_deinit();
  813. npl_freertos_mempool_deinit();
  814. ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  815. return ESP_OK;
  816. }
  817. esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
  818. {
  819. esp_err_t ret = ESP_OK;
  820. if (mode != ESP_BT_MODE_BLE) {
  821. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller mode");
  822. return ESP_FAIL;
  823. }
  824. if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  825. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
  826. return ESP_FAIL;
  827. }
  828. #if CONFIG_SW_COEXIST_ENABLE
  829. coex_enable();
  830. #endif // CONFIG_SW_COEXIST_ENABLE
  831. if (ble_controller_enable(mode) != 0) {
  832. ret = ESP_FAIL;
  833. goto error;
  834. }
  835. ble_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
  836. return ESP_OK;
  837. error:
  838. #if CONFIG_SW_COEXIST_ENABLE
  839. coex_disable();
  840. #endif
  841. return ret;
  842. }
  843. esp_err_t esp_bt_controller_disable(void)
  844. {
  845. if (ble_controller_status < ESP_BT_CONTROLLER_STATUS_ENABLED) {
  846. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
  847. return ESP_FAIL;
  848. }
  849. if (ble_controller_disable() != 0) {
  850. return ESP_FAIL;
  851. }
  852. #if CONFIG_SW_COEXIST_ENABLE
  853. coex_disable();
  854. #endif
  855. ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  856. return ESP_OK;
  857. }
  858. esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
  859. {
  860. ESP_LOGD(NIMBLE_PORT_LOG_TAG, "%s not implemented, return OK", __func__);
  861. return ESP_OK;
  862. }
  863. static esp_err_t try_heap_caps_add_region(intptr_t start, intptr_t end)
  864. {
  865. int ret = heap_caps_add_region(start, end);
  866. /* heap_caps_add_region() returns ESP_ERR_INVALID_SIZE if the memory region is
  867. * is too small to fit a heap. This cannot be termed as a fatal error and hence
  868. * we replace it by ESP_OK
  869. */
  870. if (ret == ESP_ERR_INVALID_SIZE) {
  871. return ESP_OK;
  872. }
  873. return ret;
  874. }
  875. esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
  876. {
  877. intptr_t mem_start, mem_end;
  878. if (mode & ESP_BT_MODE_BLE) {
  879. /* If the addresses of btdm .bss and bt .bss are consecutive,
  880. * they are registered in the system heap as a piece of memory
  881. */
  882. if(_bt_bss_end == _bt_controller_bss_start) {
  883. mem_start = (intptr_t)&_bt_bss_start;
  884. mem_end = (intptr_t)&_bt_controller_bss_end;
  885. if (mem_start != mem_end) {
  886. ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release BSS [0x%08x] - [0x%08x], len %d",
  887. mem_start, mem_end, mem_end - mem_start);
  888. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  889. }
  890. } else {
  891. mem_start = (intptr_t)&_bt_bss_start;
  892. mem_end = (intptr_t)&_bt_bss_end;
  893. if (mem_start != mem_end) {
  894. ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release BT BSS [0x%08x] - [0x%08x], len %d",
  895. mem_start, mem_end, mem_end - mem_start);
  896. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  897. }
  898. mem_start = (intptr_t)&_bt_controller_bss_start;
  899. mem_end = (intptr_t)&_bt_controller_bss_end;
  900. if (mem_start != mem_end) {
  901. ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release Controller BSS [0x%08x] - [0x%08x], len %d",
  902. mem_start, mem_end, mem_end - mem_start);
  903. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  904. }
  905. }
  906. /* If the addresses of btdm .data and bt .data are consecutive,
  907. * they are registered in the system heap as a piece of memory
  908. */
  909. if(_bt_data_end == _bt_controller_data_start) {
  910. mem_start = (intptr_t)&_bt_data_start;
  911. mem_end = (intptr_t)&_bt_controller_data_end;
  912. if (mem_start != mem_end) {
  913. ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release data [0x%08x] - [0x%08x], len %d",
  914. mem_start, mem_end, mem_end - mem_start);
  915. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  916. }
  917. } else {
  918. mem_start = (intptr_t)&_bt_data_start;
  919. mem_end = (intptr_t)&_bt_data_end;
  920. if (mem_start != mem_end) {
  921. ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release BT Data [0x%08x] - [0x%08x], len %d",
  922. mem_start, mem_end, mem_end - mem_start);
  923. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  924. }
  925. mem_start = (intptr_t)&_bt_controller_data_start;
  926. mem_end = (intptr_t)&_bt_controller_data_end;
  927. if (mem_start != mem_end) {
  928. ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release Controller Data [0x%08x] - [0x%08x], len %d",
  929. mem_start, mem_end, mem_end - mem_start);
  930. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  931. }
  932. }
  933. }
  934. return ESP_OK;
  935. }
  936. esp_bt_controller_status_t esp_bt_controller_get_status(void)
  937. {
  938. return ble_controller_status;
  939. }
  940. esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
  941. {
  942. esp_err_t stat = ESP_FAIL;
  943. switch (power_type) {
  944. case ESP_BLE_PWR_TYPE_DEFAULT:
  945. case ESP_BLE_PWR_TYPE_ADV:
  946. case ESP_BLE_PWR_TYPE_SCAN:
  947. if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
  948. stat = ESP_OK;
  949. }
  950. break;
  951. case ESP_BLE_PWR_TYPE_CONN_HDL0:
  952. case ESP_BLE_PWR_TYPE_CONN_HDL1:
  953. case ESP_BLE_PWR_TYPE_CONN_HDL2:
  954. case ESP_BLE_PWR_TYPE_CONN_HDL3:
  955. case ESP_BLE_PWR_TYPE_CONN_HDL4:
  956. case ESP_BLE_PWR_TYPE_CONN_HDL5:
  957. case ESP_BLE_PWR_TYPE_CONN_HDL6:
  958. case ESP_BLE_PWR_TYPE_CONN_HDL7:
  959. case ESP_BLE_PWR_TYPE_CONN_HDL8:
  960. if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type, power_level) == 0) {
  961. stat = ESP_OK;
  962. }
  963. break;
  964. default:
  965. stat = ESP_ERR_NOT_SUPPORTED;
  966. break;
  967. }
  968. return stat;
  969. }
  970. esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type, uint16_t handle,
  971. esp_power_level_t power_level)
  972. {
  973. esp_err_t stat = ESP_FAIL;
  974. switch (power_type) {
  975. case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
  976. case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
  977. case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
  978. if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
  979. stat = ESP_OK;
  980. }
  981. break;
  982. case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
  983. case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
  984. if (ble_txpwr_set(power_type, handle, power_level) == 0) {
  985. stat = ESP_OK;
  986. }
  987. break;
  988. default:
  989. stat = ESP_ERR_NOT_SUPPORTED;
  990. break;
  991. }
  992. return stat;
  993. }
  994. esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
  995. {
  996. int tx_level = 0;
  997. switch (power_type) {
  998. case ESP_BLE_PWR_TYPE_ADV:
  999. case ESP_BLE_PWR_TYPE_SCAN:
  1000. case ESP_BLE_PWR_TYPE_DEFAULT:
  1001. tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
  1002. break;
  1003. case ESP_BLE_PWR_TYPE_CONN_HDL0:
  1004. case ESP_BLE_PWR_TYPE_CONN_HDL1:
  1005. case ESP_BLE_PWR_TYPE_CONN_HDL2:
  1006. case ESP_BLE_PWR_TYPE_CONN_HDL3:
  1007. case ESP_BLE_PWR_TYPE_CONN_HDL4:
  1008. case ESP_BLE_PWR_TYPE_CONN_HDL5:
  1009. case ESP_BLE_PWR_TYPE_CONN_HDL6:
  1010. case ESP_BLE_PWR_TYPE_CONN_HDL7:
  1011. case ESP_BLE_PWR_TYPE_CONN_HDL8:
  1012. tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type);
  1013. break;
  1014. default:
  1015. return ESP_PWR_LVL_INVALID;
  1016. }
  1017. if (tx_level < 0) {
  1018. return ESP_PWR_LVL_INVALID;
  1019. }
  1020. return (esp_power_level_t)tx_level;
  1021. }
  1022. esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t power_type,
  1023. uint16_t handle)
  1024. {
  1025. int tx_level = 0;
  1026. switch (power_type) {
  1027. case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
  1028. case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
  1029. case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
  1030. tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
  1031. break;
  1032. case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
  1033. case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
  1034. tx_level = ble_txpwr_get(power_type, handle);
  1035. break;
  1036. default:
  1037. return ESP_PWR_LVL_INVALID;
  1038. }
  1039. if (tx_level < 0) {
  1040. return ESP_PWR_LVL_INVALID;
  1041. }
  1042. return (esp_power_level_t)tx_level;
  1043. }
  1044. #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  1045. void esp_ble_controller_log_dump_all(bool output)
  1046. {
  1047. ble_log_async_output_dump_all(output);
  1048. }
  1049. #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  1050. #if (!CONFIG_BT_NIMBLE_ENABLED) && (CONFIG_BT_CONTROLLER_ENABLED == true)
  1051. #define BLE_SM_KEY_ERR 0x17
  1052. #if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1053. #include "mbedtls/aes.h"
  1054. #if CONFIG_BT_LE_SM_SC
  1055. #include "mbedtls/cipher.h"
  1056. #include "mbedtls/entropy.h"
  1057. #include "mbedtls/ctr_drbg.h"
  1058. #include "mbedtls/cmac.h"
  1059. #include "mbedtls/ecdh.h"
  1060. #include "mbedtls/ecp.h"
  1061. #endif // CONFIG_BT_LE_SM_SC
  1062. #else
  1063. #include "tinycrypt/aes.h"
  1064. #include "tinycrypt/constants.h"
  1065. #include "tinycrypt/utils.h"
  1066. #if CONFIG_BT_LE_SM_SC
  1067. #include "tinycrypt/cmac_mode.h"
  1068. #include "tinycrypt/ecc_dh.h"
  1069. #endif // CONFIG_BT_LE_SM_SC
  1070. #endif // CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1071. #if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1072. #if CONFIG_BT_LE_SM_SC
  1073. static mbedtls_ecp_keypair keypair;
  1074. #endif // CONFIG_BT_LE_SM_SC
  1075. #endif// CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1076. int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_key_y,
  1077. const uint8_t *our_priv_key, uint8_t *out_dhkey)
  1078. {
  1079. uint8_t dh[32];
  1080. uint8_t pk[64];
  1081. uint8_t priv[32];
  1082. int rc = BLE_SM_KEY_ERR;
  1083. swap_buf(pk, peer_pub_key_x, 32);
  1084. swap_buf(&pk[32], peer_pub_key_y, 32);
  1085. swap_buf(priv, our_priv_key, 32);
  1086. #if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1087. struct mbedtls_ecp_point pt = {0}, Q = {0};
  1088. mbedtls_mpi z = {0}, d = {0};
  1089. mbedtls_ctr_drbg_context ctr_drbg = {0};
  1090. mbedtls_entropy_context entropy = {0};
  1091. uint8_t pub[65] = {0};
  1092. /* Hardcoded first byte of pub key for MBEDTLS_ECP_PF_UNCOMPRESSED */
  1093. pub[0] = 0x04;
  1094. memcpy(&pub[1], pk, 64);
  1095. /* Initialize the required structures here */
  1096. mbedtls_ecp_point_init(&pt);
  1097. mbedtls_ecp_point_init(&Q);
  1098. mbedtls_ctr_drbg_init(&ctr_drbg);
  1099. mbedtls_entropy_init(&entropy);
  1100. mbedtls_mpi_init(&d);
  1101. mbedtls_mpi_init(&z);
  1102. /* Below 3 steps are to validate public key on curve secp256r1 */
  1103. if (mbedtls_ecp_group_load(&keypair.MBEDTLS_PRIVATE(grp), MBEDTLS_ECP_DP_SECP256R1) != 0) {
  1104. goto exit;
  1105. }
  1106. if (mbedtls_ecp_point_read_binary(&keypair.MBEDTLS_PRIVATE(grp), &pt, pub, 65) != 0) {
  1107. goto exit;
  1108. }
  1109. if (mbedtls_ecp_check_pubkey(&keypair.MBEDTLS_PRIVATE(grp), &pt) != 0) {
  1110. goto exit;
  1111. }
  1112. /* Set PRNG */
  1113. if ((rc = mbedtls_ctr_drbg_seed(&ctr_drbg, mbedtls_entropy_func, &entropy,
  1114. NULL, 0)) != 0) {
  1115. goto exit;
  1116. }
  1117. /* Prepare point Q from pub key */
  1118. if (mbedtls_ecp_point_read_binary(&keypair.MBEDTLS_PRIVATE(grp), &Q, pub, 65) != 0) {
  1119. goto exit;
  1120. }
  1121. if (mbedtls_mpi_read_binary(&d, priv, 32) != 0) {
  1122. goto exit;
  1123. }
  1124. rc = mbedtls_ecdh_compute_shared(&keypair.MBEDTLS_PRIVATE(grp), &z, &Q, &d,
  1125. mbedtls_ctr_drbg_random, &ctr_drbg);
  1126. if (rc != 0) {
  1127. goto exit;
  1128. }
  1129. rc = mbedtls_mpi_write_binary(&z, dh, 32);
  1130. if (rc != 0) {
  1131. goto exit;
  1132. }
  1133. exit:
  1134. mbedtls_ecp_point_free(&pt);
  1135. mbedtls_mpi_free(&z);
  1136. mbedtls_mpi_free(&d);
  1137. mbedtls_ecp_point_free(&Q);
  1138. mbedtls_entropy_free(&entropy);
  1139. mbedtls_ctr_drbg_free(&ctr_drbg);
  1140. if (rc != 0) {
  1141. return BLE_SM_KEY_ERR;
  1142. }
  1143. #else
  1144. if (uECC_valid_public_key(pk, &curve_secp256r1) < 0) {
  1145. return BLE_SM_KEY_ERR;
  1146. }
  1147. rc = uECC_shared_secret(pk, priv, dh, &curve_secp256r1);
  1148. if (rc == TC_CRYPTO_FAIL) {
  1149. return BLE_SM_KEY_ERR;
  1150. }
  1151. #endif // CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1152. swap_buf(out_dhkey, dh, 32);
  1153. return 0;
  1154. }
  1155. /* based on Core Specification 4.2 Vol 3. Part H 2.3.5.6.1 */
  1156. static const uint8_t ble_sm_alg_dbg_priv_key[32] = {
  1157. 0x3f, 0x49, 0xf6, 0xd4, 0xa3, 0xc5, 0x5f, 0x38, 0x74, 0xc9, 0xb3, 0xe3,
  1158. 0xd2, 0x10, 0x3f, 0x50, 0x4a, 0xff, 0x60, 0x7b, 0xeb, 0x40, 0xb7, 0x99,
  1159. 0x58, 0x99, 0xb8, 0xa6, 0xcd, 0x3c, 0x1a, 0xbd
  1160. };
  1161. #if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1162. static int mbedtls_gen_keypair(uint8_t *public_key, uint8_t *private_key)
  1163. {
  1164. int rc = BLE_SM_KEY_ERR;
  1165. size_t olen = 0;
  1166. uint8_t pub[65] = {0};
  1167. mbedtls_entropy_context entropy = {0};
  1168. mbedtls_ctr_drbg_context ctr_drbg = {0};
  1169. mbedtls_entropy_init(&entropy);
  1170. mbedtls_ctr_drbg_init(&ctr_drbg);
  1171. mbedtls_ecp_keypair_init(&keypair);
  1172. if ((rc = mbedtls_ctr_drbg_seed(&ctr_drbg, mbedtls_entropy_func, &entropy,
  1173. NULL, 0)) != 0) {
  1174. goto exit;
  1175. }
  1176. if ((rc = mbedtls_ecp_gen_key(MBEDTLS_ECP_DP_SECP256R1, &keypair,
  1177. mbedtls_ctr_drbg_random, &ctr_drbg)) != 0) {
  1178. goto exit;
  1179. }
  1180. if ((rc = mbedtls_mpi_write_binary(&keypair.MBEDTLS_PRIVATE(d), private_key, 32)) != 0) {
  1181. goto exit;
  1182. }
  1183. if ((rc = mbedtls_ecp_point_write_binary(&keypair.MBEDTLS_PRIVATE(grp),
  1184. &keypair.MBEDTLS_PRIVATE(Q),
  1185. MBEDTLS_ECP_PF_UNCOMPRESSED,
  1186. &olen, pub, 65)) != 0) {
  1187. goto exit;
  1188. }
  1189. memcpy(public_key, &pub[1], 64);
  1190. exit:
  1191. mbedtls_ctr_drbg_free(&ctr_drbg);
  1192. mbedtls_entropy_free(&entropy);
  1193. if (rc != 0) {
  1194. mbedtls_ecp_keypair_free(&keypair);
  1195. return BLE_SM_KEY_ERR;
  1196. }
  1197. return 0;
  1198. }
  1199. #endif // CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1200. /**
  1201. * pub: 64 bytes
  1202. * priv: 32 bytes
  1203. */
  1204. int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv)
  1205. {
  1206. #if CONFIG_BT_LE_SM_SC_DEBUG_KEYS
  1207. swap_buf(pub, ble_sm_alg_dbg_pub_key, 32);
  1208. swap_buf(&pub[32], &ble_sm_alg_dbg_pub_key[32], 32);
  1209. swap_buf(priv, ble_sm_alg_dbg_priv_key, 32);
  1210. #else
  1211. uint8_t pk[64];
  1212. do {
  1213. #if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1214. if (mbedtls_gen_keypair(pk, priv) != 0) {
  1215. return BLE_SM_KEY_ERR;
  1216. }
  1217. #else
  1218. if (uECC_make_key(pk, priv, &curve_secp256r1) != TC_CRYPTO_SUCCESS) {
  1219. return BLE_SM_KEY_ERR;
  1220. }
  1221. #endif // CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1222. /* Make sure generated key isn't debug key. */
  1223. } while (memcmp(priv, ble_sm_alg_dbg_priv_key, 32) == 0);
  1224. swap_buf(pub, pk, 32);
  1225. swap_buf(&pub[32], &pk[32], 32);
  1226. swap_in_place(priv, 32);
  1227. #endif // CONFIG_BT_LE_SM_SC_DEBUG_KEYS
  1228. return 0;
  1229. }
  1230. #endif // (!CONFIG_BT_NIMBLE_ENABLED) && (CONFIG_BT_CONTROLLER_ENABLED == true)