bt.c 45 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include <stddef.h>
  7. #include <stdlib.h>
  8. #include <stdio.h>
  9. #include <string.h>
  10. #include "esp_random.h"
  11. #include "esp_heap_caps.h"
  12. #include "esp_heap_caps_init.h"
  13. #include "esp_mac.h"
  14. #include "sdkconfig.h"
  15. #include "nimble/nimble_port.h"
  16. #include "nimble/nimble_port_freertos.h"
  17. #include "esp_private/esp_modem_clock.h"
  18. #ifdef ESP_PLATFORM
  19. #include "esp_log.h"
  20. #endif // ESP_PLATFORM
  21. #if CONFIG_SW_COEXIST_ENABLE
  22. #include "esp_coexist_internal.h"
  23. #endif // CONFIG_SW_COEXIST_ENABLE
  24. #include "nimble/nimble_npl_os.h"
  25. #include "nimble/ble_hci_trans.h"
  26. #include "os/endian.h"
  27. #include "esp_bt.h"
  28. #include "esp_intr_alloc.h"
  29. #include "esp_sleep.h"
  30. #include "esp_pm.h"
  31. #include "esp_phy_init.h"
  32. #include "esp_private/periph_ctrl.h"
  33. #include "hci_uart.h"
  34. #include "bt_osi_mem.h"
  35. #if SOC_PM_RETENTION_HAS_CLOCK_BUG
  36. #include "esp_private/sleep_retention.h"
  37. #endif
  38. #ifdef CONFIG_BT_BLUEDROID_ENABLED
  39. #include "hci/hci_hal.h"
  40. #endif // CONFIG_BT_BLUEDROID_ENABLED
  41. #include "freertos/FreeRTOS.h"
  42. #include "freertos/task.h"
  43. #include "esp_private/periph_ctrl.h"
  44. #include "esp_sleep.h"
  45. /* Macro definition
  46. ************************************************************************
  47. */
  48. #define NIMBLE_PORT_LOG_TAG "BLE_INIT"
  49. #define OSI_COEX_VERSION 0x00010006
  50. #define OSI_COEX_MAGIC_VALUE 0xFADEBEAD
  51. #define EXT_FUNC_VERSION 0x20221122
  52. #define EXT_FUNC_MAGIC_VALUE 0xA5A5A5A5
  53. #define BT_ASSERT_PRINT ets_printf
  54. #ifdef CONFIG_BT_BLUEDROID_ENABLED
  55. /* ACL_DATA_MBUF_LEADINGSPCAE: The leadingspace in user info header for ACL data */
  56. #define ACL_DATA_MBUF_LEADINGSPCAE 4
  57. #endif // CONFIG_BT_BLUEDROID_ENABLED
  58. /* Types definition
  59. ************************************************************************
  60. */
  61. struct osi_coex_funcs_t {
  62. uint32_t _magic;
  63. uint32_t _version;
  64. void (* _coex_wifi_sleep_set)(bool sleep);
  65. int (* _coex_core_ble_conn_dyn_prio_get)(bool *low, bool *high);
  66. void (* _coex_schm_status_bit_set)(uint32_t type, uint32_t status);
  67. void (* _coex_schm_status_bit_clear)(uint32_t type, uint32_t status);
  68. };
  69. struct ext_funcs_t {
  70. uint32_t ext_version;
  71. int (*_esp_intr_alloc)(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle);
  72. int (*_esp_intr_free)(void **ret_handle);
  73. void *(* _malloc)(size_t size);
  74. void (*_free)(void *p);
  75. void (*_hal_uart_start_tx)(int);
  76. int (*_hal_uart_init_cbs)(int, hci_uart_tx_char, hci_uart_tx_done, hci_uart_rx_char, void *);
  77. int (*_hal_uart_config)(int, int32_t, uint8_t, uint8_t, uart_parity_t, uart_hw_flowcontrol_t);
  78. int (*_hal_uart_close)(int);
  79. void (*_hal_uart_blocking_tx)(int, uint8_t);
  80. int (*_hal_uart_init)(int, void *);
  81. int (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param,
  82. uint32_t prio, void *task_handle, uint32_t core_id);
  83. void (* _task_delete)(void *task_handle);
  84. void (*_osi_assert)(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2);
  85. uint32_t (* _os_random)(void);
  86. int (* _ecc_gen_key_pair)(uint8_t *public, uint8_t *priv);
  87. int (* _ecc_gen_dh_key)(const uint8_t *remote_pub_key_x, const uint8_t *remote_pub_key_y,
  88. const uint8_t *local_priv_key, uint8_t *dhkey);
  89. void (* _esp_reset_rpa_moudle)(void);
  90. uint32_t magic;
  91. };
  92. #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  93. typedef void (*interface_func_t) (uint32_t len, const uint8_t*addr, bool end);
  94. #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  95. /* External functions or variables
  96. ************************************************************************
  97. */
  98. extern int ble_osi_coex_funcs_register(struct osi_coex_funcs_t *coex_funcs);
  99. extern int ble_controller_init(esp_bt_controller_config_t *cfg);
  100. #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  101. extern int ble_log_init_async(interface_func_t bt_controller_log_interface, bool task_create);
  102. extern int ble_log_deinit_async(void);
  103. extern void ble_log_async_output_dump_all(bool output);
  104. #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  105. extern int ble_controller_deinit(void);
  106. extern int ble_controller_enable(uint8_t mode);
  107. extern int ble_controller_disable(void);
  108. extern int esp_register_ext_funcs (struct ext_funcs_t *);
  109. extern void esp_unregister_ext_funcs (void);
  110. extern int esp_ble_ll_set_public_addr(const uint8_t *addr);
  111. extern int esp_register_npl_funcs (struct npl_funcs_t *p_npl_func);
  112. extern void esp_unregister_npl_funcs (void);
  113. extern void npl_freertos_mempool_deinit(void);
  114. extern int os_msys_buf_alloc(void);
  115. extern uint32_t r_os_cputime_get32(void);
  116. extern uint32_t r_os_cputime_ticks_to_usecs(uint32_t ticks);
  117. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
  118. extern const sleep_retention_entries_config_t *esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
  119. #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
  120. extern void ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg,
  121. void *w_arg, uint32_t us_to_enabled);
  122. extern void r_ble_rtc_wake_up_state_clr(void);
  123. extern int os_msys_init(void);
  124. extern void os_msys_buf_free(void);
  125. extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
  126. const uint8_t *peer_pub_key_y,
  127. const uint8_t *our_priv_key, uint8_t *out_dhkey);
  128. extern int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv);
  129. extern int ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
  130. extern int ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
  131. extern int ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_count_info_t * npl_info);
  132. extern uint32_t _bt_bss_start;
  133. extern uint32_t _bt_bss_end;
  134. extern uint32_t _bt_controller_bss_start;
  135. extern uint32_t _bt_controller_bss_end;
  136. extern uint32_t _bt_data_start;
  137. extern uint32_t _bt_data_end;
  138. extern uint32_t _bt_controller_data_start;
  139. extern uint32_t _bt_controller_data_end;
  140. /* Local Function Declaration
  141. *********************************************************************
  142. */
  143. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status);
  144. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status);
  145. static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth,
  146. void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  147. static void task_delete_wrapper(void *task_handle);
  148. #if CONFIG_BT_LE_HCI_INTERFACE_USE_UART
  149. static void hci_uart_start_tx_wrapper(int uart_no);
  150. static int hci_uart_init_cbs_wrapper(int uart_no, hci_uart_tx_char tx_func,
  151. hci_uart_tx_done tx_done, hci_uart_rx_char rx_func, void *arg);
  152. static int hci_uart_config_wrapper(int uart_no, int32_t speed, uint8_t databits, uint8_t stopbits,
  153. uart_parity_t parity, uart_hw_flowcontrol_t flow_ctl);
  154. static int hci_uart_close_wrapper(int uart_no);
  155. static void hci_uart_blocking_tx_wrapper(int port, uint8_t data);
  156. static int hci_uart_init_wrapper(int uart_no, void *cfg);
  157. #endif // CONFIG_BT_LE_HCI_INTERFACE_USE_UART
  158. static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler,
  159. void *arg, void **ret_handle_in);
  160. static int esp_intr_free_wrapper(void **ret_handle);
  161. static void osi_assert_wrapper(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2);
  162. static uint32_t osi_random_wrapper(void);
  163. static void esp_reset_rpa_moudle(void);
  164. static int esp_ecc_gen_key_pair(uint8_t *pub, uint8_t *priv);
  165. static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_key_y,
  166. const uint8_t *our_priv_key, uint8_t *out_dhkey);
  167. #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  168. static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, bool end);
  169. #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  170. /* Local variable definition
  171. ***************************************************************************
  172. */
  173. /* Static variable declare */
  174. static DRAM_ATTR esp_bt_controller_status_t ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  175. /* This variable tells if BLE is running */
  176. static bool s_ble_active = false;
  177. #ifdef CONFIG_PM_ENABLE
  178. static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock = NULL;
  179. #define BTDM_MIN_TIMER_UNCERTAINTY_US (200)
  180. #endif // CONFIG_PM_ENABLE
  181. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  182. #define BLE_RTC_DELAY_US_LIGHT_SLEEP (5100)
  183. #define BLE_RTC_DELAY_US_MODEM_SLEEP (1500)
  184. #endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  185. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  186. #define BLE_RTC_DELAY_US_LIGHT_SLEEP (2000)
  187. #define BLE_RTC_DELAY_US_MODEM_SLEEP (0)
  188. static void ble_sleep_timer_callback(void *arg);
  189. static DRAM_ATTR esp_timer_handle_t s_ble_sleep_timer = NULL;
  190. #endif // CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  191. static const struct osi_coex_funcs_t s_osi_coex_funcs_ro = {
  192. ._magic = OSI_COEX_MAGIC_VALUE,
  193. ._version = OSI_COEX_VERSION,
  194. ._coex_wifi_sleep_set = NULL,
  195. ._coex_core_ble_conn_dyn_prio_get = NULL,
  196. ._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper,
  197. ._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper,
  198. };
  199. struct ext_funcs_t ext_funcs_ro = {
  200. .ext_version = EXT_FUNC_VERSION,
  201. ._esp_intr_alloc = esp_intr_alloc_wrapper,
  202. ._esp_intr_free = esp_intr_free_wrapper,
  203. ._malloc = bt_osi_mem_malloc_internal,
  204. ._free = bt_osi_mem_free,
  205. #if CONFIG_BT_LE_HCI_INTERFACE_USE_UART
  206. ._hal_uart_start_tx = hci_uart_start_tx_wrapper,
  207. ._hal_uart_init_cbs = hci_uart_init_cbs_wrapper,
  208. ._hal_uart_config = hci_uart_config_wrapper,
  209. ._hal_uart_close = hci_uart_close_wrapper,
  210. ._hal_uart_blocking_tx = hci_uart_blocking_tx_wrapper,
  211. ._hal_uart_init = hci_uart_init_wrapper,
  212. #endif //CONFIG_BT_LE_HCI_INTERFACE_USE_UART
  213. ._task_create = task_create_wrapper,
  214. ._task_delete = task_delete_wrapper,
  215. ._osi_assert = osi_assert_wrapper,
  216. ._os_random = osi_random_wrapper,
  217. ._ecc_gen_key_pair = esp_ecc_gen_key_pair,
  218. ._ecc_gen_dh_key = esp_ecc_gen_dh_key,
  219. ._esp_reset_rpa_moudle = esp_reset_rpa_moudle,
  220. .magic = EXT_FUNC_MAGIC_VALUE,
  221. };
  222. static void IRAM_ATTR esp_reset_rpa_moudle(void)
  223. {
  224. }
  225. static void IRAM_ATTR osi_assert_wrapper(const uint32_t ln, const char *fn,
  226. uint32_t param1, uint32_t param2)
  227. {
  228. BT_ASSERT_PRINT("BLE assert: line %d in function %s, param: 0x%x, 0x%x", ln, fn, param1, param2);
  229. assert(0);
  230. }
  231. static uint32_t IRAM_ATTR osi_random_wrapper(void)
  232. {
  233. return esp_random();
  234. }
  235. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
  236. {
  237. #if CONFIG_SW_COEXIST_ENABLE
  238. coex_schm_status_bit_set(type, status);
  239. #endif // CONFIG_SW_COEXIST_ENABLE
  240. }
  241. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
  242. {
  243. #if CONFIG_SW_COEXIST_ENABLE
  244. coex_schm_status_bit_clear(type, status);
  245. #endif // CONFIG_SW_COEXIST_ENABLE
  246. }
  247. #ifdef CONFIG_BT_BLUEDROID_ENABLED
  248. bool esp_vhci_host_check_send_available(void)
  249. {
  250. if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  251. return false;
  252. }
  253. return true;
  254. }
  255. static struct os_mbuf *ble_hs_mbuf_gen_pkt(uint16_t leading_space)
  256. {
  257. struct os_mbuf *om;
  258. int rc;
  259. om = os_msys_get_pkthdr(0, 0);
  260. if (om == NULL) {
  261. return NULL;
  262. }
  263. if (om->om_omp->omp_databuf_len < leading_space) {
  264. rc = os_mbuf_free_chain(om);
  265. assert(rc == 0);
  266. return NULL;
  267. }
  268. om->om_data += leading_space;
  269. return om;
  270. }
  271. struct os_mbuf *ble_hs_mbuf_acl_pkt(void)
  272. {
  273. return ble_hs_mbuf_gen_pkt(4 + 1);
  274. }
  275. void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
  276. {
  277. if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  278. return;
  279. }
  280. if (*(data) == DATA_TYPE_COMMAND) {
  281. struct ble_hci_cmd *cmd = NULL;
  282. cmd = (struct ble_hci_cmd *) ble_hci_trans_buf_alloc(BLE_HCI_TRANS_BUF_CMD);
  283. memcpy((uint8_t *)cmd, data + 1, len - 1);
  284. ble_hci_trans_hs_cmd_tx((uint8_t *)cmd);
  285. }
  286. if (*(data) == DATA_TYPE_ACL) {
  287. struct os_mbuf *om = os_msys_get_pkthdr(len, ACL_DATA_MBUF_LEADINGSPCAE);
  288. assert(om);
  289. assert(os_mbuf_append(om, &data[1], len - 1) == 0);
  290. ble_hci_trans_hs_acl_tx(om);
  291. }
  292. }
  293. esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
  294. {
  295. if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  296. return ESP_FAIL;
  297. }
  298. ble_hci_trans_cfg_hs(ble_hs_hci_rx_evt, NULL, ble_hs_rx_data, NULL);
  299. return ESP_OK;
  300. }
  301. #endif // CONFIG_BT_BLUEDROID_ENABLED
  302. static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth,
  303. void *param, uint32_t prio, void *task_handle, uint32_t core_id)
  304. {
  305. return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle,
  306. (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
  307. }
  308. static void task_delete_wrapper(void *task_handle)
  309. {
  310. vTaskDelete(task_handle);
  311. }
  312. static int esp_ecc_gen_key_pair(uint8_t *pub, uint8_t *priv)
  313. {
  314. int rc = -1;
  315. #if CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
  316. rc = ble_sm_alg_gen_key_pair(pub, priv);
  317. #endif // CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
  318. return rc;
  319. }
  320. static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_key_y,
  321. const uint8_t *our_priv_key, uint8_t *out_dhkey)
  322. {
  323. int rc = -1;
  324. #if CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
  325. rc = ble_sm_alg_gen_dhkey(peer_pub_key_x, peer_pub_key_y, our_priv_key, out_dhkey);
  326. #endif // CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
  327. return rc;
  328. }
  329. #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  330. static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, bool end)
  331. {
  332. if (!end) {
  333. for (int i = 0; i < len; i++) {
  334. esp_rom_printf("%02x,", addr[i]);
  335. }
  336. } else {
  337. for (int i = 0; i < len; i++) {
  338. esp_rom_printf("%02x,", addr[i]);
  339. }
  340. esp_rom_printf("\n");
  341. }
  342. }
  343. #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  344. #ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
  345. static void hci_uart_start_tx_wrapper(int uart_no)
  346. {
  347. hci_uart_start_tx(uart_no);
  348. }
  349. static int hci_uart_init_cbs_wrapper(int uart_no, hci_uart_tx_char tx_func,
  350. hci_uart_tx_done tx_done, hci_uart_rx_char rx_func, void *arg)
  351. {
  352. int rc = -1;
  353. rc = hci_uart_init_cbs(uart_no, tx_func, tx_done, rx_func, arg);
  354. return rc;
  355. }
  356. static int hci_uart_config_wrapper(int port_num, int32_t baud_rate, uint8_t data_bits,
  357. uint8_t stop_bits, uart_parity_t parity,
  358. uart_hw_flowcontrol_t flow_ctl)
  359. {
  360. int rc = -1;
  361. rc = hci_uart_config(port_num, baud_rate, data_bits, stop_bits, parity, flow_ctl);
  362. return rc;
  363. }
  364. static int hci_uart_close_wrapper(int uart_no)
  365. {
  366. int rc = -1;
  367. rc = hci_uart_close(uart_no);
  368. return rc;
  369. }
  370. static void hci_uart_blocking_tx_wrapper(int port, uint8_t data)
  371. {
  372. //This function is nowhere to use.
  373. }
  374. static int hci_uart_init_wrapper(int uart_no, void *cfg)
  375. {
  376. //This function is nowhere to use.
  377. return 0;
  378. }
  379. #endif //CONFIG_BT_LE_HCI_INTERFACE_USE_UART
  380. static int ble_hci_unregistered_hook(void*, void*)
  381. {
  382. ESP_LOGD(NIMBLE_PORT_LOG_TAG,"%s ble hci rx_evt is not registered.",__func__);
  383. return 0;
  384. }
  385. static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler,
  386. void *arg, void **ret_handle_in)
  387. {
  388. int rc = esp_intr_alloc(source, flags | ESP_INTR_FLAG_IRAM, handler,
  389. arg, (intr_handle_t *)ret_handle_in);
  390. return rc;
  391. }
  392. static int esp_intr_free_wrapper(void **ret_handle)
  393. {
  394. int rc = 0;
  395. rc = esp_intr_free((intr_handle_t) * ret_handle);
  396. *ret_handle = NULL;
  397. return rc;
  398. }
  399. IRAM_ATTR void controller_sleep_cb(uint32_t enable_tick, void *arg)
  400. {
  401. if (!s_ble_active) {
  402. return;
  403. }
  404. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
  405. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  406. uint32_t delta_tick;
  407. uint32_t us_to_sleep;
  408. uint32_t sleep_tick;
  409. uint32_t tick_invalid = *(uint32_t*)(arg);
  410. assert(arg != NULL);
  411. if (!tick_invalid) {
  412. sleep_tick = r_os_cputime_get32();
  413. /* start a timer to wake up and acquire the pm_lock before modem_sleep awakes */
  414. delta_tick = enable_tick - sleep_tick;
  415. if (delta_tick & 0x80000000) {
  416. return;
  417. }
  418. us_to_sleep = r_os_cputime_ticks_to_usecs(delta_tick);
  419. if (us_to_sleep <= BTDM_MIN_TIMER_UNCERTAINTY_US) {
  420. return;
  421. }
  422. esp_err_t err = esp_timer_start_once(s_ble_sleep_timer,
  423. us_to_sleep - BTDM_MIN_TIMER_UNCERTAINTY_US);
  424. if (err != ESP_OK) {
  425. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ESP timer start failed");
  426. return;
  427. }
  428. }
  429. #endif // CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  430. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  431. r_ble_rtc_wake_up_state_clr();
  432. #endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  433. #if SOC_PM_RETENTION_HAS_CLOCK_BUG
  434. sleep_retention_do_extra_retention(true);
  435. #endif // SOC_PM_RETENTION_HAS_CLOCK_BUG
  436. #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
  437. esp_phy_disable();
  438. #ifdef CONFIG_PM_ENABLE
  439. esp_pm_lock_release(s_pm_lock);
  440. #endif // CONFIG_PM_ENABLE
  441. s_ble_active = false;
  442. }
  443. IRAM_ATTR void controller_wakeup_cb(void *arg)
  444. {
  445. if (s_ble_active) {
  446. return;
  447. }
  448. #ifdef CONFIG_PM_ENABLE
  449. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  450. esp_pm_lock_acquire(s_pm_lock);
  451. r_ble_rtc_wake_up_state_clr();
  452. #endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  453. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE && SOC_PM_RETENTION_HAS_CLOCK_BUG
  454. sleep_retention_do_extra_retention(false);
  455. #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE && SOC_PM_RETENTION_HAS_CLOCK_BUG */
  456. #endif //CONFIG_PM_ENABLE
  457. esp_phy_enable();
  458. s_ble_active = true;
  459. }
  460. #ifdef CONFIG_FREERTOS_USE_TICKLESS_IDLE
  461. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  462. static void ble_sleep_timer_callback(void * arg)
  463. {
  464. esp_pm_lock_acquire(s_pm_lock);
  465. }
  466. #endif // CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  467. static esp_err_t sleep_modem_ble_mac_modem_state_init(uint8_t extra)
  468. {
  469. uint8_t size;
  470. const sleep_retention_entries_config_t *ble_mac_modem_config = esp_ble_mac_retention_link_get(&size, extra);
  471. esp_err_t err = sleep_retention_entries_create(ble_mac_modem_config, size, REGDMA_LINK_PRI_5, SLEEP_RETENTION_MODULE_BLE_MAC);
  472. if (err == ESP_OK) {
  473. ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Modem BLE MAC retention initialization");
  474. }
  475. return err;
  476. }
  477. static void sleep_modem_ble_mac_modem_state_deinit(void)
  478. {
  479. sleep_retention_entries_destroy(SLEEP_RETENTION_MODULE_BLE_MAC);
  480. }
  481. #endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
  482. esp_err_t controller_sleep_init(void)
  483. {
  484. esp_err_t rc = 0;
  485. #ifdef CONFIG_BT_LE_SLEEP_ENABLE
  486. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "BLE modem sleep is enabled");
  487. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
  488. ble_lll_rfmgmt_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0,
  489. BLE_RTC_DELAY_US_LIGHT_SLEEP);
  490. #else
  491. ble_lll_rfmgmt_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0,
  492. BLE_RTC_DELAY_US_MODEM_SLEEP);
  493. #endif /* FREERTOS_USE_TICKLESS_IDLE */
  494. #endif // CONFIG_BT_LE_SLEEP_ENABLE
  495. #ifdef CONFIG_PM_ENABLE
  496. rc = esp_pm_lock_create(ESP_PM_CPU_FREQ_MAX, 0, "bt", &s_pm_lock);
  497. if (rc != ESP_OK) {
  498. goto error;
  499. }
  500. esp_pm_lock_acquire(s_pm_lock);
  501. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
  502. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  503. esp_timer_create_args_t create_args = {
  504. .callback = ble_sleep_timer_callback,
  505. .arg = NULL,
  506. .name = "btSlp"
  507. };
  508. rc = esp_timer_create(&create_args, &s_ble_sleep_timer);
  509. if (rc != ESP_OK) {
  510. goto error;
  511. }
  512. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is ESP timer");
  513. #endif //CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  514. /* Create a new regdma link for BLE related register restoration */
  515. rc = sleep_modem_ble_mac_modem_state_init(1);
  516. assert(rc == 0);
  517. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  518. esp_sleep_enable_bt_wakeup();
  519. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is BLE timer");
  520. #endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  521. #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
  522. return rc;
  523. error:
  524. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
  525. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  526. esp_sleep_disable_bt_wakeup();
  527. #endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  528. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  529. if (s_ble_sleep_timer != NULL) {
  530. esp_timer_stop(s_ble_sleep_timer);
  531. esp_timer_delete(s_ble_sleep_timer);
  532. s_ble_sleep_timer = NULL;
  533. }
  534. #endif // CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  535. #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
  536. /*lock should release first and then delete*/
  537. if (s_pm_lock != NULL) {
  538. esp_pm_lock_release(s_pm_lock);
  539. esp_pm_lock_delete(s_pm_lock);
  540. s_pm_lock = NULL;
  541. }
  542. #endif // CONFIG_PM_ENABLE
  543. return rc;
  544. }
  545. void controller_sleep_deinit(void)
  546. {
  547. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
  548. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  549. r_ble_rtc_wake_up_state_clr();
  550. esp_sleep_disable_bt_wakeup();
  551. #endif //CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  552. sleep_modem_ble_mac_modem_state_deinit();
  553. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  554. if (s_ble_sleep_timer != NULL) {
  555. esp_timer_stop(s_ble_sleep_timer);
  556. esp_timer_delete(s_ble_sleep_timer);
  557. s_ble_sleep_timer = NULL;
  558. }
  559. #endif //CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  560. #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
  561. #ifdef CONFIG_PM_ENABLE
  562. /* lock should be released first */
  563. esp_pm_lock_release(s_pm_lock);
  564. esp_pm_lock_delete(s_pm_lock);
  565. s_pm_lock = NULL;
  566. #endif //CONFIG_PM_ENABLE
  567. }
  568. typedef enum {
  569. FILTER_DUPLICATE_PDUTYPE = BIT(0),
  570. FILTER_DUPLICATE_LENGTH = BIT(1),
  571. FILTER_DUPLICATE_ADDRESS = BIT(2),
  572. FILTER_DUPLICATE_ADVDATA = BIT(3),
  573. FILTER_DUPLICATE_DEFAULT = FILTER_DUPLICATE_PDUTYPE | FILTER_DUPLICATE_ADDRESS,
  574. FILTER_DUPLICATE_PDU_ALL = 0xF,
  575. FILTER_DUPLICATE_EXCEPTION_FOR_MESH = BIT(4),
  576. FILTER_DUPLICATE_AD_TYPE = BIT(5),
  577. }disc_duplicate_mode_t;
  578. extern void filter_duplicate_mode_enable(disc_duplicate_mode_t mode);
  579. extern void filter_duplicate_mode_disable(disc_duplicate_mode_t mode);
  580. extern void filter_duplicate_set_ring_list_max_num(uint32_t max_num);
  581. extern void scan_duplicate_cache_refresh_set_time(uint32_t period_time);
  582. int
  583. ble_vhci_disc_duplicate_mode_enable(int mode)
  584. {
  585. // TODO: use vendor hci to update
  586. filter_duplicate_mode_enable(mode);
  587. return true;
  588. }
  589. int
  590. ble_vhci_disc_duplicate_mode_disable(int mode)
  591. {
  592. // TODO: use vendor hci to update
  593. filter_duplicate_mode_disable(mode);
  594. return true;
  595. }
  596. int ble_vhci_disc_duplicate_set_max_cache_size(int max_cache_size){
  597. // TODO: use vendor hci to update
  598. filter_duplicate_set_ring_list_max_num(max_cache_size);
  599. return true;
  600. }
  601. int ble_vhci_disc_duplicate_set_period_refresh_time(int refresh_period_time){
  602. // TODO: use vendor hci to update
  603. scan_duplicate_cache_refresh_set_time(refresh_period_time);
  604. return true;
  605. }
  606. /**
  607. * @brief Config scan duplicate option mode from menuconfig (Adapt to the old configuration method.)
  608. */
  609. void ble_controller_scan_duplicate_config(void)
  610. {
  611. uint32_t duplicate_mode = FILTER_DUPLICATE_DEFAULT;
  612. uint32_t cache_size = 100;
  613. #if CONFIG_BT_LE_SCAN_DUPL == true
  614. cache_size = CONFIG_BT_LE_SCAN_DUPL_CACHE_SIZE;
  615. if (CONFIG_BT_LE_SCAN_DUPL_TYPE == 0) {
  616. duplicate_mode = FILTER_DUPLICATE_ADDRESS | FILTER_DUPLICATE_PDUTYPE;
  617. } else if (CONFIG_BT_LE_SCAN_DUPL_TYPE == 1) {
  618. duplicate_mode = FILTER_DUPLICATE_ADVDATA;
  619. } else if (CONFIG_BT_LE_SCAN_DUPL_TYPE == 2) {
  620. duplicate_mode = FILTER_DUPLICATE_ADDRESS | FILTER_DUPLICATE_ADVDATA;
  621. }
  622. duplicate_mode |= FILTER_DUPLICATE_EXCEPTION_FOR_MESH;
  623. ble_vhci_disc_duplicate_set_period_refresh_time(CONFIG_BT_LE_SCAN_DUPL_CACHE_REFRESH_PERIOD);
  624. #endif
  625. ble_vhci_disc_duplicate_mode_disable(0xFFFFFFFF);
  626. ble_vhci_disc_duplicate_mode_enable(duplicate_mode);
  627. ble_vhci_disc_duplicate_set_max_cache_size(cache_size);
  628. }
  629. esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
  630. {
  631. uint8_t mac[6];
  632. esp_err_t ret = ESP_OK;
  633. ble_npl_count_info_t npl_info;
  634. memset(&npl_info, 0, sizeof(ble_npl_count_info_t));
  635. if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
  636. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
  637. return ESP_ERR_INVALID_STATE;
  638. }
  639. if (!cfg) {
  640. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "cfg is NULL");
  641. return ESP_ERR_INVALID_ARG;
  642. }
  643. ret = esp_register_ext_funcs(&ext_funcs_ro);
  644. if (ret != ESP_OK) {
  645. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "register extend functions failed");
  646. return ret;
  647. }
  648. /* Initialize the function pointers for OS porting */
  649. npl_freertos_funcs_init();
  650. struct npl_funcs_t *p_npl_funcs = npl_freertos_funcs_get();
  651. if (!p_npl_funcs) {
  652. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl functions get failed");
  653. return ESP_ERR_INVALID_ARG;
  654. }
  655. ret = esp_register_npl_funcs(p_npl_funcs);
  656. if (ret != ESP_OK) {
  657. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl functions register failed");
  658. goto free_mem;
  659. }
  660. ble_get_npl_element_info(cfg, &npl_info);
  661. npl_freertos_set_controller_npl_info(&npl_info);
  662. if (npl_freertos_mempool_init() != 0) {
  663. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl mempool init failed");
  664. ret = ESP_ERR_INVALID_ARG;
  665. goto free_mem;
  666. }
  667. /* Initialize the global memory pool */
  668. ret = os_msys_buf_alloc();
  669. if (ret != ESP_OK) {
  670. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "os msys alloc failed");
  671. goto free_mem;
  672. }
  673. os_msys_init();
  674. #if CONFIG_BT_NIMBLE_ENABLED
  675. /* ble_npl_eventq_init() needs to use npl functions in rom and
  676. * must be called after esp_bt_controller_init().
  677. */
  678. ble_npl_eventq_init(nimble_port_get_dflt_eventq());
  679. #endif // CONFIG_BT_NIMBLE_ENABLED
  680. /* Enable BT-related clocks */
  681. modem_clock_module_enable(PERIPH_BT_MODULE);
  682. #if CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL
  683. ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using main XTAL as clock source");
  684. modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL, (320 - 1));
  685. #else
  686. #if CONFIG_RTC_CLK_SRC_INT_RC
  687. ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 136 kHz RC as clock source, can only run legacy ADV or SCAN due to low clock accuracy!");
  688. modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_RC_SLOW, (5 - 1));
  689. #elif CONFIG_RTC_CLK_SRC_EXT_CRYS
  690. ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using external 32.768 kHz XTAL as clock source");
  691. modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_XTAL32K, (1 - 1));
  692. #elif CONFIG_RTC_CLK_SRC_INT_RC32K
  693. ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 32 kHz RC as clock source, can only run legacy ADV or SCAN due to low clock accuracy!");
  694. modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_RC32K, (1 - 1));
  695. #elif CONFIG_RTC_CLK_SRC_EXT_OSC
  696. ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 32 kHz oscillator as clock source, can only run legacy ADV or SCAN due to low clock accuracy!");
  697. modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_EXT32K, (1 - 1));
  698. #else
  699. ESP_LOGE(NIMBLE_PORT_LOG_TAG, "Unsupported clock source");
  700. assert(0);
  701. #endif
  702. #endif /* CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL */
  703. esp_phy_enable();
  704. esp_btbb_enable();
  705. s_ble_active = true;
  706. if (ble_osi_coex_funcs_register((struct osi_coex_funcs_t *)&s_osi_coex_funcs_ro) != 0) {
  707. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "osi coex funcs reg failed");
  708. ret = ESP_ERR_INVALID_ARG;
  709. goto free_controller;
  710. }
  711. #if CONFIG_SW_COEXIST_ENABLE
  712. coex_init();
  713. #endif // CONFIG_SW_COEXIST_ENABLE
  714. ret = ble_controller_init(cfg);
  715. if (ret != ESP_OK) {
  716. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_init failed %d", ret);
  717. goto free_controller;
  718. }
  719. #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  720. interface_func_t bt_controller_log_interface;
  721. bt_controller_log_interface = esp_bt_controller_log_interface;
  722. #if CONFIG_BT_LE_CONTROLLER_LOG_DUMP_ONLY
  723. ret = ble_log_init_async(bt_controller_log_interface, false);
  724. #else
  725. ret = ble_log_init_async(bt_controller_log_interface, true);
  726. #endif // CONFIG_BT_CONTROLLER_LOG_DUMP
  727. if (ret != ESP_OK) {
  728. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_log_init failed %d", ret);
  729. goto free_controller;
  730. }
  731. #endif // CONFIG_BT_CONTROLLER_LOG_ENABLED
  732. ble_controller_scan_duplicate_config();
  733. ret = controller_sleep_init();
  734. if (ret != ESP_OK) {
  735. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "controller_sleep_init failed %d", ret);
  736. goto free_controller;
  737. }
  738. ESP_ERROR_CHECK(esp_read_mac((uint8_t *)mac, ESP_MAC_BT));
  739. swap_in_place(mac, 6);
  740. esp_ble_ll_set_public_addr(mac);
  741. ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  742. ble_hci_trans_cfg_hs((ble_hci_trans_rx_cmd_fn *)ble_hci_unregistered_hook,NULL,
  743. (ble_hci_trans_rx_acl_fn *)ble_hci_unregistered_hook,NULL);
  744. return ESP_OK;
  745. free_controller:
  746. controller_sleep_deinit();
  747. #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  748. ble_log_deinit_async();
  749. #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  750. ble_controller_deinit();
  751. esp_btbb_disable();
  752. esp_phy_disable();
  753. modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
  754. modem_clock_module_disable(PERIPH_BT_MODULE);
  755. #if CONFIG_BT_NIMBLE_ENABLED
  756. ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
  757. #endif // CONFIG_BT_NIMBLE_ENABLED
  758. free_mem:
  759. os_msys_buf_free();
  760. npl_freertos_mempool_deinit();
  761. esp_unregister_npl_funcs();
  762. npl_freertos_funcs_deinit();
  763. esp_unregister_ext_funcs();
  764. return ret;
  765. }
  766. esp_err_t esp_bt_controller_deinit(void)
  767. {
  768. if ((ble_controller_status < ESP_BT_CONTROLLER_STATUS_INITED) ||
  769. (ble_controller_status >= ESP_BT_CONTROLLER_STATUS_ENABLED)) {
  770. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
  771. return ESP_FAIL;
  772. }
  773. controller_sleep_deinit();
  774. esp_btbb_disable();
  775. if (s_ble_active) {
  776. esp_phy_disable();
  777. s_ble_active = false;
  778. }
  779. modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
  780. modem_clock_module_disable(PERIPH_BT_MODULE);
  781. #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  782. ble_log_deinit_async();
  783. #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  784. ble_controller_deinit();
  785. #if CONFIG_BT_NIMBLE_ENABLED
  786. /* De-initialize default event queue */
  787. ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
  788. #endif // CONFIG_BT_NIMBLE_ENABLED
  789. os_msys_buf_free();
  790. esp_unregister_npl_funcs();
  791. esp_unregister_ext_funcs();
  792. /* De-initialize npl functions */
  793. npl_freertos_funcs_deinit();
  794. npl_freertos_mempool_deinit();
  795. ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  796. return ESP_OK;
  797. }
  798. esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
  799. {
  800. esp_err_t ret = ESP_OK;
  801. if (mode != ESP_BT_MODE_BLE) {
  802. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller mode");
  803. return ESP_FAIL;
  804. }
  805. if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  806. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
  807. return ESP_FAIL;
  808. }
  809. #if CONFIG_SW_COEXIST_ENABLE
  810. coex_enable();
  811. #endif // CONFIG_SW_COEXIST_ENABLE
  812. if (ble_controller_enable(mode) != 0) {
  813. ret = ESP_FAIL;
  814. goto error;
  815. }
  816. ble_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
  817. return ESP_OK;
  818. error:
  819. #if CONFIG_SW_COEXIST_ENABLE
  820. coex_disable();
  821. #endif
  822. return ret;
  823. }
  824. esp_err_t esp_bt_controller_disable(void)
  825. {
  826. if (ble_controller_status < ESP_BT_CONTROLLER_STATUS_ENABLED) {
  827. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
  828. return ESP_FAIL;
  829. }
  830. if (ble_controller_disable() != 0) {
  831. return ESP_FAIL;
  832. }
  833. #if CONFIG_SW_COEXIST_ENABLE
  834. coex_disable();
  835. #endif
  836. ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  837. return ESP_OK;
  838. }
  839. esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
  840. {
  841. ESP_LOGD(NIMBLE_PORT_LOG_TAG, "%s not implemented, return OK", __func__);
  842. return ESP_OK;
  843. }
  844. static esp_err_t try_heap_caps_add_region(intptr_t start, intptr_t end)
  845. {
  846. int ret = heap_caps_add_region(start, end);
  847. /* heap_caps_add_region() returns ESP_ERR_INVALID_SIZE if the memory region is
  848. * is too small to fit a heap. This cannot be termed as a fatal error and hence
  849. * we replace it by ESP_OK
  850. */
  851. if (ret == ESP_ERR_INVALID_SIZE) {
  852. return ESP_OK;
  853. }
  854. return ret;
  855. }
  856. esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
  857. {
  858. intptr_t mem_start, mem_end;
  859. if (mode & ESP_BT_MODE_BLE) {
  860. /* If the addresses of btdm .bss and bt .bss are consecutive,
  861. * they are registered in the system heap as a piece of memory
  862. */
  863. if(_bt_bss_end == _bt_controller_bss_start) {
  864. mem_start = (intptr_t)&_bt_bss_start;
  865. mem_end = (intptr_t)&_bt_controller_bss_end;
  866. if (mem_start != mem_end) {
  867. ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release BSS [0x%08x] - [0x%08x], len %d",
  868. mem_start, mem_end, mem_end - mem_start);
  869. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  870. }
  871. } else {
  872. mem_start = (intptr_t)&_bt_bss_start;
  873. mem_end = (intptr_t)&_bt_bss_end;
  874. if (mem_start != mem_end) {
  875. ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release BT BSS [0x%08x] - [0x%08x], len %d",
  876. mem_start, mem_end, mem_end - mem_start);
  877. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  878. }
  879. mem_start = (intptr_t)&_bt_controller_bss_start;
  880. mem_end = (intptr_t)&_bt_controller_bss_end;
  881. if (mem_start != mem_end) {
  882. ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release Controller BSS [0x%08x] - [0x%08x], len %d",
  883. mem_start, mem_end, mem_end - mem_start);
  884. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  885. }
  886. }
  887. /* If the addresses of btdm .data and bt .data are consecutive,
  888. * they are registered in the system heap as a piece of memory
  889. */
  890. if(_bt_data_end == _bt_controller_data_start) {
  891. mem_start = (intptr_t)&_bt_data_start;
  892. mem_end = (intptr_t)&_bt_controller_data_end;
  893. if (mem_start != mem_end) {
  894. ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release data [0x%08x] - [0x%08x], len %d",
  895. mem_start, mem_end, mem_end - mem_start);
  896. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  897. }
  898. } else {
  899. mem_start = (intptr_t)&_bt_data_start;
  900. mem_end = (intptr_t)&_bt_data_end;
  901. if (mem_start != mem_end) {
  902. ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release BT Data [0x%08x] - [0x%08x], len %d",
  903. mem_start, mem_end, mem_end - mem_start);
  904. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  905. }
  906. mem_start = (intptr_t)&_bt_controller_data_start;
  907. mem_end = (intptr_t)&_bt_controller_data_end;
  908. if (mem_start != mem_end) {
  909. ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release Controller Data [0x%08x] - [0x%08x], len %d",
  910. mem_start, mem_end, mem_end - mem_start);
  911. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  912. }
  913. }
  914. }
  915. return ESP_OK;
  916. }
  917. esp_bt_controller_status_t esp_bt_controller_get_status(void)
  918. {
  919. return ble_controller_status;
  920. }
  921. esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
  922. {
  923. esp_err_t stat = ESP_FAIL;
  924. switch (power_type) {
  925. case ESP_BLE_PWR_TYPE_DEFAULT:
  926. case ESP_BLE_PWR_TYPE_ADV:
  927. case ESP_BLE_PWR_TYPE_SCAN:
  928. if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
  929. stat = ESP_OK;
  930. }
  931. break;
  932. case ESP_BLE_PWR_TYPE_CONN_HDL0:
  933. case ESP_BLE_PWR_TYPE_CONN_HDL1:
  934. case ESP_BLE_PWR_TYPE_CONN_HDL2:
  935. case ESP_BLE_PWR_TYPE_CONN_HDL3:
  936. case ESP_BLE_PWR_TYPE_CONN_HDL4:
  937. case ESP_BLE_PWR_TYPE_CONN_HDL5:
  938. case ESP_BLE_PWR_TYPE_CONN_HDL6:
  939. case ESP_BLE_PWR_TYPE_CONN_HDL7:
  940. case ESP_BLE_PWR_TYPE_CONN_HDL8:
  941. if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type, power_level) == 0) {
  942. stat = ESP_OK;
  943. }
  944. break;
  945. default:
  946. stat = ESP_ERR_NOT_SUPPORTED;
  947. break;
  948. }
  949. return stat;
  950. }
  951. esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type, uint16_t handle,
  952. esp_power_level_t power_level)
  953. {
  954. esp_err_t stat = ESP_FAIL;
  955. switch (power_type) {
  956. case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
  957. case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
  958. case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
  959. if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
  960. stat = ESP_OK;
  961. }
  962. break;
  963. case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
  964. case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
  965. if (ble_txpwr_set(power_type, handle, power_level) == 0) {
  966. stat = ESP_OK;
  967. }
  968. break;
  969. default:
  970. stat = ESP_ERR_NOT_SUPPORTED;
  971. break;
  972. }
  973. return stat;
  974. }
  975. esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
  976. {
  977. int tx_level = 0;
  978. switch (power_type) {
  979. case ESP_BLE_PWR_TYPE_ADV:
  980. case ESP_BLE_PWR_TYPE_SCAN:
  981. case ESP_BLE_PWR_TYPE_DEFAULT:
  982. tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
  983. break;
  984. case ESP_BLE_PWR_TYPE_CONN_HDL0:
  985. case ESP_BLE_PWR_TYPE_CONN_HDL1:
  986. case ESP_BLE_PWR_TYPE_CONN_HDL2:
  987. case ESP_BLE_PWR_TYPE_CONN_HDL3:
  988. case ESP_BLE_PWR_TYPE_CONN_HDL4:
  989. case ESP_BLE_PWR_TYPE_CONN_HDL5:
  990. case ESP_BLE_PWR_TYPE_CONN_HDL6:
  991. case ESP_BLE_PWR_TYPE_CONN_HDL7:
  992. case ESP_BLE_PWR_TYPE_CONN_HDL8:
  993. tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type);
  994. break;
  995. default:
  996. return ESP_PWR_LVL_INVALID;
  997. }
  998. if (tx_level < 0) {
  999. return ESP_PWR_LVL_INVALID;
  1000. }
  1001. return (esp_power_level_t)tx_level;
  1002. }
  1003. esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t power_type,
  1004. uint16_t handle)
  1005. {
  1006. int tx_level = 0;
  1007. switch (power_type) {
  1008. case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
  1009. case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
  1010. case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
  1011. tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
  1012. break;
  1013. case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
  1014. case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
  1015. tx_level = ble_txpwr_get(power_type, handle);
  1016. break;
  1017. default:
  1018. return ESP_PWR_LVL_INVALID;
  1019. }
  1020. if (tx_level < 0) {
  1021. return ESP_PWR_LVL_INVALID;
  1022. }
  1023. return (esp_power_level_t)tx_level;
  1024. }
  1025. #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  1026. void esp_ble_controller_log_dump_all(bool output)
  1027. {
  1028. ble_log_async_output_dump_all(output);
  1029. }
  1030. #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
  1031. #if (!CONFIG_BT_NIMBLE_ENABLED) && (CONFIG_BT_CONTROLLER_ENABLED == true)
  1032. #define BLE_SM_KEY_ERR 0x17
  1033. #if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1034. #include "mbedtls/aes.h"
  1035. #if CONFIG_BT_LE_SM_SC
  1036. #include "mbedtls/cipher.h"
  1037. #include "mbedtls/entropy.h"
  1038. #include "mbedtls/ctr_drbg.h"
  1039. #include "mbedtls/cmac.h"
  1040. #include "mbedtls/ecdh.h"
  1041. #include "mbedtls/ecp.h"
  1042. #endif // CONFIG_BT_LE_SM_SC
  1043. #else
  1044. #include "tinycrypt/aes.h"
  1045. #include "tinycrypt/constants.h"
  1046. #include "tinycrypt/utils.h"
  1047. #if CONFIG_BT_LE_SM_SC
  1048. #include "tinycrypt/cmac_mode.h"
  1049. #include "tinycrypt/ecc_dh.h"
  1050. #endif // CONFIG_BT_LE_SM_SC
  1051. #endif // CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1052. #if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1053. #if CONFIG_BT_LE_SM_SC
  1054. static mbedtls_ecp_keypair keypair;
  1055. #endif // CONFIG_BT_LE_SM_SC
  1056. #endif// CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1057. int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_key_y,
  1058. const uint8_t *our_priv_key, uint8_t *out_dhkey)
  1059. {
  1060. uint8_t dh[32];
  1061. uint8_t pk[64];
  1062. uint8_t priv[32];
  1063. int rc = BLE_SM_KEY_ERR;
  1064. swap_buf(pk, peer_pub_key_x, 32);
  1065. swap_buf(&pk[32], peer_pub_key_y, 32);
  1066. swap_buf(priv, our_priv_key, 32);
  1067. #if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1068. struct mbedtls_ecp_point pt = {0}, Q = {0};
  1069. mbedtls_mpi z = {0}, d = {0};
  1070. mbedtls_ctr_drbg_context ctr_drbg = {0};
  1071. mbedtls_entropy_context entropy = {0};
  1072. uint8_t pub[65] = {0};
  1073. /* Hardcoded first byte of pub key for MBEDTLS_ECP_PF_UNCOMPRESSED */
  1074. pub[0] = 0x04;
  1075. memcpy(&pub[1], pk, 64);
  1076. /* Initialize the required structures here */
  1077. mbedtls_ecp_point_init(&pt);
  1078. mbedtls_ecp_point_init(&Q);
  1079. mbedtls_ctr_drbg_init(&ctr_drbg);
  1080. mbedtls_entropy_init(&entropy);
  1081. mbedtls_mpi_init(&d);
  1082. mbedtls_mpi_init(&z);
  1083. /* Below 3 steps are to validate public key on curve secp256r1 */
  1084. if (mbedtls_ecp_group_load(&keypair.MBEDTLS_PRIVATE(grp), MBEDTLS_ECP_DP_SECP256R1) != 0) {
  1085. goto exit;
  1086. }
  1087. if (mbedtls_ecp_point_read_binary(&keypair.MBEDTLS_PRIVATE(grp), &pt, pub, 65) != 0) {
  1088. goto exit;
  1089. }
  1090. if (mbedtls_ecp_check_pubkey(&keypair.MBEDTLS_PRIVATE(grp), &pt) != 0) {
  1091. goto exit;
  1092. }
  1093. /* Set PRNG */
  1094. if ((rc = mbedtls_ctr_drbg_seed(&ctr_drbg, mbedtls_entropy_func, &entropy,
  1095. NULL, 0)) != 0) {
  1096. goto exit;
  1097. }
  1098. /* Prepare point Q from pub key */
  1099. if (mbedtls_ecp_point_read_binary(&keypair.MBEDTLS_PRIVATE(grp), &Q, pub, 65) != 0) {
  1100. goto exit;
  1101. }
  1102. if (mbedtls_mpi_read_binary(&d, priv, 32) != 0) {
  1103. goto exit;
  1104. }
  1105. rc = mbedtls_ecdh_compute_shared(&keypair.MBEDTLS_PRIVATE(grp), &z, &Q, &d,
  1106. mbedtls_ctr_drbg_random, &ctr_drbg);
  1107. if (rc != 0) {
  1108. goto exit;
  1109. }
  1110. rc = mbedtls_mpi_write_binary(&z, dh, 32);
  1111. if (rc != 0) {
  1112. goto exit;
  1113. }
  1114. exit:
  1115. mbedtls_ecp_point_free(&pt);
  1116. mbedtls_mpi_free(&z);
  1117. mbedtls_mpi_free(&d);
  1118. mbedtls_ecp_point_free(&Q);
  1119. mbedtls_entropy_free(&entropy);
  1120. mbedtls_ctr_drbg_free(&ctr_drbg);
  1121. if (rc != 0) {
  1122. return BLE_SM_KEY_ERR;
  1123. }
  1124. #else
  1125. if (uECC_valid_public_key(pk, &curve_secp256r1) < 0) {
  1126. return BLE_SM_KEY_ERR;
  1127. }
  1128. rc = uECC_shared_secret(pk, priv, dh, &curve_secp256r1);
  1129. if (rc == TC_CRYPTO_FAIL) {
  1130. return BLE_SM_KEY_ERR;
  1131. }
  1132. #endif // CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1133. swap_buf(out_dhkey, dh, 32);
  1134. return 0;
  1135. }
  1136. /* based on Core Specification 4.2 Vol 3. Part H 2.3.5.6.1 */
  1137. static const uint8_t ble_sm_alg_dbg_priv_key[32] = {
  1138. 0x3f, 0x49, 0xf6, 0xd4, 0xa3, 0xc5, 0x5f, 0x38, 0x74, 0xc9, 0xb3, 0xe3,
  1139. 0xd2, 0x10, 0x3f, 0x50, 0x4a, 0xff, 0x60, 0x7b, 0xeb, 0x40, 0xb7, 0x99,
  1140. 0x58, 0x99, 0xb8, 0xa6, 0xcd, 0x3c, 0x1a, 0xbd
  1141. };
  1142. #if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1143. static int mbedtls_gen_keypair(uint8_t *public_key, uint8_t *private_key)
  1144. {
  1145. int rc = BLE_SM_KEY_ERR;
  1146. size_t olen = 0;
  1147. uint8_t pub[65] = {0};
  1148. mbedtls_entropy_context entropy = {0};
  1149. mbedtls_ctr_drbg_context ctr_drbg = {0};
  1150. mbedtls_entropy_init(&entropy);
  1151. mbedtls_ctr_drbg_init(&ctr_drbg);
  1152. mbedtls_ecp_keypair_init(&keypair);
  1153. if ((rc = mbedtls_ctr_drbg_seed(&ctr_drbg, mbedtls_entropy_func, &entropy,
  1154. NULL, 0)) != 0) {
  1155. goto exit;
  1156. }
  1157. if ((rc = mbedtls_ecp_gen_key(MBEDTLS_ECP_DP_SECP256R1, &keypair,
  1158. mbedtls_ctr_drbg_random, &ctr_drbg)) != 0) {
  1159. goto exit;
  1160. }
  1161. if ((rc = mbedtls_mpi_write_binary(&keypair.MBEDTLS_PRIVATE(d), private_key, 32)) != 0) {
  1162. goto exit;
  1163. }
  1164. if ((rc = mbedtls_ecp_point_write_binary(&keypair.MBEDTLS_PRIVATE(grp),
  1165. &keypair.MBEDTLS_PRIVATE(Q),
  1166. MBEDTLS_ECP_PF_UNCOMPRESSED,
  1167. &olen, pub, 65)) != 0) {
  1168. goto exit;
  1169. }
  1170. memcpy(public_key, &pub[1], 64);
  1171. exit:
  1172. mbedtls_ctr_drbg_free(&ctr_drbg);
  1173. mbedtls_entropy_free(&entropy);
  1174. if (rc != 0) {
  1175. mbedtls_ecp_keypair_free(&keypair);
  1176. return BLE_SM_KEY_ERR;
  1177. }
  1178. return 0;
  1179. }
  1180. #endif // CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1181. /**
  1182. * pub: 64 bytes
  1183. * priv: 32 bytes
  1184. */
  1185. int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv)
  1186. {
  1187. #if CONFIG_BT_LE_SM_SC_DEBUG_KEYS
  1188. swap_buf(pub, ble_sm_alg_dbg_pub_key, 32);
  1189. swap_buf(&pub[32], &ble_sm_alg_dbg_pub_key[32], 32);
  1190. swap_buf(priv, ble_sm_alg_dbg_priv_key, 32);
  1191. #else
  1192. uint8_t pk[64];
  1193. do {
  1194. #if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1195. if (mbedtls_gen_keypair(pk, priv) != 0) {
  1196. return BLE_SM_KEY_ERR;
  1197. }
  1198. #else
  1199. if (uECC_make_key(pk, priv, &curve_secp256r1) != TC_CRYPTO_SUCCESS) {
  1200. return BLE_SM_KEY_ERR;
  1201. }
  1202. #endif // CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  1203. /* Make sure generated key isn't debug key. */
  1204. } while (memcmp(priv, ble_sm_alg_dbg_priv_key, 32) == 0);
  1205. swap_buf(pub, pk, 32);
  1206. swap_buf(&pub[32], &pk[32], 32);
  1207. swap_in_place(priv, 32);
  1208. #endif // CONFIG_BT_LE_SM_SC_DEBUG_KEYS
  1209. return 0;
  1210. }
  1211. #endif // (!CONFIG_BT_NIMBLE_ENABLED) && (CONFIG_BT_CONTROLLER_ENABLED == true)