Kconfig 15 KB

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  1. menu "SPI Flash driver"
  2. depends on !APP_BUILD_TYPE_PURE_RAM_APP
  3. config SPI_FLASH_VERIFY_WRITE
  4. bool "Verify SPI flash writes"
  5. depends on !SPI_FLASH_ROM_IMPL
  6. default n
  7. help
  8. If this option is enabled, any time SPI flash is written then the data will be read
  9. back and verified. This can catch hardware problems with SPI flash, or flash which
  10. was not erased before verification.
  11. config SPI_FLASH_LOG_FAILED_WRITE
  12. bool "Log errors if verification fails"
  13. depends on SPI_FLASH_VERIFY_WRITE
  14. default n
  15. help
  16. If this option is enabled, if SPI flash write verification fails then a log error line
  17. will be written with the address, expected & actual values. This can be useful when
  18. debugging hardware SPI flash problems.
  19. config SPI_FLASH_WARN_SETTING_ZERO_TO_ONE
  20. bool "Log warning if writing zero bits to ones"
  21. depends on SPI_FLASH_VERIFY_WRITE
  22. default n
  23. help
  24. If this option is enabled, any SPI flash write which tries to set zero bits in the flash to
  25. ones will log a warning. Such writes will not result in the requested data appearing identically
  26. in flash once written, as SPI NOR flash can only set bits to one when an entire sector is erased.
  27. After erasing, individual bits can only be written from one to zero.
  28. Note that some software (such as SPIFFS) which is aware of SPI NOR flash may write one bits as an
  29. optimisation, relying on the data in flash becoming a bitwise AND of the new data and any existing data.
  30. Such software will log spurious warnings if this option is enabled.
  31. config SPI_FLASH_ENABLE_COUNTERS
  32. bool "Enable operation counters"
  33. default n
  34. help
  35. This option enables the following APIs:
  36. - esp_flash_reset_counters
  37. - esp_flash_dump_counters
  38. - esp_flash_get_counters
  39. These APIs may be used to collect performance data for spi_flash APIs
  40. and to help understand behaviour of libraries which use SPI flash.
  41. config SPI_FLASH_ROM_DRIVER_PATCH
  42. bool "Enable SPI flash ROM driver patched functions"
  43. default y
  44. help
  45. Enable this flag to use patched versions of SPI flash ROM driver functions.
  46. This option should be enabled, if any one of the following is true: (1) need to write
  47. to flash on ESP32-D2WD; (2) main SPI flash is connected to non-default pins; (3) main
  48. SPI flash chip is manufactured by ISSI.
  49. config SPI_FLASH_ROM_IMPL
  50. bool "Use esp_flash implementation in ROM"
  51. depends on ESP_ROM_HAS_SPI_FLASH
  52. default n
  53. help
  54. Enable this flag to use new SPI flash driver functions from ROM instead of ESP-IDF.
  55. If keeping this as "n" in your project, you will have less free IRAM.
  56. But you can use all of our flash features.
  57. If making this as "y" in your project, you will increase free IRAM.
  58. But you may miss out on some flash features and support for new flash chips.
  59. Currently the ROM cannot support the following features:
  60. - SPI_FLASH_AUTO_SUSPEND (C3, S3)
  61. choice SPI_FLASH_DANGEROUS_WRITE
  62. bool "Writing to dangerous flash regions"
  63. default SPI_FLASH_DANGEROUS_WRITE_ALLOWED if APP_BUILD_TYPE_RAM
  64. default SPI_FLASH_DANGEROUS_WRITE_ABORTS
  65. help
  66. SPI flash APIs can optionally abort or return a failure code
  67. if erasing or writing addresses that fall at the beginning
  68. of flash (covering the bootloader and partition table) or that
  69. overlap the app partition that contains the running app.
  70. It is not recommended to ever write to these regions from an IDF app,
  71. and this check prevents logic errors or corrupted firmware memory from
  72. damaging these regions.
  73. Note that this feature *does not* check calls to the esp_rom_xxx SPI flash
  74. ROM functions. These functions should not be called directly from IDF
  75. applications.
  76. config SPI_FLASH_DANGEROUS_WRITE_ABORTS
  77. bool "Aborts"
  78. config SPI_FLASH_DANGEROUS_WRITE_FAILS
  79. bool "Fails"
  80. config SPI_FLASH_DANGEROUS_WRITE_ALLOWED
  81. bool "Allowed"
  82. endchoice
  83. config SPI_FLASH_SHARE_SPI1_BUS
  84. bool "Support other devices attached to SPI1 bus"
  85. default n
  86. depends on IDF_TARGET_ESP32
  87. select SPI_MASTER_ISR_IN_IRAM
  88. help
  89. Each SPI bus needs a lock for arbitration among devices. This allows multiple
  90. devices on a same bus, but may reduce the speed of esp_flash driver access to the
  91. main flash chip.
  92. If you only need to use esp_flash driver to access the main flash chip, disable
  93. this option, and the lock will be bypassed on SPI1 bus. Otherwise if extra devices
  94. are needed to attach to SPI1 bus, enable this option.
  95. config SPI_FLASH_BYPASS_BLOCK_ERASE
  96. bool "Bypass a block erase and always do sector erase"
  97. default n
  98. help
  99. Some flash chips can have very high "max" erase times, especially for block erase (32KB or 64KB).
  100. This option allows to bypass "block erase" and always do sector erase commands.
  101. This will be much slower overall in most cases, but improves latency for other code to run.
  102. config SPI_FLASH_YIELD_DURING_ERASE
  103. bool "Enables yield operation during flash erase"
  104. default y
  105. help
  106. This allows to yield the CPUs between erase commands.
  107. Prevents starvation of other tasks.
  108. Please use this configuration together with ``SPI_FLASH_ERASE_YIELD_DURATION_MS`` and
  109. ``SPI_FLASH_ERASE_YIELD_TICKS`` after carefully checking flash datasheet to avoid a
  110. watchdog timeout.
  111. For more information, please check `SPI Flash API` reference documenation
  112. under section `OS Function`.
  113. config SPI_FLASH_ERASE_YIELD_DURATION_MS
  114. int "Duration of erasing to yield CPUs (ms)"
  115. depends on SPI_FLASH_YIELD_DURING_ERASE
  116. default 20
  117. help
  118. If a duration of one erase command is large
  119. then it will yield CPUs after finishing a current command.
  120. config SPI_FLASH_ERASE_YIELD_TICKS
  121. int "CPU release time (tick) for an erase operation"
  122. depends on SPI_FLASH_YIELD_DURING_ERASE
  123. default 1
  124. help
  125. Defines how many ticks will be before returning to continue a erasing.
  126. config SPI_FLASH_SUSPEND_QVL_SUPPORTED
  127. # Internally usage
  128. bool
  129. default y if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32C2
  130. default n
  131. config SPI_FLASH_AUTO_SUSPEND
  132. bool "Auto suspend long erase/write operations (READ DOCS FIRST)"
  133. default n
  134. depends on SPI_FLASH_SUSPEND_QVL_SUPPORTED && !SPI_FLASH_ROM_IMPL
  135. help
  136. This option is default n because it can't be used in every situation. You need to
  137. evaluate this feature through suspend part in `SPI Flash API` document.
  138. CAUTION: If you want to OTA to an app with this feature turned on, please make
  139. sure the bootloader has the support for it. (later than IDF v4.3)
  140. Auto-suspend feature only supported by specific flash chips.
  141. If you are using an official module, please contact Espressif Business support.
  142. Also reading auto suspend part in `SPI Flash API` document before you enable this function.
  143. config SPI_FLASH_WRITE_CHUNK_SIZE
  144. int "Flash write chunk size"
  145. default 8192
  146. range 256 8192
  147. help
  148. Flash write is broken down in terms of multiple (smaller) write operations.
  149. This configuration options helps to set individual write chunk size, smaller
  150. value here ensures that cache (and non-IRAM resident interrupts) remains
  151. disabled for shorter duration.
  152. config SPI_FLASH_SIZE_OVERRIDE
  153. bool "Override flash size in bootloader header by ESPTOOLPY_FLASHSIZE"
  154. default n
  155. help
  156. SPI Flash driver uses the flash size configured in bootloader header by default.
  157. Enable this option to override flash size with latest ESPTOOLPY_FLASHSIZE value from
  158. the app header if the size in the bootloader header is incorrect.
  159. config SPI_FLASH_CHECK_ERASE_TIMEOUT_DISABLED
  160. bool "Flash timeout checkout disabled"
  161. default n
  162. help
  163. This option is helpful if you are using a flash chip whose timeout is quite large or unpredictable.
  164. config SPI_FLASH_OVERRIDE_CHIP_DRIVER_LIST
  165. bool "Override default chip driver list"
  166. default n
  167. help
  168. This option allows the chip driver list to be customized, instead of using the default list provided by
  169. ESP-IDF.
  170. When this option is enabled, the default list is no longer compiled or linked. Instead, the
  171. `default_registered_chips` structure must be provided by the user.
  172. See example: custom_chip_driver under examples/storage for more details.
  173. menu "SPI Flash behavior when brownout"
  174. config SPI_FLASH_BROWNOUT_RESET_XMC
  175. bool "Enable sending reset when brownout for XMC flash chips"
  176. default y
  177. select SPI_FLASH_BROWNOUT_RESET
  178. help
  179. When this option is selected, the patch will be enabled for XMC.
  180. Follow the recommended flow by XMC for better stability.
  181. DO NOT DISABLE UNLESS YOU KNOW WHAT YOU ARE DOING.
  182. config SPI_FLASH_BROWNOUT_RESET
  183. bool
  184. default y
  185. select ESP_SYSTEM_BROWNOUT_INTR
  186. help
  187. When brownout happens during flash erase/write operations,
  188. send reset command to stop the flash operations to improve stability.
  189. endmenu
  190. menu "Auto-detect flash chips"
  191. visible if !SPI_FLASH_OVERRIDE_CHIP_DRIVER_LIST
  192. orsource "./$IDF_TARGET/Kconfig.soc_caps.in"
  193. config SPI_FLASH_SUPPORT_ISSI_CHIP
  194. bool "ISSI"
  195. default y if SPI_FLASH_VENDOR_ISSI_SUPPORTED
  196. default n
  197. help
  198. Enable this to support auto detection of ISSI chips if chip vendor not directly
  199. given by ``chip_drv`` member of the chip struct. This adds support for variant
  200. chips, however will extend detecting time.
  201. config SPI_FLASH_SUPPORT_MXIC_CHIP
  202. bool "MXIC"
  203. default y if SPI_FLASH_VENDOR_MXIC_SUPPORTED
  204. default n
  205. help
  206. Enable this to support auto detection of MXIC chips if chip vendor not directly
  207. given by ``chip_drv`` member of the chip struct. This adds support for variant
  208. chips, however will extend detecting time.
  209. config SPI_FLASH_SUPPORT_GD_CHIP
  210. bool "GigaDevice"
  211. default y if SPI_FLASH_VENDOR_GD_SUPPORTED
  212. default n
  213. help
  214. Enable this to support auto detection of GD (GigaDevice) chips if chip vendor not
  215. directly given by ``chip_drv`` member of the chip struct. If you are using Wrover
  216. modules, please don't disable this, otherwise your flash may not work in 4-bit
  217. mode.
  218. This adds support for variant chips, however will extend detecting time and image
  219. size. Note that the default chip driver supports the GD chips with product ID
  220. 60H.
  221. config SPI_FLASH_SUPPORT_WINBOND_CHIP
  222. bool "Winbond"
  223. default y if SPI_FLASH_VENDOR_WINBOND_SUPPORTED
  224. default n
  225. help
  226. Enable this to support auto detection of Winbond chips if chip vendor not directly
  227. given by ``chip_drv`` member of the chip struct. This adds support for variant
  228. chips, however will extend detecting time.
  229. config SPI_FLASH_SUPPORT_BOYA_CHIP
  230. bool "BOYA"
  231. # ESP32 doens't usually use this chip, default n to save iram.
  232. default y if SPI_FLASH_VENDOR_BOYA_SUPPORTED
  233. default n
  234. help
  235. Enable this to support auto detection of BOYA chips if chip vendor not directly
  236. given by ``chip_drv`` member of the chip struct. This adds support for variant
  237. chips, however will extend detecting time.
  238. config SPI_FLASH_SUPPORT_TH_CHIP
  239. bool "TH"
  240. # ESP32 doens't usually use this chip, default n to save iram.
  241. default y if SPI_FLASH_VENDOR_TH_SUPPORTED
  242. default n
  243. help
  244. Enable this to support auto detection of TH chips if chip vendor not directly
  245. given by ``chip_drv`` member of the chip struct. This adds support for variant
  246. chips, however will extend detecting time.
  247. config SPI_FLASH_SUPPORT_MXIC_OPI_CHIP
  248. bool "mxic (opi)"
  249. depends on IDF_TARGET_ESP32S3
  250. default y
  251. help
  252. Enable this to support auto detection of Octal MXIC chips if chip vendor not directly
  253. given by ``chip_drv`` member of the chip struct. This adds support for variant
  254. chips, however will extend detecting time.
  255. endmenu #auto detect flash chips
  256. config SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE
  257. bool "Enable encrypted partition read/write operations"
  258. default y
  259. help
  260. This option enables flash read/write operations to encrypted partition/s. This option
  261. is kept enabled irrespective of state of flash encryption feature. However, in case
  262. application is not using flash encryption feature and is in need of some additional
  263. memory from IRAM region (~1KB) then this config can be disabled.
  264. config SPI_FLASH_HPM_ENABLE
  265. bool
  266. default n
  267. help
  268. This option is invisible, and will be selected automatically
  269. when ``ESPTOOLPY_FLASHFREQ_120M`` is selected.
  270. config SPI_FLASH_32BIT_ADDRESS
  271. bool
  272. default y if ESPTOOLPY_FLASHSIZE_32MB || ESPTOOLPY_FLASHSIZE_64MB || ESPTOOLPY_FLASHSIZE_128MB
  273. default n
  274. help
  275. This is a helper config for 32bits address flash. Invisible for users.
  276. config SPI_FLASH_32BIT_ADDR_ENABLE
  277. bool "Enable 32-bit-address (over 16MB) SPI Flash access"
  278. depends on SPI_FLASH_32BIT_ADDRESS && !ESPTOOLPY_OCT_FLASH && IDF_TARGET_ESP32S3 && IDF_EXPERIMENTAL_FEATURES
  279. default n
  280. help
  281. Enabling this option allows the CPU to access 32-bit-address flash beyond 16M range.
  282. 1. This option only valid for 4-line flash. Octal flash doesn't need this.
  283. 2. This option is experimental, which means it can't use on all flash chips stable, for more
  284. information, please contact Espressif Business support.
  285. endmenu