cpu.h 2.5 KB

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  1. // Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. // http://www.apache.org/licenses/LICENSE-2.0
  7. //
  8. // Unless required by applicable law or agreed to in writing, software
  9. // distributed under the License is distributed on an "AS IS" BASIS,
  10. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  11. // See the License for the specific language governing permissions and
  12. // limitations under the License.
  13. #ifndef _SOC_CPU_H
  14. #define _SOC_CPU_H
  15. #include "xtensa/corebits.h"
  16. /* C macros for xtensa special register read/write/exchange */
  17. #define RSR(reg, curval) asm volatile ("rsr %0, " #reg : "=r" (curval));
  18. #define WSR(reg, newval) asm volatile ("wsr %0, " #reg : : "r" (newval));
  19. #define XSR(reg, swapval) asm volatile ("xsr %0, " #reg : "+r" (swapval));
  20. /* Return true if the CPU is in an interrupt context
  21. (PS.UM == 0)
  22. */
  23. static inline bool cpu_in_interrupt_context(void)
  24. {
  25. uint32_t ps;
  26. RSR(PS, ps);
  27. return (ps & PS_UM) == 0;
  28. }
  29. /* Functions to set page attributes for Region Protection option in the CPU.
  30. * See Xtensa ISA Reference manual for explanation of arguments (section 4.6.3.2).
  31. */
  32. static inline void cpu_write_dtlb(uint32_t vpn, unsigned attr)
  33. {
  34. asm volatile ("wdtlb %1, %0; dsync\n" :: "r" (vpn), "r" (attr));
  35. }
  36. static inline void cpu_write_itlb(unsigned vpn, unsigned attr)
  37. {
  38. asm volatile ("witlb %1, %0; isync\n" :: "r" (vpn), "r" (attr));
  39. }
  40. /* Make page 0 access raise an exception.
  41. * Also protect some other unused pages so we can catch weirdness.
  42. * Useful attribute values:
  43. * 0 — cached, RW
  44. * 2 — bypass cache, RWX (default value after CPU reset)
  45. * 15 — no access, raise exception
  46. */
  47. static inline void cpu_configure_region_protection()
  48. {
  49. const uint32_t pages_to_protect[] = {0x00000000, 0x80000000, 0xa0000000, 0xc0000000, 0xe0000000};
  50. for (int i = 0; i < sizeof(pages_to_protect)/sizeof(pages_to_protect[0]); ++i) {
  51. cpu_write_dtlb(pages_to_protect[i], 0xf);
  52. cpu_write_itlb(pages_to_protect[i], 0xf);
  53. }
  54. cpu_write_dtlb(0x20000000, 0);
  55. cpu_write_itlb(0x20000000, 0);
  56. }
  57. /*
  58. * @brief Set CPU frequency to the value defined in menuconfig
  59. *
  60. * Called from cpu_start.c, not intended to be called from other places.
  61. * This is a temporary function which will be replaced once dynamic
  62. * CPU frequency changing is implemented.
  63. */
  64. void esp_set_cpu_freq(void);
  65. #endif