timer_legacy.c 25 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483
  1. /*
  2. * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include <string.h>
  7. #include "esp_log.h"
  8. #include "esp_err.h"
  9. #include "esp_check.h"
  10. #include "esp_intr_alloc.h"
  11. #include "freertos/FreeRTOS.h"
  12. #include "driver/timer_types_legacy.h"
  13. #include "hal/timer_hal.h"
  14. #include "hal/timer_ll.h"
  15. #include "hal/check.h"
  16. #include "soc/timer_periph.h"
  17. #include "esp_private/esp_clk.h"
  18. #include "soc/timer_group_reg.h"
  19. #include "esp_private/periph_ctrl.h"
  20. static const char *TIMER_TAG = "timer_group";
  21. #define TIMER_GROUP_NUM_ERROR "TIMER GROUP NUM ERROR"
  22. #define TIMER_NUM_ERROR "HW TIMER NUM ERROR"
  23. #define TIMER_PARAM_ADDR_ERROR "HW TIMER PARAM ADDR ERROR"
  24. #define TIMER_NEVER_INIT_ERROR "HW TIMER NEVER INIT ERROR"
  25. #define TIMER_COUNT_DIR_ERROR "HW TIMER COUNTER DIR ERROR"
  26. #define TIMER_AUTORELOAD_ERROR "HW TIMER AUTORELOAD ERROR"
  27. #define TIMER_SCALE_ERROR "HW TIMER SCALE ERROR"
  28. #define TIMER_ALARM_ERROR "HW TIMER ALARM ERROR"
  29. #define DIVIDER_RANGE_ERROR "HW TIMER divider outside of [2, 65536] range error"
  30. #define TIMER_ENTER_CRITICAL(mux) portENTER_CRITICAL_SAFE(mux);
  31. #define TIMER_EXIT_CRITICAL(mux) portEXIT_CRITICAL_SAFE(mux);
  32. typedef struct {
  33. timer_isr_t fn; /*!< isr function */
  34. void *args; /*!< isr function args */
  35. timer_isr_handle_t timer_isr_handle; /*!< interrupt handle */
  36. timer_group_t isr_timer_group; /*!< timer group of interrupt triggered */
  37. } timer_isr_func_t;
  38. typedef struct {
  39. timer_hal_context_t hal;
  40. timer_isr_func_t timer_isr_fun;
  41. timer_src_clk_t clk_src;
  42. gptimer_count_direction_t direction;
  43. uint32_t divider;
  44. uint64_t alarm_value;
  45. bool alarm_en;
  46. bool auto_reload_en;
  47. bool counter_en;
  48. } timer_obj_t;
  49. static timer_obj_t *p_timer_obj[TIMER_GROUP_MAX][TIMER_MAX] = {0};
  50. static portMUX_TYPE timer_spinlock[TIMER_GROUP_MAX] = { [0 ... TIMER_GROUP_MAX - 1] = portMUX_INITIALIZER_UNLOCKED, };
  51. esp_err_t timer_get_counter_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t *timer_val)
  52. {
  53. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  54. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  55. ESP_RETURN_ON_FALSE(timer_val != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
  56. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  57. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  58. *timer_val = timer_hal_capture_and_get_counter_value(&p_timer_obj[group_num][timer_num]->hal);
  59. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  60. return ESP_OK;
  61. }
  62. esp_err_t timer_get_counter_time_sec(timer_group_t group_num, timer_idx_t timer_num, double *time)
  63. {
  64. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  65. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  66. ESP_RETURN_ON_FALSE(time != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
  67. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  68. uint64_t timer_val = timer_hal_capture_and_get_counter_value(&p_timer_obj[group_num][timer_num]->hal);
  69. uint32_t div = p_timer_obj[group_num][timer_num]->divider;
  70. // [clk_tree] TODO: replace the following switch table by clk_tree API
  71. switch (p_timer_obj[group_num][timer_num]->clk_src) {
  72. #if SOC_TIMER_GROUP_SUPPORT_APB
  73. case TIMER_SRC_CLK_APB:
  74. *time = (double)timer_val * div / esp_clk_apb_freq();
  75. break;
  76. #endif
  77. #if SOC_TIMER_GROUP_SUPPORT_XTAL
  78. case TIMER_SRC_CLK_XTAL:
  79. *time = (double)timer_val * div / esp_clk_xtal_freq();
  80. break;
  81. #endif
  82. #if SOC_TIMER_GROUP_SUPPORT_AHB
  83. case TIMER_SRC_CLK_AHB:
  84. *time = (double)timer_val * div / (48 * 1000 * 1000);
  85. break;
  86. #endif
  87. #if SOC_TIMER_GROUP_SUPPORT_PLL_F40M
  88. case TIMER_SRC_CLK_PLL_F40M:
  89. *time = (double)timer_val * div / (40 * 1000 * 1000);
  90. break;
  91. #endif
  92. #if SOC_TIMER_GROUP_SUPPORT_PLL_F48M
  93. case TIMER_SRC_CLK_PLL_F48M:
  94. *time = (double)timer_val * div / (48 * 1000 * 1000);
  95. break;
  96. #endif
  97. #if SOC_TIMER_GROUP_SUPPORT_PLL_F80M
  98. case TIMER_SRC_CLK_PLL_F80M:
  99. *time = (double)timer_val * div / (80 * 1000 * 1000);
  100. break;
  101. #endif
  102. default:
  103. ESP_RETURN_ON_FALSE(false, ESP_ERR_INVALID_ARG, TIMER_TAG, "invalid clock source");
  104. break;
  105. }
  106. return ESP_OK;
  107. }
  108. esp_err_t timer_set_counter_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t load_val)
  109. {
  110. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  111. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  112. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  113. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  114. timer_hal_set_counter_value(&(p_timer_obj[group_num][timer_num]->hal), load_val);
  115. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  116. return ESP_OK;
  117. }
  118. esp_err_t timer_start(timer_group_t group_num, timer_idx_t timer_num)
  119. {
  120. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  121. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  122. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  123. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  124. timer_ll_enable_counter(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, true);
  125. p_timer_obj[group_num][timer_num]->counter_en = true;
  126. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  127. return ESP_OK;
  128. }
  129. esp_err_t timer_pause(timer_group_t group_num, timer_idx_t timer_num)
  130. {
  131. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  132. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  133. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  134. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  135. timer_ll_enable_counter(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, false);
  136. p_timer_obj[group_num][timer_num]->counter_en = false;
  137. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  138. return ESP_OK;
  139. }
  140. esp_err_t timer_set_counter_mode(timer_group_t group_num, timer_idx_t timer_num, timer_count_dir_t counter_dir)
  141. {
  142. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  143. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  144. ESP_RETURN_ON_FALSE(counter_dir < TIMER_COUNT_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_COUNT_DIR_ERROR);
  145. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  146. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  147. timer_ll_set_count_direction(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, counter_dir);
  148. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  149. return ESP_OK;
  150. }
  151. esp_err_t timer_set_auto_reload(timer_group_t group_num, timer_idx_t timer_num, timer_autoreload_t reload)
  152. {
  153. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  154. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  155. ESP_RETURN_ON_FALSE(reload < TIMER_AUTORELOAD_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_AUTORELOAD_ERROR);
  156. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  157. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  158. timer_ll_enable_auto_reload(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, reload);
  159. p_timer_obj[group_num][timer_num]->auto_reload_en = reload;
  160. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  161. return ESP_OK;
  162. }
  163. esp_err_t timer_set_divider(timer_group_t group_num, timer_idx_t timer_num, uint32_t divider)
  164. {
  165. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  166. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  167. ESP_RETURN_ON_FALSE(divider > 1 && divider < 65537, ESP_ERR_INVALID_ARG, TIMER_TAG, DIVIDER_RANGE_ERROR);
  168. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  169. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  170. timer_ll_set_clock_prescale(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, divider);
  171. p_timer_obj[group_num][timer_num]->divider = divider;
  172. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  173. return ESP_OK;
  174. }
  175. esp_err_t timer_set_alarm_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t alarm_value)
  176. {
  177. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  178. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  179. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  180. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  181. timer_ll_set_alarm_value(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, alarm_value);
  182. p_timer_obj[group_num][timer_num]->alarm_value = alarm_value;
  183. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  184. return ESP_OK;
  185. }
  186. esp_err_t timer_get_alarm_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t *alarm_value)
  187. {
  188. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  189. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  190. ESP_RETURN_ON_FALSE(alarm_value != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
  191. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  192. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  193. *alarm_value = p_timer_obj[group_num][timer_num]->alarm_value;
  194. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  195. return ESP_OK;
  196. }
  197. esp_err_t timer_set_alarm(timer_group_t group_num, timer_idx_t timer_num, timer_alarm_t alarm_en)
  198. {
  199. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  200. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  201. ESP_RETURN_ON_FALSE(alarm_en < TIMER_ALARM_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_ALARM_ERROR);
  202. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  203. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  204. timer_ll_enable_alarm(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, alarm_en);
  205. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  206. return ESP_OK;
  207. }
  208. static void IRAM_ATTR timer_isr_default(void *arg)
  209. {
  210. bool is_awoken = false;
  211. timer_obj_t *timer_obj = (timer_obj_t *)arg;
  212. if (timer_obj == NULL || timer_obj->timer_isr_fun.fn == NULL) {
  213. return;
  214. }
  215. uint32_t timer_id = timer_obj->hal.timer_id;
  216. timer_hal_context_t *hal = &timer_obj->hal;
  217. TIMER_ENTER_CRITICAL(&timer_spinlock[timer_obj->timer_isr_fun.isr_timer_group]);
  218. uint32_t intr_status = timer_ll_get_intr_status(hal->dev);
  219. uint64_t old_alarm_value = timer_obj->alarm_value;
  220. if (intr_status & TIMER_LL_EVENT_ALARM(timer_id)) {
  221. // Clear interrupt status
  222. timer_ll_clear_intr_status(hal->dev, TIMER_LL_EVENT_ALARM(timer_id));
  223. // call user registered callback
  224. is_awoken = timer_obj->timer_isr_fun.fn(timer_obj->timer_isr_fun.args);
  225. // reenable alarm if required
  226. uint64_t new_alarm_value = timer_obj->alarm_value;
  227. bool reenable_alarm = (new_alarm_value != old_alarm_value) || timer_obj->auto_reload_en;
  228. timer_ll_enable_alarm(hal->dev, timer_id, reenable_alarm);
  229. }
  230. TIMER_EXIT_CRITICAL(&timer_spinlock[timer_obj->timer_isr_fun.isr_timer_group]);
  231. if (is_awoken) {
  232. portYIELD_FROM_ISR();
  233. }
  234. }
  235. esp_err_t timer_enable_intr(timer_group_t group_num, timer_idx_t timer_num)
  236. {
  237. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  238. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  239. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  240. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  241. timer_ll_enable_intr(p_timer_obj[group_num][timer_num]->hal.dev, TIMER_LL_EVENT_ALARM(timer_num), true);
  242. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  243. return ESP_OK;
  244. }
  245. esp_err_t timer_disable_intr(timer_group_t group_num, timer_idx_t timer_num)
  246. {
  247. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  248. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  249. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  250. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  251. timer_ll_enable_intr(p_timer_obj[group_num][timer_num]->hal.dev, TIMER_LL_EVENT_ALARM(timer_num), false);
  252. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  253. return ESP_OK;
  254. }
  255. esp_err_t timer_isr_register(timer_group_t group_num, timer_idx_t timer_num,
  256. void (*fn)(void *), void *arg, int intr_alloc_flags, timer_isr_handle_t *handle)
  257. {
  258. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  259. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  260. ESP_RETURN_ON_FALSE(fn != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
  261. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  262. timer_hal_context_t *hal = &p_timer_obj[group_num][timer_num]->hal;
  263. return esp_intr_alloc_intrstatus(timer_group_periph_signals.groups[group_num].timer_irq_id[timer_num],
  264. intr_alloc_flags,
  265. (uint32_t)timer_ll_get_intr_status_reg(hal->dev),
  266. TIMER_LL_EVENT_ALARM(timer_num), fn, arg, handle);
  267. }
  268. esp_err_t timer_isr_callback_add(timer_group_t group_num, timer_idx_t timer_num, timer_isr_t isr_handler, void *args, int intr_alloc_flags)
  269. {
  270. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  271. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  272. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  273. esp_err_t ret = ESP_OK;
  274. timer_disable_intr(group_num, timer_num);
  275. p_timer_obj[group_num][timer_num]->timer_isr_fun.fn = isr_handler;
  276. p_timer_obj[group_num][timer_num]->timer_isr_fun.args = args;
  277. p_timer_obj[group_num][timer_num]->timer_isr_fun.isr_timer_group = group_num;
  278. ret = timer_isr_register(group_num, timer_num, timer_isr_default, (void *)p_timer_obj[group_num][timer_num],
  279. intr_alloc_flags, &(p_timer_obj[group_num][timer_num]->timer_isr_fun.timer_isr_handle));
  280. ESP_RETURN_ON_ERROR(ret, TIMER_TAG, "register interrupt service failed");
  281. timer_enable_intr(group_num, timer_num);
  282. return ret;
  283. }
  284. esp_err_t timer_isr_callback_remove(timer_group_t group_num, timer_idx_t timer_num)
  285. {
  286. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  287. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  288. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  289. timer_disable_intr(group_num, timer_num);
  290. p_timer_obj[group_num][timer_num]->timer_isr_fun.fn = NULL;
  291. p_timer_obj[group_num][timer_num]->timer_isr_fun.args = NULL;
  292. esp_intr_free(p_timer_obj[group_num][timer_num]->timer_isr_fun.timer_isr_handle);
  293. return ESP_OK;
  294. }
  295. esp_err_t timer_init(timer_group_t group_num, timer_idx_t timer_num, const timer_config_t *config)
  296. {
  297. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  298. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  299. ESP_RETURN_ON_FALSE(config != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
  300. ESP_RETURN_ON_FALSE(config->divider > 1 && config->divider < 65537, ESP_ERR_INVALID_ARG, TIMER_TAG, DIVIDER_RANGE_ERROR);
  301. ESP_RETURN_ON_FALSE(config->intr_type < TIMER_INTR_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, "only support Level Interrupt");
  302. if (p_timer_obj[group_num][timer_num] == NULL) {
  303. p_timer_obj[group_num][timer_num] = (timer_obj_t *) heap_caps_calloc(1, sizeof(timer_obj_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
  304. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num], ESP_ERR_NO_MEM, TIMER_TAG, "no mem for timer object");
  305. }
  306. timer_hal_context_t *hal = &p_timer_obj[group_num][timer_num]->hal;
  307. periph_module_enable(timer_group_periph_signals.groups[group_num].module);
  308. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  309. timer_hal_init(hal, group_num, timer_num);
  310. timer_hal_set_counter_value(hal, 0);
  311. // although `clk_src` is of `timer_src_clk_t` type, but it's binary compatible with `gptimer_clock_source_t`,
  312. // as the underlying enum entries come from the same `soc_module_clk_t`
  313. timer_ll_set_clock_source(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, (gptimer_clock_source_t)config->clk_src);
  314. timer_ll_set_clock_prescale(hal->dev, timer_num, config->divider);
  315. timer_ll_set_count_direction(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, config->counter_dir);
  316. timer_ll_enable_intr(hal->dev, TIMER_LL_EVENT_ALARM(timer_num), false);
  317. timer_ll_clear_intr_status(hal->dev, TIMER_LL_EVENT_ALARM(timer_num));
  318. timer_ll_enable_alarm(hal->dev, timer_num, config->alarm_en);
  319. timer_ll_enable_auto_reload(hal->dev, timer_num, config->auto_reload);
  320. timer_ll_enable_counter(hal->dev, timer_num, config->counter_en);
  321. p_timer_obj[group_num][timer_num]->clk_src = config->clk_src;
  322. p_timer_obj[group_num][timer_num]->alarm_en = config->alarm_en;
  323. p_timer_obj[group_num][timer_num]->auto_reload_en = config->auto_reload;
  324. p_timer_obj[group_num][timer_num]->direction = config->counter_dir;
  325. p_timer_obj[group_num][timer_num]->counter_en = config->counter_en;
  326. p_timer_obj[group_num][timer_num]->divider = config->divider;
  327. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  328. return ESP_OK;
  329. }
  330. esp_err_t timer_deinit(timer_group_t group_num, timer_idx_t timer_num)
  331. {
  332. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  333. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  334. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  335. timer_hal_context_t *hal = &p_timer_obj[group_num][timer_num]->hal;
  336. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  337. timer_ll_enable_intr(hal->dev, TIMER_LL_EVENT_ALARM(timer_num), false);
  338. timer_ll_clear_intr_status(hal->dev, TIMER_LL_EVENT_ALARM(timer_num));
  339. timer_hal_deinit(hal);
  340. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  341. free(p_timer_obj[group_num][timer_num]);
  342. p_timer_obj[group_num][timer_num] = NULL;
  343. return ESP_OK;
  344. }
  345. esp_err_t timer_get_config(timer_group_t group_num, timer_idx_t timer_num, timer_config_t *config)
  346. {
  347. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  348. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  349. ESP_RETURN_ON_FALSE(config != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
  350. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  351. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  352. config->alarm_en = p_timer_obj[group_num][timer_num]->alarm_en;
  353. config->auto_reload = p_timer_obj[group_num][timer_num]->auto_reload_en;
  354. config->counter_dir = p_timer_obj[group_num][timer_num]->direction;
  355. config->counter_en = p_timer_obj[group_num][timer_num]->counter_en;
  356. config->divider = p_timer_obj[group_num][timer_num]->divider;
  357. config->intr_type = TIMER_INTR_LEVEL;
  358. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  359. return ESP_OK;
  360. }
  361. esp_err_t timer_group_intr_enable(timer_group_t group_num, timer_intr_t en_mask)
  362. {
  363. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  364. ESP_RETURN_ON_FALSE(p_timer_obj[group_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  365. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  366. timer_ll_enable_intr(p_timer_obj[group_num][0]->hal.dev, en_mask, true);
  367. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  368. return ESP_OK;
  369. }
  370. esp_err_t timer_group_intr_disable(timer_group_t group_num, timer_intr_t disable_mask)
  371. {
  372. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  373. ESP_RETURN_ON_FALSE(p_timer_obj[group_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  374. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  375. timer_ll_enable_intr(p_timer_obj[group_num][0]->hal.dev, disable_mask, false);
  376. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  377. return ESP_OK;
  378. }
  379. uint32_t IRAM_ATTR timer_group_get_intr_status_in_isr(timer_group_t group_num)
  380. {
  381. uint32_t intr_status = 0;
  382. if (p_timer_obj[group_num][TIMER_0] != NULL) {
  383. intr_status = timer_ll_get_intr_status(TIMER_LL_GET_HW(group_num)) & TIMER_LL_EVENT_ALARM(0);
  384. }
  385. #if SOC_TIMER_GROUP_TIMERS_PER_GROUP > 1
  386. else if (p_timer_obj[group_num][TIMER_1] != NULL) {
  387. intr_status = timer_ll_get_intr_status(TIMER_LL_GET_HW(group_num)) & TIMER_LL_EVENT_ALARM(1);
  388. }
  389. #endif
  390. return intr_status;
  391. }
  392. void IRAM_ATTR timer_group_clr_intr_status_in_isr(timer_group_t group_num, timer_idx_t timer_num)
  393. {
  394. timer_ll_clear_intr_status(p_timer_obj[group_num][timer_num]->hal.dev, TIMER_LL_EVENT_ALARM(timer_num));
  395. }
  396. void IRAM_ATTR timer_group_enable_alarm_in_isr(timer_group_t group_num, timer_idx_t timer_num)
  397. {
  398. timer_ll_enable_alarm(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, true);
  399. }
  400. uint64_t IRAM_ATTR timer_group_get_counter_value_in_isr(timer_group_t group_num, timer_idx_t timer_num)
  401. {
  402. timer_ll_trigger_soft_capture(p_timer_obj[group_num][timer_num]->hal.dev, timer_num);
  403. uint64_t val = timer_ll_get_counter_value(p_timer_obj[group_num][timer_num]->hal.dev, timer_num);
  404. return val;
  405. }
  406. void IRAM_ATTR timer_group_set_alarm_value_in_isr(timer_group_t group_num, timer_idx_t timer_num, uint64_t alarm_val)
  407. {
  408. timer_ll_set_alarm_value(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, alarm_val);
  409. p_timer_obj[group_num][timer_num]->alarm_value = alarm_val;
  410. }
  411. void IRAM_ATTR timer_group_set_counter_enable_in_isr(timer_group_t group_num, timer_idx_t timer_num, timer_start_t counter_en)
  412. {
  413. timer_ll_enable_counter(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, counter_en);
  414. p_timer_obj[group_num][timer_num]->counter_en = counter_en;
  415. }
  416. bool IRAM_ATTR timer_group_get_auto_reload_in_isr(timer_group_t group_num, timer_idx_t timer_num)
  417. {
  418. return p_timer_obj[group_num][timer_num]->auto_reload_en;
  419. }
  420. /**
  421. * @brief This function will be called during start up, to check that this legacy timer group driver is not running along with the gptimer driver
  422. */
  423. __attribute__((constructor))
  424. static void check_legacy_timer_driver_conflict(void)
  425. {
  426. // This function was declared as weak here. gptimer driver has one implementation.
  427. // So if gptimer driver is not linked in, then `gptimer_new_timer()` should be NULL at runtime.
  428. extern __attribute__((weak)) esp_err_t gptimer_new_timer(const void *config, void **ret_timer);
  429. if ((void *)gptimer_new_timer != NULL) {
  430. ESP_EARLY_LOGE(TIMER_TAG, "CONFLICT! driver_ng is not allowed to be used with the legacy driver");
  431. abort();
  432. }
  433. ESP_EARLY_LOGW(TIMER_TAG, "legacy driver is deprecated, please migrate to `driver/gptimer.h`");
  434. }