esp_system.c 3.0 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include "esp_system.h"
  7. #include "esp_private/system_internal.h"
  8. #include "esp_heap_caps.h"
  9. #include "freertos/FreeRTOS.h"
  10. #include "freertos/task.h"
  11. #include "soc/cpu.h"
  12. #include "soc/rtc.h"
  13. #include "soc/rtc_cntl_reg.h"
  14. #include "esp_private/panic_internal.h"
  15. #include "esp_rom_uart.h"
  16. #if CONFIG_IDF_TARGET_ESP32S2
  17. #include "esp32s2/memprot.h"
  18. #elif CONFIG_IDF_TARGET_ESP32S3
  19. #include "esp32s3/memprot.h"
  20. #elif CONFIG_IDF_TARGET_ESP32C3
  21. #include "esp32c3/memprot.h"
  22. #elif CONFIG_IDF_TARGET_ESP32H2
  23. #include "esp32h2/memprot.h"
  24. #elif CONFIG_IDF_TARGET_ESP8684
  25. #include "esp8684/memprot.h"
  26. #endif
  27. #define SHUTDOWN_HANDLERS_NO 5
  28. static shutdown_handler_t shutdown_handlers[SHUTDOWN_HANDLERS_NO];
  29. void IRAM_ATTR esp_restart_noos_dig(void)
  30. {
  31. // make sure all the panic handler output is sent from UART FIFO
  32. if (CONFIG_ESP_CONSOLE_UART_NUM >= 0) {
  33. esp_rom_uart_tx_wait_idle(CONFIG_ESP_CONSOLE_UART_NUM);
  34. }
  35. // switch to XTAL (otherwise we will keep running from the PLL)
  36. rtc_clk_cpu_freq_set_xtal();
  37. #if CONFIG_IDF_TARGET_ESP32
  38. esp_cpu_unstall(PRO_CPU_NUM);
  39. #endif
  40. // reset the digital part
  41. SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_SYS_RST);
  42. while (true) {
  43. ;
  44. }
  45. }
  46. esp_err_t esp_register_shutdown_handler(shutdown_handler_t handler)
  47. {
  48. for (int i = 0; i < SHUTDOWN_HANDLERS_NO; i++) {
  49. if (shutdown_handlers[i] == handler) {
  50. return ESP_ERR_INVALID_STATE;
  51. } else if (shutdown_handlers[i] == NULL) {
  52. shutdown_handlers[i] = handler;
  53. return ESP_OK;
  54. }
  55. }
  56. return ESP_ERR_NO_MEM;
  57. }
  58. esp_err_t esp_unregister_shutdown_handler(shutdown_handler_t handler)
  59. {
  60. for (int i = 0; i < SHUTDOWN_HANDLERS_NO; i++) {
  61. if (shutdown_handlers[i] == handler) {
  62. shutdown_handlers[i] = NULL;
  63. return ESP_OK;
  64. }
  65. }
  66. return ESP_ERR_INVALID_STATE;
  67. }
  68. void IRAM_ATTR esp_restart(void)
  69. {
  70. for (int i = SHUTDOWN_HANDLERS_NO - 1; i >= 0; i--) {
  71. if (shutdown_handlers[i]) {
  72. shutdown_handlers[i]();
  73. }
  74. }
  75. // Disable scheduler on this core.
  76. vTaskSuspendAll();
  77. bool digital_reset_needed = false;
  78. #if CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
  79. if (esp_memprot_is_intr_ena_any() || esp_memprot_is_locked_any()) {
  80. digital_reset_needed = true;
  81. }
  82. #endif
  83. if (digital_reset_needed) {
  84. esp_restart_noos_dig();
  85. }
  86. esp_restart_noos();
  87. }
  88. uint32_t esp_get_free_heap_size( void )
  89. {
  90. return heap_caps_get_free_size( MALLOC_CAP_DEFAULT );
  91. }
  92. uint32_t esp_get_free_internal_heap_size( void )
  93. {
  94. return heap_caps_get_free_size( MALLOC_CAP_8BIT | MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL );
  95. }
  96. uint32_t esp_get_minimum_free_heap_size( void )
  97. {
  98. return heap_caps_get_minimum_free_size( MALLOC_CAP_DEFAULT );
  99. }
  100. const char *esp_get_idf_version(void)
  101. {
  102. return IDF_VER;
  103. }
  104. void __attribute__((noreturn)) esp_system_abort(const char *details)
  105. {
  106. panic_abort(details);
  107. }