Kconfig 13 KB

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  1. menu "Driver configurations"
  2. menu "ADC configuration"
  3. config ADC_FORCE_XPD_FSM
  4. bool "Use the FSM to control ADC power"
  5. default n
  6. help
  7. ADC power can be controlled by the FSM instead of software. This allows the ADC to
  8. be shut off when it is not working leading to lower power consumption. However
  9. using the FSM control ADC power will increase the noise of ADC.
  10. config ADC_DISABLE_DAC
  11. bool "Disable DAC when ADC2 is used on GPIO 25 and 26"
  12. default y
  13. help
  14. If this is set, the ADC2 driver will disable the output of the DAC corresponding to the specified
  15. channel. This is the default value.
  16. For testing, disable this option so that we can measure the output of DAC by internal ADC.
  17. endmenu # ADC Configuration
  18. menu "MCPWM configuration"
  19. depends on SOC_MCPWM_SUPPORTED
  20. config MCPWM_ISR_IN_IRAM
  21. bool "Place MCPWM ISR function into IRAM"
  22. default n
  23. help
  24. If this option is not selected, the MCPWM interrupt will be deferred when the Cache
  25. is in a disabled state (e.g. Flash write/erase operation).
  26. Note that if this option is selected, all user registered ISR callbacks should never
  27. try to use cache as well. (with IRAM_ATTR)
  28. endmenu # MCPWM Configuration
  29. menu "SPI configuration"
  30. config SPI_MASTER_IN_IRAM
  31. bool "Place transmitting functions of SPI master into IRAM"
  32. default n
  33. select SPI_MASTER_ISR_IN_IRAM
  34. help
  35. Normally only the ISR of SPI master is placed in the IRAM, so that it
  36. can work without the flash when interrupt is triggered.
  37. For other functions, there's some possibility that the flash cache
  38. miss when running inside and out of SPI functions, which may increase
  39. the interval of SPI transactions.
  40. Enable this to put ``queue_trans``, ``get_trans_result`` and
  41. ``transmit`` functions into the IRAM to avoid possible cache miss.
  42. During unit test, this is enabled to measure the ideal case of api.
  43. config SPI_MASTER_ISR_IN_IRAM
  44. bool "Place SPI master ISR function into IRAM"
  45. default y
  46. help
  47. Place the SPI master ISR in to IRAM to avoid possible cache miss.
  48. Also you can forbid the ISR being disabled during flash writing
  49. access, by add ESP_INTR_FLAG_IRAM when initializing the driver.
  50. config SPI_SLAVE_IN_IRAM
  51. bool "Place transmitting functions of SPI slave into IRAM"
  52. default n
  53. select SPI_SLAVE_ISR_IN_IRAM
  54. help
  55. Normally only the ISR of SPI slave is placed in the IRAM, so that it
  56. can work without the flash when interrupt is triggered.
  57. For other functions, there's some possibility that the flash cache
  58. miss when running inside and out of SPI functions, which may increase
  59. the interval of SPI transactions.
  60. Enable this to put ``queue_trans``, ``get_trans_result`` and
  61. ``transmit`` functions into the IRAM to avoid possible cache miss.
  62. config SPI_SLAVE_ISR_IN_IRAM
  63. bool "Place SPI slave ISR function into IRAM"
  64. default y
  65. help
  66. Place the SPI slave ISR in to IRAM to avoid possible cache miss.
  67. Also you can forbid the ISR being disabled during flash writing
  68. access, by add ESP_INTR_FLAG_IRAM when initializing the driver.
  69. endmenu # SPI Configuration
  70. menu "TWAI configuration"
  71. depends on SOC_TWAI_SUPPORTED
  72. config TWAI_ISR_IN_IRAM
  73. bool "Place TWAI ISR function into IRAM"
  74. default n
  75. select PERIPH_CTRL_FUNC_IN_IRAM if TWAI_ERRATA_FIX_RX_FRAME_INVALID || TWAI_ERRATA_FIX_RX_FIFO_CORRUPT
  76. help
  77. Place the TWAI ISR in to IRAM. This will allow the ISR to avoid
  78. cache misses, and also be able to run whilst the cache is disabled
  79. (such as when writing to SPI Flash).
  80. Note that if this option is enabled:
  81. - Users should also set the ESP_INTR_FLAG_IRAM in the driver
  82. configuration structure when installing the driver (see docs for
  83. specifics).
  84. - Alert logging (i.e., setting of the TWAI_ALERT_AND_LOG flag)
  85. will have no effect.
  86. config TWAI_ERRATA_FIX_BUS_OFF_REC
  87. bool "Add SW workaround for REC change during bus-off"
  88. depends on IDF_TARGET_ESP32
  89. default y
  90. help
  91. When the bus-off condition is reached, the REC should be reset to 0 and frozen (via LOM) by the
  92. driver's ISR. However on the ESP32, there is an edge case where the REC will increase before the
  93. driver's ISR can respond in time (e.g., due to the rapid occurrence of bus errors), thus causing the
  94. REC to be non-zero after bus-off. A non-zero REC can prevent bus-off recovery as the bus-off recovery
  95. condition is that both TEC and REC become 0. Enabling this option will add a workaround in the driver
  96. to forcibly reset REC to zero on reaching bus-off.
  97. config TWAI_ERRATA_FIX_TX_INTR_LOST
  98. bool "Add SW workaround for TX interrupt lost errata"
  99. depends on IDF_TARGET_ESP32
  100. default y
  101. help
  102. On the ESP32, when a transmit interrupt occurs, and interrupt register is read on the same APB clock
  103. cycle, the transmit interrupt could be lost. Enabling this option will add a workaround that checks the
  104. transmit buffer status bit to recover any lost transmit interrupt.
  105. config TWAI_ERRATA_FIX_RX_FRAME_INVALID
  106. bool "Add SW workaround for invalid RX frame errata"
  107. depends on IDF_TARGET_ESP32
  108. default y
  109. help
  110. On the ESP32, when receiving a data or remote frame, if a bus error occurs in the data or CRC field,
  111. the data of the next received frame could be invalid. Enabling this option will add a workaround that
  112. will reset the peripheral on detection of this errata condition. Note that if a frame is transmitted on
  113. the bus whilst the reset is ongoing, the message will not be receive by the peripheral sent on the bus
  114. during the reset, the message will be lost.
  115. config TWAI_ERRATA_FIX_RX_FIFO_CORRUPT
  116. bool "Add SW workaround for RX FIFO corruption errata"
  117. depends on IDF_TARGET_ESP32
  118. default y
  119. help
  120. On the ESP32, when the RX FIFO overruns and the RX message counter maxes out at 64 messages, the entire
  121. RX FIFO is no longer recoverable. Enabling this option will add a workaround that resets the peripheral
  122. on detection of this errata condition. Note that if a frame is being sent on the bus during the reset
  123. bus during the reset, the message will be lost.
  124. endmenu # TWAI Configuration
  125. menu "Temperature sensor Configuration"
  126. depends on SOC_TEMP_SENSOR_SUPPORTED
  127. config TEMP_SENSOR_SUPPRESS_DEPRECATE_WARN
  128. bool "Suppress legacy driver deprecated warning"
  129. default n
  130. help
  131. Wether to suppress the deprecation warnings when using legacy temperature sensor driver
  132. (driver/temp_sensor.h). If you want to continue using the legacy driver,
  133. and don't want to see related deprecation warnings, you can enable this option.
  134. config TEMP_SENSOR_ENABLE_DEBUG_LOG
  135. bool "Enable debug log"
  136. default n
  137. help
  138. Wether to enable the debug log message for temperature sensor driver.
  139. Note that, this option only controls the temperature sensor driver log, won't affect other drivers.
  140. endmenu # TEMP_SENSOR Configuration
  141. menu "UART configuration"
  142. config UART_ISR_IN_IRAM
  143. bool "Place UART ISR function into IRAM"
  144. default n
  145. help
  146. If this option is not selected, UART interrupt will be disabled for a long time and
  147. may cause data lost when doing spi flash operation.
  148. endmenu # UART Configuration
  149. menu "GPIO Configuration"
  150. config GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
  151. bool "Support light sleep GPIO pullup/pulldown configuration for ESP32"
  152. depends on IDF_TARGET_ESP32
  153. help
  154. This option is intended to fix the bug that ESP32 is not able to switch to configured
  155. pullup/pulldown mode in sleep.
  156. If this option is selected, chip will automatically emulate the behaviour of switching,
  157. and about 450B of source codes would be placed into IRAM.
  158. config GPIO_CTRL_FUNC_IN_IRAM
  159. bool "Place GPIO control functions into IRAM"
  160. default n
  161. help
  162. Place GPIO control functions (like intr_disable/set_level) into IRAM,
  163. so that these functions can be IRAM-safe and able to be called in the other IRAM interrupt context.
  164. endmenu # GPIO Configuration
  165. menu "GDMA Configuration"
  166. depends on SOC_GDMA_SUPPORTED
  167. config GDMA_CTRL_FUNC_IN_IRAM
  168. bool "Place GDMA control functions into IRAM"
  169. default n
  170. help
  171. Place GDMA control functions (like start/stop/append/reset) into IRAM,
  172. so that these functions can be IRAM-safe and able to be called in the other IRAM interrupt context.
  173. Enabling this option can improve driver performance as well.
  174. config GDMA_ISR_IRAM_SAFE
  175. bool "GDMA ISR IRAM-Safe"
  176. default n
  177. help
  178. This will ensure the GDMA interrupt handler is IRAM-Safe, allow to avoid flash
  179. cache misses, and also be able to run whilst the cache is disabled.
  180. (e.g. SPI Flash write).
  181. endmenu # GDMA Configuration
  182. menu "GPTimer Configuration"
  183. config GPTIMER_CTRL_FUNC_IN_IRAM
  184. bool "Place GPTimer control functions into IRAM"
  185. default n
  186. help
  187. Place GPTimer control functions (like start/stop) into IRAM,
  188. so that these functions can be IRAM-safe and able to be called in the other IRAM interrupt context.
  189. Enabling this option can improve driver performance as well.
  190. config GPTIMER_ISR_IRAM_SAFE
  191. bool "GPTimer ISR IRAM-Safe"
  192. default n
  193. help
  194. Ensure the GPTimer interrupt is IRAM-Safe by allowing the interrupt handler to be
  195. executable when the cache is disabled (e.g. SPI Flash write).
  196. config GPTIMER_SUPPRESS_DEPRECATE_WARN
  197. bool "Suppress legacy driver deprecated warning"
  198. default n
  199. help
  200. Wether to suppress the deprecation warnings when using legacy timer group driver (driver/timer.h).
  201. If you want to continue using the legacy driver, and don't want to see related deprecation warnings,
  202. you can enable this option.
  203. config GPTIMER_ENABLE_DEBUG_LOG
  204. bool "Enable debug log"
  205. default n
  206. help
  207. Wether to enable the debug log message for GPTimer driver.
  208. Note that, this option only controls the GPTimer driver log, won't affect other drivers.
  209. endmenu # GPTimer Configuration
  210. menu "PCNT Configuration"
  211. depends on SOC_PCNT_SUPPORTED
  212. config PCNT_CTRL_FUNC_IN_IRAM
  213. bool "Place PCNT control functions into IRAM"
  214. default n
  215. help
  216. Place PCNT control functions (like start/stop) into IRAM,
  217. so that these functions can be IRAM-safe and able to be called in the other IRAM interrupt context.
  218. Enabling this option can improve driver performance as well.
  219. config PCNT_ISR_IRAM_SAFE
  220. bool "PCNT ISR IRAM-Safe"
  221. default n
  222. help
  223. Ensure the PCNT interrupt is IRAM-Safe by allowing the interrupt handler to be
  224. executable when the cache is disabled (e.g. SPI Flash write).
  225. config PCNT_SUPPRESS_DEPRECATE_WARN
  226. bool "Suppress legacy driver deprecated warning"
  227. default n
  228. help
  229. Wether to suppress the deprecation warnings when using legacy PCNT driver (driver/pcnt.h).
  230. If you want to continue using the legacy driver, and don't want to see related deprecation warnings,
  231. you can enable this option.
  232. config PCNT_ENABLE_DEBUG_LOG
  233. bool "Enable debug log"
  234. default n
  235. help
  236. Wether to enable the debug log message for PCNT driver.
  237. Note that, this option only controls the PCNT driver log, won't affect other drivers.
  238. endmenu # PCNT Configuration
  239. endmenu # Driver configurations