test_pm.c 13 KB

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  1. #include <stdio.h>
  2. #include <stdlib.h>
  3. #include <time.h>
  4. #include <sys/time.h>
  5. #include <sys/param.h>
  6. #include "unity.h"
  7. #include "esp_pm.h"
  8. #include "esp_sleep.h"
  9. #include "freertos/FreeRTOS.h"
  10. #include "freertos/task.h"
  11. #include "freertos/semphr.h"
  12. #include "esp_log.h"
  13. #include "driver/gptimer.h"
  14. #include "driver/rtc_io.h"
  15. #include "soc/rtc.h"
  16. #include "esp_private/gptimer.h"
  17. #include "soc/rtc_periph.h"
  18. #include "esp_rom_sys.h"
  19. #include "esp_private/esp_clk.h"
  20. #include "sdkconfig.h"
  21. #if CONFIG_ULP_COPROC_TYPE_FSM
  22. #if CONFIG_IDF_TARGET_ESP32
  23. #include "esp32/ulp.h"
  24. #elif CONFIG_IDF_TARGET_ESP32S2
  25. #include "esp32s2/ulp.h"
  26. #elif CONFIG_IDF_TARGET_ESP32S3
  27. #include "esp32s3/ulp.h"
  28. #endif
  29. #endif //CONFIG_ULP_COPROC_TYPE_FSM
  30. TEST_CASE("Can dump power management lock stats", "[pm]")
  31. {
  32. esp_pm_dump_locks(stdout);
  33. }
  34. #ifdef CONFIG_PM_ENABLE
  35. static void switch_freq(int mhz)
  36. {
  37. int xtal_freq_mhz = esp_clk_xtal_freq() / MHZ;
  38. #if CONFIG_IDF_TARGET_ESP32
  39. esp_pm_config_esp32_t pm_config = {
  40. #elif CONFIG_IDF_TARGET_ESP32S2
  41. esp_pm_config_esp32s2_t pm_config = {
  42. #elif CONFIG_IDF_TARGET_ESP32S3
  43. esp_pm_config_esp32s3_t pm_config = {
  44. #elif CONFIG_IDF_TARGET_ESP32C3
  45. esp_pm_config_esp32c3_t pm_config = {
  46. #elif CONFIG_IDF_TARGET_ESP32H2
  47. esp_pm_config_esp32h2_t pm_config = {
  48. #endif
  49. .max_freq_mhz = mhz,
  50. .min_freq_mhz = MIN(mhz, xtal_freq_mhz),
  51. };
  52. ESP_ERROR_CHECK( esp_pm_configure(&pm_config) );
  53. printf("Waiting for frequency to be set to %d MHz...\n", mhz);
  54. while (esp_clk_cpu_freq() / MHZ != mhz)
  55. {
  56. vTaskDelay(pdMS_TO_TICKS(200));
  57. printf("Frequency is %d MHz\n", esp_clk_cpu_freq() / MHZ);
  58. }
  59. }
  60. #if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
  61. static const int test_freqs[] = {40, 160, 80, 40, 80, 10, 80, 20, 40};
  62. #else
  63. static const int test_freqs[] = {240, 40, 160, 240, 80, 40, 240, 40, 80, 10, 80, 20, 40};
  64. #endif
  65. TEST_CASE("Can switch frequency using esp_pm_configure", "[pm]")
  66. {
  67. int orig_freq_mhz = esp_clk_cpu_freq() / MHZ;
  68. for (int i = 0; i < sizeof(test_freqs) / sizeof(int); i++) {
  69. switch_freq(test_freqs[i]);
  70. }
  71. switch_freq(orig_freq_mhz);
  72. }
  73. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
  74. static void light_sleep_enable(void)
  75. {
  76. int cur_freq_mhz = esp_clk_cpu_freq() / MHZ;
  77. int xtal_freq = esp_clk_xtal_freq() / MHZ;
  78. #if CONFIG_IDF_TARGET_ESP32
  79. esp_pm_config_esp32_t pm_config = {
  80. #elif CONFIG_IDF_TARGET_ESP32S2
  81. esp_pm_config_esp32s2_t pm_config = {
  82. #elif CONFIG_IDF_TARGET_ESP32S3
  83. esp_pm_config_esp32s3_t pm_config = {
  84. #elif CONFIG_IDF_TARGET_ESP32C3
  85. esp_pm_config_esp32c3_t pm_config = {
  86. #elif CONFIG_IDF_TARGET_ESP32H2
  87. esp_pm_config_esp32h2_t pm_config = {
  88. #endif
  89. .max_freq_mhz = cur_freq_mhz,
  90. .min_freq_mhz = xtal_freq,
  91. .light_sleep_enable = true
  92. };
  93. ESP_ERROR_CHECK( esp_pm_configure(&pm_config) );
  94. }
  95. static void light_sleep_disable(void)
  96. {
  97. int cur_freq_mhz = esp_clk_cpu_freq() / MHZ;
  98. #if CONFIG_IDF_TARGET_ESP32
  99. esp_pm_config_esp32_t pm_config = {
  100. #elif CONFIG_IDF_TARGET_ESP32S2
  101. esp_pm_config_esp32s2_t pm_config = {
  102. #elif CONFIG_IDF_TARGET_ESP32S3
  103. esp_pm_config_esp32s3_t pm_config = {
  104. #elif CONFIG_IDF_TARGET_ESP32C3
  105. esp_pm_config_esp32c3_t pm_config = {
  106. #elif CONFIG_IDF_TARGET_ESP32H2
  107. esp_pm_config_esp32h2_t pm_config = {
  108. #endif
  109. .max_freq_mhz = cur_freq_mhz,
  110. .min_freq_mhz = cur_freq_mhz,
  111. };
  112. ESP_ERROR_CHECK( esp_pm_configure(&pm_config) );
  113. }
  114. TEST_CASE("Automatic light occurs when tasks are suspended", "[pm]")
  115. {
  116. gptimer_handle_t gptimer = NULL;
  117. /* To figure out if light sleep takes place, use GPTimer
  118. * It will stop working while in light sleep.
  119. */
  120. gptimer_config_t config = {
  121. .clk_src = GPTIMER_CLK_SRC_DEFAULT,
  122. .direction = GPTIMER_COUNT_UP,
  123. .resolution_hz = 1000000, /* 1 us per tick */
  124. };
  125. TEST_ESP_OK(gptimer_new_timer(&config, &gptimer));
  126. TEST_ESP_OK(gptimer_start(gptimer));
  127. // if GPTimer is clocked from APB, when PM is enabled, the driver will acquire the PM lock
  128. // causing the auto light sleep doesn't take effect
  129. // so we manually release the lock here
  130. esp_pm_lock_handle_t gptimer_pm_lock;
  131. TEST_ESP_OK(gptimer_get_pm_lock(gptimer, &gptimer_pm_lock));
  132. TEST_ESP_OK(esp_pm_lock_release(gptimer_pm_lock));
  133. light_sleep_enable();
  134. for (int ticks_to_delay = CONFIG_FREERTOS_IDLE_TIME_BEFORE_SLEEP;
  135. ticks_to_delay < CONFIG_FREERTOS_IDLE_TIME_BEFORE_SLEEP * 10;
  136. ++ticks_to_delay) {
  137. /* Wait until next tick */
  138. vTaskDelay(1);
  139. /* The following delay should cause light sleep to start */
  140. uint64_t count_start;
  141. uint64_t count_end;
  142. TEST_ESP_OK(gptimer_get_raw_count(gptimer, &count_start));
  143. vTaskDelay(ticks_to_delay);
  144. TEST_ESP_OK(gptimer_get_raw_count(gptimer, &count_end));
  145. int timer_diff_us = (int) (count_end - count_start);
  146. const int us_per_tick = 1 * portTICK_PERIOD_MS * 1000;
  147. printf("%d %d\n", ticks_to_delay * us_per_tick, timer_diff_us);
  148. TEST_ASSERT(timer_diff_us < ticks_to_delay * us_per_tick);
  149. }
  150. light_sleep_disable();
  151. TEST_ESP_OK(esp_pm_lock_acquire(gptimer_pm_lock));
  152. TEST_ESP_OK(gptimer_stop(gptimer));
  153. TEST_ESP_OK(gptimer_del_timer(gptimer));
  154. }
  155. #if CONFIG_ULP_COPROC_TYPE_FSM
  156. #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
  157. #if !DISABLED_FOR_TARGETS(ESP32C3)
  158. // No ULP on C3
  159. // Fix failure on ESP32 when running alone; passes when the previous test is run before this one
  160. TEST_CASE("Can wake up from automatic light sleep by GPIO", "[pm][ignore]")
  161. {
  162. assert(CONFIG_ULP_COPROC_RESERVE_MEM >= 16 && "this test needs ULP_COPROC_RESERVE_MEM option set in menuconfig");
  163. /* Set up GPIO used to wake up RTC */
  164. const int ext1_wakeup_gpio = 25;
  165. const int ext_rtc_io = RTCIO_GPIO25_CHANNEL;
  166. TEST_ESP_OK(rtc_gpio_init(ext1_wakeup_gpio));
  167. rtc_gpio_set_direction(ext1_wakeup_gpio, RTC_GPIO_MODE_INPUT_OUTPUT);
  168. rtc_gpio_set_level(ext1_wakeup_gpio, 0);
  169. /* Enable wakeup */
  170. TEST_ESP_OK(esp_sleep_enable_ext1_wakeup(1ULL << ext1_wakeup_gpio, ESP_EXT1_WAKEUP_ANY_HIGH));
  171. /* To simplify test environment, we'll use a ULP program to set GPIO high */
  172. ulp_insn_t ulp_code[] = {
  173. I_DELAY(65535), /* about 8ms, given 8MHz ULP clock */
  174. I_WR_REG_BIT(RTC_CNTL_HOLD_FORCE_REG, RTC_CNTL_PDAC1_HOLD_FORCE_S, 0),
  175. I_WR_REG_BIT(RTC_GPIO_OUT_REG, ext_rtc_io + RTC_GPIO_OUT_DATA_S, 1),
  176. I_DELAY(1000),
  177. I_WR_REG_BIT(RTC_GPIO_OUT_REG, ext_rtc_io + RTC_GPIO_OUT_DATA_S, 0),
  178. I_WR_REG_BIT(RTC_CNTL_HOLD_FORCE_REG, RTC_CNTL_PDAC1_HOLD_FORCE_S, 1),
  179. I_END(),
  180. I_HALT()
  181. };
  182. TEST_ESP_OK(ulp_set_wakeup_period(0, 1000 /* us */));
  183. size_t size = sizeof(ulp_code) / sizeof(ulp_insn_t);
  184. TEST_ESP_OK(ulp_process_macros_and_load(0, ulp_code, &size));
  185. light_sleep_enable();
  186. int rtcio_num = rtc_io_number_get(ext1_wakeup_gpio);
  187. for (int i = 0; i < 10; ++i) {
  188. /* Set GPIO low */
  189. REG_CLR_BIT(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].hold_force);
  190. rtc_gpio_set_level(ext1_wakeup_gpio, 0);
  191. REG_SET_BIT(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].hold_force);
  192. /* Wait for the next tick */
  193. vTaskDelay(1);
  194. /* Start ULP program */
  195. ulp_run(0);
  196. const int delay_ms = 200;
  197. const int delay_ticks = delay_ms / portTICK_PERIOD_MS;
  198. int64_t start_rtc = esp_clk_rtc_time();
  199. int64_t start_hs = esp_timer_get_time();
  200. uint32_t start_tick = xTaskGetTickCount();
  201. /* Will enter sleep here */
  202. vTaskDelay(delay_ticks);
  203. int64_t end_rtc = esp_clk_rtc_time();
  204. int64_t end_hs = esp_timer_get_time();
  205. uint32_t end_tick = xTaskGetTickCount();
  206. printf("%lld %lld %u\n", end_rtc - start_rtc, end_hs - start_hs, end_tick - start_tick);
  207. TEST_ASSERT_INT32_WITHIN(3, delay_ticks, end_tick - start_tick);
  208. TEST_ASSERT_INT32_WITHIN(2 * portTICK_PERIOD_MS * 1000, delay_ms * 1000, end_hs - start_hs);
  209. TEST_ASSERT_INT32_WITHIN(2 * portTICK_PERIOD_MS * 1000, delay_ms * 1000, end_rtc - start_rtc);
  210. }
  211. REG_CLR_BIT(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].hold_force);
  212. rtc_gpio_deinit(ext1_wakeup_gpio);
  213. light_sleep_disable();
  214. }
  215. #endif //!DISABLED_FOR_TARGETS(ESP32C3)
  216. #endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
  217. #endif //CONFIG_ULP_COPROC_TYPE_FSM
  218. typedef struct {
  219. int delay_us;
  220. int result;
  221. SemaphoreHandle_t done;
  222. } delay_test_arg_t;
  223. static void test_delay_task(void *p)
  224. {
  225. delay_test_arg_t *arg = (delay_test_arg_t *) p;
  226. vTaskDelay(1);
  227. uint64_t start = esp_clk_rtc_time();
  228. vTaskDelay(arg->delay_us / portTICK_PERIOD_MS / 1000);
  229. uint64_t stop = esp_clk_rtc_time();
  230. arg->result = (int) (stop - start);
  231. xSemaphoreGive(arg->done);
  232. vTaskDelete(NULL);
  233. }
  234. TEST_CASE("vTaskDelay duration is correct with light sleep enabled", "[pm]")
  235. {
  236. light_sleep_enable();
  237. SemaphoreHandle_t done_sem = xSemaphoreCreateBinary();
  238. TEST_ASSERT_NOT_NULL(done_sem);
  239. delay_test_arg_t args = {
  240. .done = done_sem,
  241. };
  242. const int delays[] = { 10, 20, 50, 100, 150, 200, 250 };
  243. const int delays_count = sizeof(delays) / sizeof(delays[0]);
  244. for (int i = 0; i < delays_count; ++i) {
  245. int delay_ms = delays[i];
  246. args.delay_us = delay_ms * 1000;
  247. xTaskCreatePinnedToCore(test_delay_task, "", 2048, (void *) &args, 3, NULL, 0);
  248. TEST_ASSERT( xSemaphoreTake(done_sem, delay_ms * 10 / portTICK_PERIOD_MS) );
  249. printf("CPU0: %d %d\n", args.delay_us, args.result);
  250. TEST_ASSERT_INT32_WITHIN(1000 * portTICK_PERIOD_MS * 2, args.delay_us, args.result);
  251. #if portNUM_PROCESSORS == 2
  252. xTaskCreatePinnedToCore(test_delay_task, "", 2048, (void *) &args, 3, NULL, 1);
  253. TEST_ASSERT( xSemaphoreTake(done_sem, delay_ms * 10 / portTICK_PERIOD_MS) );
  254. printf("CPU1: %d %d\n", args.delay_us, args.result);
  255. TEST_ASSERT_INT32_WITHIN(1000 * portTICK_PERIOD_MS * 2, args.delay_us, args.result);
  256. #endif
  257. }
  258. vSemaphoreDelete(done_sem);
  259. light_sleep_disable();
  260. }
  261. /* This test is similar to the one in test_esp_timer.c, but since we can't use
  262. * ref_clock, this test uses RTC clock for timing. Also enables automatic
  263. * light sleep.
  264. */
  265. TEST_CASE("esp_timer produces correct delays with light sleep", "[pm]")
  266. {
  267. // no, we can't make this a const size_t (§6.7.5.2)
  268. #define NUM_INTERVALS 16
  269. typedef struct {
  270. esp_timer_handle_t timer;
  271. size_t cur_interval;
  272. int intervals[NUM_INTERVALS];
  273. int64_t t_start;
  274. SemaphoreHandle_t done;
  275. } test_args_t;
  276. void timer_func(void *arg) {
  277. test_args_t *p_args = (test_args_t *) arg;
  278. int64_t t_end = esp_clk_rtc_time();
  279. int32_t ms_diff = (t_end - p_args->t_start) / 1000;
  280. printf("timer #%d %dms\n", p_args->cur_interval, ms_diff);
  281. p_args->intervals[p_args->cur_interval++] = ms_diff;
  282. // Deliberately make timer handler run longer.
  283. // We check that this doesn't affect the result.
  284. esp_rom_delay_us(10 * 1000);
  285. if (p_args->cur_interval == NUM_INTERVALS) {
  286. printf("done\n");
  287. TEST_ESP_OK(esp_timer_stop(p_args->timer));
  288. xSemaphoreGive(p_args->done);
  289. }
  290. }
  291. light_sleep_enable();
  292. const int delay_ms = 100;
  293. test_args_t args = {0};
  294. esp_timer_handle_t timer1;
  295. esp_timer_create_args_t create_args = {
  296. .callback = timer_func,
  297. .arg = &args,
  298. .name = "timer1",
  299. };
  300. TEST_ESP_OK(esp_timer_create(&create_args, &timer1));
  301. args.timer = timer1;
  302. args.t_start = esp_clk_rtc_time();
  303. args.done = xSemaphoreCreateBinary();
  304. TEST_ESP_OK(esp_timer_start_periodic(timer1, delay_ms * 1000));
  305. TEST_ASSERT(xSemaphoreTake(args.done, delay_ms * NUM_INTERVALS * 2));
  306. TEST_ASSERT_EQUAL_UINT32(NUM_INTERVALS, args.cur_interval);
  307. for (size_t i = 0; i < NUM_INTERVALS; ++i) {
  308. TEST_ASSERT_INT32_WITHIN(portTICK_PERIOD_MS, (i + 1) * delay_ms, args.intervals[i]);
  309. }
  310. TEST_ESP_OK( esp_timer_dump(stdout) );
  311. TEST_ESP_OK( esp_timer_delete(timer1) );
  312. vSemaphoreDelete(args.done);
  313. light_sleep_disable();
  314. #undef NUM_INTERVALS
  315. }
  316. static void timer_cb1(void *arg)
  317. {
  318. ++*((int *) arg);
  319. }
  320. TEST_CASE("esp_timer with SKIP_UNHANDLED_EVENTS does not wake up CPU from sleep", "[pm]")
  321. {
  322. int count_calls = 0;
  323. int timer_interval_ms = 50;
  324. const esp_timer_create_args_t timer_args = {
  325. .name = "timer_cb1",
  326. .arg = &count_calls,
  327. .callback = &timer_cb1,
  328. .skip_unhandled_events = true,
  329. };
  330. esp_timer_handle_t periodic_timer;
  331. esp_timer_create(&timer_args, &periodic_timer);
  332. TEST_ESP_OK(esp_timer_start_periodic(periodic_timer, timer_interval_ms * 1000));
  333. light_sleep_enable();
  334. const unsigned count_delays = 5;
  335. unsigned i = count_delays;
  336. while (i-- > 0) {
  337. vTaskDelay(pdMS_TO_TICKS(500));
  338. }
  339. TEST_ASSERT_INT_WITHIN(1, count_delays, count_calls);
  340. light_sleep_disable();
  341. TEST_ESP_OK(esp_timer_stop(periodic_timer));
  342. TEST_ESP_OK(esp_timer_dump(stdout));
  343. TEST_ESP_OK(esp_timer_delete(periodic_timer));
  344. }
  345. #endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
  346. #endif // CONFIG_PM_ENABLE