laokaiyao a5f651ad71 i2s: Update FIFO direct access reg on ESP32 according to the TRM 3 lat temu
..
esp32 a5f651ad71 i2s: Update FIFO direct access reg on ESP32 according to the TRM 3 lat temu
esp32c2 234628b3ea pm: putting dbias and pd_cur code into same function 3 lat temu
esp32c3 0adb814af3 Merge branch 'bugfix/fix_memory_miss_bug_esp32c3_esp32s3' into 'master' 3 lat temu
esp32h2 adcdcbaa0e Merge branch 'feat/pm_dbias_refactoring' into 'master' 3 lat temu
esp32s2 234628b3ea pm: putting dbias and pd_cur code into same function 3 lat temu
esp32s3 0adb814af3 Merge branch 'bugfix/fix_memory_miss_bug_esp32c3_esp32s3' into 'master' 3 lat temu
include c4bcf1117c esp_hw_support: move soc_memory_types.h helper functions into esp_hw_support 3 lat temu
linux c6d60615c6 build-system: include soc_caps defines into kconfig 4 lat temu
CMakeLists.txt 24acdf23ee soc: move peripheral base address into reg_base.h 4 lat temu
README.md 79887fdc6c soc: descriptive part occupy whole component 5 lat temu
linker.lf 6b0a5af73e soc: move implementations to esp_hw_support 5 lat temu
lldesc.c 9b4ba3d707 crypto: initial S3 Beta 3 bringup and testing for SHA/AES/RSA/flash enc 4 lat temu

README.md

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware