system_api.c 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367
  1. // Copyright 2013-2016 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. //
  7. // http://www.apache.org/licenses/LICENSE-2.0
  8. //
  9. // Unless required by applicable law or agreed to in writing, software
  10. // distributed under the License is distributed on an "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. // See the License for the specific language governing permissions and
  13. // limitations under the License.
  14. #include <string.h>
  15. #include "esp_system.h"
  16. #include "esp_attr.h"
  17. #include "esp_wifi.h"
  18. #include "esp_wifi_internal.h"
  19. #include "esp_log.h"
  20. #include "sdkconfig.h"
  21. #include "rom/efuse.h"
  22. #include "rom/cache.h"
  23. #include "rom/uart.h"
  24. #include "soc/dport_reg.h"
  25. #include "soc/efuse_reg.h"
  26. #include "soc/rtc_cntl_reg.h"
  27. #include "soc/timer_group_reg.h"
  28. #include "soc/timer_group_struct.h"
  29. #include "soc/cpu.h"
  30. #include "soc/rtc.h"
  31. #include "freertos/FreeRTOS.h"
  32. #include "freertos/task.h"
  33. #include "freertos/xtensa_api.h"
  34. static const char* TAG = "system_api";
  35. static uint8_t base_mac_addr[6] = { 0 };
  36. void system_init()
  37. {
  38. }
  39. esp_err_t esp_base_mac_addr_set(uint8_t *mac)
  40. {
  41. if (mac == NULL) {
  42. ESP_LOGE(TAG, "Base MAC address is NULL");
  43. abort();
  44. }
  45. memcpy(base_mac_addr, mac, 6);
  46. return ESP_OK;
  47. }
  48. esp_err_t esp_base_mac_addr_get(uint8_t *mac)
  49. {
  50. uint8_t null_mac[6] = {0};
  51. if (memcmp(base_mac_addr, null_mac, 6) == 0) {
  52. ESP_LOGI(TAG, "Base MAC address is not set, read default base MAC address from BLK0 of EFUSE");
  53. return ESP_ERR_INVALID_MAC;
  54. }
  55. memcpy(mac, base_mac_addr, 6);
  56. return ESP_OK;
  57. }
  58. esp_err_t esp_efuse_mac_get_custom(uint8_t *mac)
  59. {
  60. uint32_t mac_low;
  61. uint32_t mac_high;
  62. uint8_t efuse_crc;
  63. uint8_t calc_crc;
  64. uint8_t version = REG_READ(EFUSE_BLK3_RDATA5_REG) >> 24;
  65. if (version != 1) {
  66. ESP_LOGE(TAG, "Base MAC address from BLK3 of EFUSE version error, version = %d", version);
  67. return ESP_ERR_INVALID_VERSION;
  68. }
  69. mac_low = REG_READ(EFUSE_BLK3_RDATA1_REG);
  70. mac_high = REG_READ(EFUSE_BLK3_RDATA0_REG);
  71. mac[0] = mac_high >> 8;
  72. mac[1] = mac_high >> 16;
  73. mac[2] = mac_high >> 24;
  74. mac[3] = mac_low;
  75. mac[4] = mac_low >> 8;
  76. mac[5] = mac_low >> 16;
  77. efuse_crc = mac_high;
  78. calc_crc = esp_crc8(mac, 6);
  79. if (efuse_crc != calc_crc) {
  80. ESP_LOGE(TAG, "Base MAC address from BLK3 of EFUSE CRC error, efuse_crc = 0x%02x; calc_crc = 0x%02x", efuse_crc, calc_crc);
  81. return ESP_ERR_INVALID_CRC;
  82. }
  83. return ESP_OK;
  84. }
  85. esp_err_t esp_efuse_mac_get_default(uint8_t* mac)
  86. {
  87. uint32_t mac_low;
  88. uint32_t mac_high;
  89. uint8_t efuse_crc;
  90. uint8_t calc_crc;
  91. mac_low = REG_READ(EFUSE_BLK0_RDATA1_REG);
  92. mac_high = REG_READ(EFUSE_BLK0_RDATA2_REG);
  93. mac[0] = mac_high >> 8;
  94. mac[1] = mac_high;
  95. mac[2] = mac_low >> 24;
  96. mac[3] = mac_low >> 16;
  97. mac[4] = mac_low >> 8;
  98. mac[5] = mac_low;
  99. efuse_crc = mac_high >> 16;
  100. calc_crc = esp_crc8(mac, 6);
  101. if (efuse_crc != calc_crc) {
  102. // Small range of MAC addresses are accepted even if CRC is invalid.
  103. // These addresses are reserved for Espressif internal use.
  104. if ((mac_high & 0xFFFF) == 0x18fe) {
  105. if ((mac_low >= 0x346a85c7) && (mac_low <= 0x346a85f8)) {
  106. return ESP_OK;
  107. }
  108. } else {
  109. ESP_LOGE(TAG, "Base MAC address from BLK0 of EFUSE CRC error, efuse_crc = 0x%02x; calc_crc = 0x%02x", efuse_crc, calc_crc);
  110. abort();
  111. }
  112. }
  113. return ESP_OK;
  114. }
  115. esp_err_t system_efuse_read_mac(uint8_t *mac) __attribute__((alias("esp_efuse_mac_get_default")));
  116. esp_err_t esp_efuse_read_mac(uint8_t *mac) __attribute__((alias("esp_efuse_mac_get_default")));
  117. esp_err_t esp_derive_mac(uint8_t* local_mac, const uint8_t* universal_mac)
  118. {
  119. uint8_t idx;
  120. if (local_mac == NULL || universal_mac == NULL) {
  121. ESP_LOGE(TAG, "mac address param is NULL");
  122. return ESP_ERR_INVALID_ARG;
  123. }
  124. memcpy(local_mac, universal_mac, 6);
  125. for (idx = 0; idx < 64; idx++) {
  126. local_mac[0] = universal_mac[0] | 0x02;
  127. local_mac[0] ^= idx << 2;
  128. if (memcmp(local_mac, universal_mac, 6)) {
  129. break;
  130. }
  131. }
  132. return ESP_OK;
  133. }
  134. esp_err_t esp_read_mac(uint8_t* mac, esp_mac_type_t type)
  135. {
  136. uint8_t efuse_mac[6];
  137. if (mac == NULL) {
  138. ESP_LOGE(TAG, "mac address param is NULL");
  139. return ESP_ERR_INVALID_ARG;
  140. }
  141. if (type < ESP_MAC_WIFI_STA || type > ESP_MAC_ETH) {
  142. ESP_LOGE(TAG, "mac type is incorrect");
  143. return ESP_ERR_INVALID_ARG;
  144. }
  145. _Static_assert(UNIVERSAL_MAC_ADDR_NUM == FOUR_UNIVERSAL_MAC_ADDR \
  146. || UNIVERSAL_MAC_ADDR_NUM == TWO_UNIVERSAL_MAC_ADDR, \
  147. "incorrect NUM_MAC_ADDRESS_FROM_EFUSE value");
  148. if (esp_base_mac_addr_get(efuse_mac) != ESP_OK) {
  149. esp_efuse_mac_get_default(efuse_mac);
  150. }
  151. switch (type) {
  152. case ESP_MAC_WIFI_STA:
  153. memcpy(mac, efuse_mac, 6);
  154. break;
  155. case ESP_MAC_WIFI_SOFTAP:
  156. if (UNIVERSAL_MAC_ADDR_NUM == FOUR_UNIVERSAL_MAC_ADDR) {
  157. memcpy(mac, efuse_mac, 6);
  158. mac[5] += 1;
  159. }
  160. else if (UNIVERSAL_MAC_ADDR_NUM == TWO_UNIVERSAL_MAC_ADDR) {
  161. esp_derive_mac(mac, efuse_mac);
  162. }
  163. break;
  164. case ESP_MAC_BT:
  165. memcpy(mac, efuse_mac, 6);
  166. if (UNIVERSAL_MAC_ADDR_NUM == FOUR_UNIVERSAL_MAC_ADDR) {
  167. mac[5] += 2;
  168. }
  169. else if (UNIVERSAL_MAC_ADDR_NUM == TWO_UNIVERSAL_MAC_ADDR) {
  170. mac[5] += 1;
  171. }
  172. break;
  173. case ESP_MAC_ETH:
  174. if (UNIVERSAL_MAC_ADDR_NUM == FOUR_UNIVERSAL_MAC_ADDR) {
  175. memcpy(mac, efuse_mac, 6);
  176. mac[5] += 3;
  177. }
  178. else if (UNIVERSAL_MAC_ADDR_NUM == TWO_UNIVERSAL_MAC_ADDR) {
  179. efuse_mac[5] += 1;
  180. esp_derive_mac(mac, efuse_mac);
  181. }
  182. break;
  183. default:
  184. ESP_LOGW(TAG, "incorrect mac type");
  185. break;
  186. }
  187. return ESP_OK;
  188. }
  189. void esp_restart_noos() __attribute__ ((noreturn));
  190. void IRAM_ATTR esp_restart(void)
  191. {
  192. #ifdef CONFIG_WIFI_ENABLED
  193. esp_wifi_stop();
  194. #endif
  195. // Disable scheduler on this core.
  196. vTaskSuspendAll();
  197. esp_restart_noos();
  198. }
  199. /* "inner" restart function for after RTOS, interrupts & anything else on this
  200. * core are already stopped. Stalls other core, resets hardware,
  201. * triggers restart.
  202. */
  203. void IRAM_ATTR esp_restart_noos()
  204. {
  205. const uint32_t core_id = xPortGetCoreID();
  206. const uint32_t other_core_id = core_id == 0 ? 1 : 0;
  207. esp_cpu_stall(other_core_id);
  208. // We need to disable TG0/TG1 watchdogs
  209. // First enable RTC watchdog to be on the safe side
  210. REG_WRITE(RTC_CNTL_WDTWPROTECT_REG, RTC_CNTL_WDT_WKEY_VALUE);
  211. REG_WRITE(RTC_CNTL_WDTCONFIG0_REG,
  212. RTC_CNTL_WDT_FLASHBOOT_MOD_EN_M |
  213. (1 << RTC_CNTL_WDT_SYS_RESET_LENGTH_S) |
  214. (1 << RTC_CNTL_WDT_CPU_RESET_LENGTH_S) );
  215. REG_WRITE(RTC_CNTL_WDTCONFIG1_REG, 128000);
  216. // Disable TG0/TG1 watchdogs
  217. TIMERG0.wdt_wprotect=TIMG_WDT_WKEY_VALUE;
  218. TIMERG0.wdt_config0.en = 0;
  219. TIMERG0.wdt_wprotect=0;
  220. TIMERG1.wdt_wprotect=TIMG_WDT_WKEY_VALUE;
  221. TIMERG1.wdt_config0.en = 0;
  222. TIMERG1.wdt_wprotect=0;
  223. // Disable all interrupts
  224. xt_ints_off(0xFFFFFFFF);
  225. // Disable cache
  226. Cache_Read_Disable(0);
  227. Cache_Read_Disable(1);
  228. // Flush any data left in UART FIFOs
  229. uart_tx_wait_idle(0);
  230. uart_tx_wait_idle(1);
  231. uart_tx_wait_idle(2);
  232. // Reset wifi/bluetooth/ethernet/sdio (bb/mac)
  233. DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG,
  234. DPORT_BB_RST | DPORT_FE_RST | DPORT_MAC_RST |
  235. DPORT_BT_RST | DPORT_BTMAC_RST | DPORT_SDIO_RST |
  236. DPORT_SDIO_HOST_RST | DPORT_EMAC_RST | DPORT_MACPWR_RST |
  237. DPORT_RW_BTMAC_RST | DPORT_RW_BTLP_RST);
  238. DPORT_REG_WRITE(DPORT_CORE_RST_EN_REG, 0);
  239. // Reset timer/spi/uart
  240. DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG,
  241. DPORT_TIMERS_RST | DPORT_SPI_RST_1 | DPORT_UART_RST);
  242. DPORT_REG_WRITE(DPORT_PERIP_RST_EN_REG, 0);
  243. // Set CPU back to XTAL source, no PLL, same as hard reset
  244. rtc_clk_cpu_freq_set(RTC_CPU_FREQ_XTAL);
  245. // Reset CPUs
  246. if (core_id == 0) {
  247. // Running on PRO CPU: APP CPU is stalled. Can reset both CPUs.
  248. SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG,
  249. RTC_CNTL_SW_PROCPU_RST_M | RTC_CNTL_SW_APPCPU_RST_M);
  250. } else {
  251. // Running on APP CPU: need to reset PRO CPU and unstall it,
  252. // then stall APP CPU
  253. SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_PROCPU_RST_M);
  254. esp_cpu_unstall(0);
  255. esp_cpu_stall(1);
  256. }
  257. while(true) {
  258. ;
  259. }
  260. }
  261. void system_restart(void) __attribute__((alias("esp_restart")));
  262. void system_restore(void)
  263. {
  264. esp_wifi_restore();
  265. }
  266. uint32_t esp_get_free_heap_size(void)
  267. {
  268. return xPortGetFreeHeapSize();
  269. }
  270. uint32_t system_get_free_heap_size(void) __attribute__((alias("esp_get_free_heap_size")));
  271. const char* system_get_sdk_version(void)
  272. {
  273. return "master";
  274. }
  275. const char* esp_get_idf_version(void)
  276. {
  277. return IDF_VER;
  278. }
  279. static void get_chip_info_esp32(esp_chip_info_t* out_info)
  280. {
  281. uint32_t reg = REG_READ(EFUSE_BLK0_RDATA3_REG);
  282. memset(out_info, 0, sizeof(*out_info));
  283. if ((reg & EFUSE_RD_CHIP_VER_REV1_M) != 0) {
  284. out_info->revision = 1;
  285. }
  286. if ((reg & EFUSE_RD_CHIP_VER_DIS_APP_CPU_M) == 0) {
  287. out_info->cores = 2;
  288. } else {
  289. out_info->cores = 1;
  290. }
  291. out_info->features = CHIP_FEATURE_WIFI_BGN;
  292. if ((reg & EFUSE_RD_CHIP_VER_DIS_BT_M) == 0) {
  293. out_info->features |= CHIP_FEATURE_BT | CHIP_FEATURE_BLE;
  294. }
  295. if (((reg & EFUSE_RD_CHIP_VER_PKG_M) >> EFUSE_RD_CHIP_VER_PKG_S) ==
  296. EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5) {
  297. out_info->features |= CHIP_FEATURE_EMB_FLASH;
  298. }
  299. }
  300. void esp_chip_info(esp_chip_info_t* out_info)
  301. {
  302. // Only ESP32 is supported now, in the future call one of the
  303. // chip-specific functions based on sdkconfig choice
  304. return get_chip_info_esp32(out_info);
  305. }