bt.c 46 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452
  1. // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. // http://www.apache.org/licenses/LICENSE-2.0
  7. //
  8. // Unless required by applicable law or agreed to in writing, software
  9. // distributed under the License is distributed on an "AS IS" BASIS,
  10. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  11. // See the License for the specific language governing permissions and
  12. // limitations under the License.
  13. #include <stddef.h>
  14. #include <stdlib.h>
  15. #include <stdio.h>
  16. #include <string.h>
  17. #include "sdkconfig.h"
  18. #include "esp_heap_caps.h"
  19. #include "esp_heap_caps_init.h"
  20. #include "freertos/FreeRTOS.h"
  21. #include "freertos/task.h"
  22. #include "freertos/queue.h"
  23. #include "freertos/semphr.h"
  24. #include "freertos/portmacro.h"
  25. #include "esp_types.h"
  26. #include "esp_system.h"
  27. #include "esp_task.h"
  28. #include "riscv/interrupt.h"
  29. #include "esp_attr.h"
  30. #include "esp_phy_init.h"
  31. #include "esp_bt.h"
  32. #include "esp_err.h"
  33. #include "esp_log.h"
  34. #include "esp_pm.h"
  35. #include "esp_ipc.h"
  36. #include "driver/periph_ctrl.h"
  37. #include "soc/rtc.h"
  38. #include "soc/rtc_cntl_reg.h"
  39. #include "soc/soc_memory_layout.h"
  40. #include "esp_clk.h"
  41. #include "esp_coexist_internal.h"
  42. #include "esp32c3/rom/rom_layout.h"
  43. #include "esp_timer.h"
  44. #include "esp_sleep.h"
  45. #if CONFIG_BT_ENABLED
  46. /* Macro definition
  47. ************************************************************************
  48. */
  49. #define BTDM_LOG_TAG "BTDM_INIT"
  50. #define BTDM_INIT_PERIOD (5000) /* ms */
  51. /* Low Power Clock Selection */
  52. #define BTDM_LPCLK_SEL_XTAL (0)
  53. #define BTDM_LPCLK_SEL_XTAL32K (1)
  54. #define BTDM_LPCLK_SEL_RTC_SLOW (2)
  55. #define BTDM_LPCLK_SEL_8M (3)
  56. // wakeup request sources
  57. enum {
  58. BTDM_ASYNC_WAKEUP_SRC_VHCI = 0,
  59. BTDM_ASYNC_WAKEUP_SRC_DISA,
  60. BTDM_ASYNC_WAKEUP_SRC_TMR,
  61. BTDM_ASYNC_WAKEUP_SRC_MAX,
  62. };
  63. // low power control struct
  64. typedef union {
  65. struct {
  66. uint32_t enable : 1; // whether low power mode is required
  67. uint32_t lpclk_sel : 2; // low power clock source
  68. uint32_t mac_bb_pd : 1; // whether hardware(MAC, BB) force-power-down is required during sleep
  69. uint32_t wakeup_timer_required : 1; // whether system timer is needed
  70. uint32_t no_light_sleep : 1; // do not allow system to enter light sleep after bluetooth is enabled
  71. uint32_t reserved : 26; // reserved
  72. };
  73. uint32_t val;
  74. } btdm_lpcntl_t;
  75. // low power control status
  76. typedef union {
  77. struct {
  78. uint32_t pm_lock_released : 1; // whether power management lock is released
  79. uint32_t mac_bb_pd : 1; // whether hardware(MAC, BB) is powered down
  80. uint32_t phy_enabled : 1; // whether phy is switched on
  81. uint32_t wakeup_timer_started : 1; // whether wakeup timer is started
  82. uint32_t reserved : 28; // reserved
  83. };
  84. uint32_t val;
  85. } btdm_lpstat_t;
  86. /* Sleep and wakeup interval control */
  87. #define BTDM_MIN_SLEEP_DURATION (24) // threshold of interval in half slots to allow to fall into modem sleep
  88. #define BTDM_MODEM_WAKE_UP_DELAY (8) // delay in half slots of modem wake up procedure, including re-enable PHY/RF
  89. #define BT_DEBUG(...)
  90. #define BT_API_CALL_CHECK(info, api_call, ret) \
  91. do{\
  92. esp_err_t __err = (api_call);\
  93. if ((ret) != __err) {\
  94. BT_DEBUG("%s %d %s ret=0x%X\n", __FUNCTION__, __LINE__, (info), __err);\
  95. return __err;\
  96. }\
  97. } while(0)
  98. #define OSI_FUNCS_TIME_BLOCKING 0xffffffff
  99. #define OSI_VERSION 0x00010006
  100. #define OSI_MAGIC_VALUE 0xFADEBEAD
  101. /* Types definition
  102. ************************************************************************
  103. */
  104. /* vendor dependent signals to be posted to controller task */
  105. typedef enum {
  106. BTDM_VND_OL_SIG_WAKEUP_TMR = 0,
  107. BTDM_VND_OL_SIG_NUM,
  108. } btdm_vnd_ol_sig_t;
  109. /* prototype of function to handle vendor dependent signals */
  110. typedef void (* btdm_vnd_ol_task_func_t)(void *param);
  111. /* VHCI function interface */
  112. typedef struct vhci_host_callback {
  113. void (*notify_host_send_available)(void); /*!< callback used to notify that the host can send packet to controller */
  114. int (*notify_host_recv)(uint8_t *data, uint16_t len); /*!< callback used to notify that the controller has a packet to send to the host*/
  115. } vhci_host_callback_t;
  116. /* Dram region */
  117. typedef struct {
  118. esp_bt_mode_t mode;
  119. intptr_t start;
  120. intptr_t end;
  121. } btdm_dram_available_region_t;
  122. typedef void (* osi_intr_handler)(void);
  123. /* OSI function */
  124. struct osi_funcs_t {
  125. uint32_t _magic;
  126. uint32_t _version;
  127. void (*_interrupt_set)(int cpu_no, int intr_source, int interrupt_no, int interrpt_prio);
  128. void (*_interrupt_clear)(int interrupt_source, int interrupt_no);
  129. void (*_interrupt_handler_set)(int interrupt_no, intr_handler_t fn, void *arg);
  130. void (*_interrupt_disable)(void);
  131. void (*_interrupt_restore)(void);
  132. void (*_task_yield)(void);
  133. void (*_task_yield_from_isr)(void);
  134. void *(*_semphr_create)(uint32_t max, uint32_t init);
  135. void (*_semphr_delete)(void *semphr);
  136. int (*_semphr_take_from_isr)(void *semphr, void *hptw);
  137. int (*_semphr_give_from_isr)(void *semphr, void *hptw);
  138. int (*_semphr_take)(void *semphr, uint32_t block_time_ms);
  139. int (*_semphr_give)(void *semphr);
  140. void *(*_mutex_create)(void);
  141. void (*_mutex_delete)(void *mutex);
  142. int (*_mutex_lock)(void *mutex);
  143. int (*_mutex_unlock)(void *mutex);
  144. void *(* _queue_create)(uint32_t queue_len, uint32_t item_size);
  145. void (* _queue_delete)(void *queue);
  146. int (* _queue_send)(void *queue, void *item, uint32_t block_time_ms);
  147. int (* _queue_send_from_isr)(void *queue, void *item, void *hptw);
  148. int (* _queue_recv)(void *queue, void *item, uint32_t block_time_ms);
  149. int (* _queue_recv_from_isr)(void *queue, void *item, void *hptw);
  150. int (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  151. void (* _task_delete)(void *task_handle);
  152. bool (* _is_in_isr)(void);
  153. int (* _cause_sw_intr_to_core)(int core_id, int intr_no);
  154. void *(* _malloc)(size_t size);
  155. void *(* _malloc_internal)(size_t size);
  156. void (* _free)(void *p);
  157. int (* _read_efuse_mac)(uint8_t mac[6]);
  158. void (* _srand)(unsigned int seed);
  159. int (* _rand)(void);
  160. uint32_t (* _btdm_lpcycles_2_hus)(uint32_t cycles, uint32_t *error_corr);
  161. uint32_t (* _btdm_hus_2_lpcycles)(uint32_t hus);
  162. bool (* _btdm_sleep_check_duration)(int32_t *slot_cnt);
  163. void (* _btdm_sleep_enter_phase1)(uint32_t lpcycles); /* called when interrupt is disabled */
  164. void (* _btdm_sleep_enter_phase2)(void);
  165. void (* _btdm_sleep_exit_phase1)(void); /* called from ISR */
  166. void (* _btdm_sleep_exit_phase2)(void); /* called from ISR */
  167. void (* _btdm_sleep_exit_phase3)(void); /* called from task */
  168. void (* _coex_wifi_sleep_set)(bool sleep);
  169. int (* _coex_core_ble_conn_dyn_prio_get)(bool *low, bool *high);
  170. void (* _coex_schm_status_bit_set)(uint32_t type, uint32_t status);
  171. void (* _coex_schm_status_bit_clear)(uint32_t type, uint32_t status);
  172. void (* _interrupt_on)(int intr_num);
  173. void (* _interrupt_off)(int intr_num);
  174. void (* _esp_hw_power_down)(void);
  175. void (* _esp_hw_power_up)(void);
  176. void (* _ets_backup_dma_copy)(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_rem);
  177. };
  178. /* External functions or values
  179. ************************************************************************
  180. */
  181. /* not for user call, so don't put to include file */
  182. /* OSI */
  183. extern int btdm_osi_funcs_register(void *osi_funcs);
  184. /* Initialise and De-initialise */
  185. extern int btdm_controller_init(esp_bt_controller_config_t *config_opts);
  186. extern void btdm_controller_deinit(void);
  187. extern int btdm_controller_enable(esp_bt_mode_t mode);
  188. extern void btdm_controller_disable(void);
  189. extern uint8_t btdm_controller_get_mode(void);
  190. extern const char *btdm_controller_get_compile_version(void);
  191. extern void btdm_rf_bb_init_phase2(void); // shall be called after PHY/RF is enabled
  192. /* Sleep */
  193. extern void btdm_controller_enable_sleep(bool enable);
  194. extern uint8_t btdm_controller_get_sleep_mode(void);
  195. extern bool btdm_power_state_active(void);
  196. extern void btdm_wakeup_request(void);
  197. extern void btdm_in_wakeup_requesting_set(bool in_wakeup_requesting);
  198. /* vendor dependent tasks to be posted and handled by controller task*/
  199. extern int btdm_vnd_offload_task_register(btdm_vnd_ol_sig_t sig, btdm_vnd_ol_task_func_t func);
  200. extern int btdm_vnd_offload_task_deregister(btdm_vnd_ol_sig_t sig);
  201. extern int btdm_vnd_offload_post_from_isr(btdm_vnd_ol_sig_t sig, void *param, bool need_yield);
  202. extern int btdm_vnd_offload_post(btdm_vnd_ol_sig_t sig, void *param);
  203. /* Low Power Clock */
  204. extern bool btdm_lpclk_select_src(uint32_t sel);
  205. extern bool btdm_lpclk_set_div(uint32_t div);
  206. extern int btdm_hci_tl_io_event_post(int event);
  207. /* VHCI */
  208. extern bool API_vhci_host_check_send_available(void);
  209. extern void API_vhci_host_send_packet(uint8_t *data, uint16_t len);
  210. extern int API_vhci_host_register_callback(const vhci_host_callback_t *callback);
  211. /* TX power */
  212. extern int ble_txpwr_set(int power_type, int power_level);
  213. extern int ble_txpwr_get(int power_type);
  214. extern uint16_t l2c_ble_link_get_tx_buf_num(void);
  215. extern int coex_core_ble_conn_dyn_prio_get(bool *low, bool *high);
  216. extern bool btdm_deep_sleep_mem_init(void);
  217. extern void btdm_deep_sleep_mem_deinit(void);
  218. extern void btdm_ble_power_down_dma_copy(bool copy);
  219. extern uint8_t btdm_sleep_clock_sync(void);
  220. #if CONFIG_MAC_BB_PD
  221. extern void esp_mac_bb_power_down(void);
  222. extern void esp_mac_bb_power_up(void);
  223. extern void ets_backup_dma_copy(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem);
  224. #endif
  225. extern char _bss_start_btdm;
  226. extern char _bss_end_btdm;
  227. extern char _data_start_btdm;
  228. extern char _data_end_btdm;
  229. extern uint32_t _data_start_btdm_rom;
  230. extern uint32_t _data_end_btdm_rom;
  231. extern uint32_t _bt_bss_start;
  232. extern uint32_t _bt_bss_end;
  233. extern uint32_t _btdm_bss_start;
  234. extern uint32_t _btdm_bss_end;
  235. extern uint32_t _bt_data_start;
  236. extern uint32_t _bt_data_end;
  237. extern uint32_t _btdm_data_start;
  238. extern uint32_t _btdm_data_end;
  239. extern char _bt_tmp_bss_start;
  240. extern char _bt_tmp_bss_end;
  241. /* Local Function Declare
  242. *********************************************************************
  243. */
  244. static void interrupt_set_wrapper(int cpu_no, int intr_source, int intr_num, int intr_prio);
  245. static void interrupt_clear_wrapper(int intr_source, int intr_num);
  246. static void interrupt_handler_set_wrapper(int n, intr_handler_t fn, void *arg);
  247. static void IRAM_ATTR interrupt_disable(void);
  248. static void IRAM_ATTR interrupt_restore(void);
  249. static void IRAM_ATTR task_yield_from_isr(void);
  250. static void *semphr_create_wrapper(uint32_t max, uint32_t init);
  251. static void semphr_delete_wrapper(void *semphr);
  252. static int IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw);
  253. static int IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw);
  254. static int semphr_take_wrapper(void *semphr, uint32_t block_time_ms);
  255. static int semphr_give_wrapper(void *semphr);
  256. static void *mutex_create_wrapper(void);
  257. static void mutex_delete_wrapper(void *mutex);
  258. static int mutex_lock_wrapper(void *mutex);
  259. static int mutex_unlock_wrapper(void *mutex);
  260. static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size);
  261. static void queue_delete_wrapper(void *queue);
  262. static int queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms);
  263. static int IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw);
  264. static int queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms);
  265. static int IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw);
  266. static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  267. static void task_delete_wrapper(void *task_handle);
  268. static bool IRAM_ATTR is_in_isr_wrapper(void);
  269. static void *malloc_internal_wrapper(size_t size);
  270. static int IRAM_ATTR read_mac_wrapper(uint8_t mac[6]);
  271. static void IRAM_ATTR srand_wrapper(unsigned int seed);
  272. static int IRAM_ATTR rand_wrapper(void);
  273. static uint32_t IRAM_ATTR btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr);
  274. static uint32_t IRAM_ATTR btdm_hus_2_lpcycles(uint32_t hus);
  275. static bool IRAM_ATTR btdm_sleep_check_duration(int32_t *slot_cnt);
  276. static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles);
  277. static void btdm_sleep_enter_phase2_wrapper(void);
  278. static void btdm_sleep_exit_phase3_wrapper(void);
  279. static void coex_wifi_sleep_set_hook(bool sleep);
  280. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status);
  281. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status);
  282. static void interrupt_on_wrapper(int intr_num);
  283. static void interrupt_off_wrapper(int intr_num);
  284. static void btdm_hw_mac_power_up_wrapper(void);
  285. static void btdm_hw_mac_power_down_wrapper(void);
  286. static void btdm_backup_dma_copy_wrapper(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem);
  287. static void btdm_slp_tmr_callback(void *arg);
  288. /* Local variable definition
  289. ***************************************************************************
  290. */
  291. /* OSI funcs */
  292. static const struct osi_funcs_t osi_funcs_ro = {
  293. ._magic = OSI_MAGIC_VALUE,
  294. ._version = OSI_VERSION,
  295. ._interrupt_set = interrupt_set_wrapper,
  296. ._interrupt_clear = interrupt_clear_wrapper,
  297. ._interrupt_handler_set = interrupt_handler_set_wrapper,
  298. ._interrupt_disable = interrupt_disable,
  299. ._interrupt_restore = interrupt_restore,
  300. ._task_yield = vPortYield,
  301. ._task_yield_from_isr = task_yield_from_isr,
  302. ._semphr_create = semphr_create_wrapper,
  303. ._semphr_delete = semphr_delete_wrapper,
  304. ._semphr_take_from_isr = semphr_take_from_isr_wrapper,
  305. ._semphr_give_from_isr = semphr_give_from_isr_wrapper,
  306. ._semphr_take = semphr_take_wrapper,
  307. ._semphr_give = semphr_give_wrapper,
  308. ._mutex_create = mutex_create_wrapper,
  309. ._mutex_delete = mutex_delete_wrapper,
  310. ._mutex_lock = mutex_lock_wrapper,
  311. ._mutex_unlock = mutex_unlock_wrapper,
  312. ._queue_create = queue_create_wrapper,
  313. ._queue_delete = queue_delete_wrapper,
  314. ._queue_send = queue_send_wrapper,
  315. ._queue_send_from_isr = queue_send_from_isr_wrapper,
  316. ._queue_recv = queue_recv_wrapper,
  317. ._queue_recv_from_isr = queue_recv_from_isr_wrapper,
  318. ._task_create = task_create_wrapper,
  319. ._task_delete = task_delete_wrapper,
  320. ._is_in_isr = is_in_isr_wrapper,
  321. ._cause_sw_intr_to_core = NULL,
  322. ._malloc = malloc,
  323. ._malloc_internal = malloc_internal_wrapper,
  324. ._free = free,
  325. ._read_efuse_mac = read_mac_wrapper,
  326. ._srand = srand_wrapper,
  327. ._rand = rand_wrapper,
  328. ._btdm_lpcycles_2_hus = btdm_lpcycles_2_hus,
  329. ._btdm_hus_2_lpcycles = btdm_hus_2_lpcycles,
  330. ._btdm_sleep_check_duration = btdm_sleep_check_duration,
  331. ._btdm_sleep_enter_phase1 = btdm_sleep_enter_phase1_wrapper,
  332. ._btdm_sleep_enter_phase2 = btdm_sleep_enter_phase2_wrapper,
  333. ._btdm_sleep_exit_phase1 = NULL,
  334. ._btdm_sleep_exit_phase2 = NULL,
  335. ._btdm_sleep_exit_phase3 = btdm_sleep_exit_phase3_wrapper,
  336. ._coex_wifi_sleep_set = coex_wifi_sleep_set_hook,
  337. ._coex_core_ble_conn_dyn_prio_get = coex_core_ble_conn_dyn_prio_get,
  338. ._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper,
  339. ._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper,
  340. ._interrupt_on = interrupt_on_wrapper,
  341. ._interrupt_off = interrupt_off_wrapper,
  342. ._esp_hw_power_down = btdm_hw_mac_power_down_wrapper,
  343. ._esp_hw_power_up = btdm_hw_mac_power_up_wrapper,
  344. ._ets_backup_dma_copy = btdm_backup_dma_copy_wrapper,
  345. };
  346. static DRAM_ATTR struct osi_funcs_t *osi_funcs_p;
  347. /* Static variable declare */
  348. static DRAM_ATTR esp_bt_controller_status_t btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  349. static DRAM_ATTR portMUX_TYPE global_int_mux = portMUX_INITIALIZER_UNLOCKED;
  350. // low power control struct
  351. static DRAM_ATTR btdm_lpcntl_t s_lp_cntl;
  352. // low power status struct
  353. static DRAM_ATTR btdm_lpstat_t s_lp_stat;
  354. // measured average low power clock period in micro seconds
  355. static DRAM_ATTR uint32_t btdm_lpcycle_us = 0;
  356. // number of fractional bit for btdm_lpcycle_us
  357. static DRAM_ATTR uint8_t btdm_lpcycle_us_frac = 0;
  358. // semaphore used for blocking VHCI API to wait for controller to wake up
  359. static DRAM_ATTR QueueHandle_t s_wakeup_req_sem = NULL;
  360. // wakeup timer
  361. static DRAM_ATTR esp_timer_handle_t s_btdm_slp_tmr;
  362. #ifdef CONFIG_PM_ENABLE
  363. static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock;
  364. // pm_lock to prevent light sleep due to incompatibility currently
  365. static DRAM_ATTR esp_pm_lock_handle_t s_light_sleep_pm_lock;
  366. #endif
  367. void IRAM_ATTR btdm_hw_mac_power_down_wrapper(void)
  368. {
  369. #if CONFIG_MAC_BB_PD
  370. // le module power down
  371. SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO);
  372. SET_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_BT_FORCE_PD);
  373. esp_mac_bb_power_down();
  374. #endif
  375. }
  376. void IRAM_ATTR btdm_hw_mac_power_up_wrapper(void)
  377. {
  378. #if CONFIG_MAC_BB_PD
  379. // le module power up
  380. CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_BT_FORCE_PD);
  381. CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO);
  382. esp_mac_bb_power_up();
  383. #endif
  384. }
  385. void IRAM_ATTR btdm_backup_dma_copy_wrapper(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem)
  386. {
  387. #if CONFIG_MAC_BB_PD
  388. ets_backup_dma_copy(reg, mem_addr, num, to_mem);
  389. #endif
  390. }
  391. static void interrupt_set_wrapper(int cpu_no, int intr_source, int intr_num, int intr_prio)
  392. {
  393. intr_matrix_route(intr_source, intr_num);
  394. esprv_intc_int_set_priority(intr_num, intr_prio);
  395. //esprv_intc_int_enable_level(1 << intr_num);
  396. esprv_intc_int_set_type(intr_num, 0);
  397. }
  398. static void interrupt_clear_wrapper(int intr_source, int intr_num)
  399. {
  400. }
  401. static void interrupt_handler_set_wrapper(int n, intr_handler_t fn, void *arg)
  402. {
  403. intr_handler_set(n, fn, arg);
  404. }
  405. static void interrupt_on_wrapper(int intr_num)
  406. {
  407. esprv_intc_int_enable(1 << intr_num);
  408. }
  409. static void interrupt_off_wrapper(int intr_num)
  410. {
  411. esprv_intc_int_disable(1<<intr_num);
  412. }
  413. static void IRAM_ATTR interrupt_disable(void)
  414. {
  415. if (xPortInIsrContext()) {
  416. portENTER_CRITICAL_ISR(&global_int_mux);
  417. } else {
  418. portENTER_CRITICAL(&global_int_mux);
  419. }
  420. }
  421. static void IRAM_ATTR interrupt_restore(void)
  422. {
  423. if (xPortInIsrContext()) {
  424. portEXIT_CRITICAL_ISR(&global_int_mux);
  425. } else {
  426. portEXIT_CRITICAL(&global_int_mux);
  427. }
  428. }
  429. static void IRAM_ATTR task_yield_from_isr(void)
  430. {
  431. portYIELD_FROM_ISR();
  432. }
  433. static void *semphr_create_wrapper(uint32_t max, uint32_t init)
  434. {
  435. return (void *)xSemaphoreCreateCounting(max, init);
  436. }
  437. static void semphr_delete_wrapper(void *semphr)
  438. {
  439. vSemaphoreDelete(semphr);
  440. }
  441. static int IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw)
  442. {
  443. return (int)xSemaphoreTakeFromISR(semphr, hptw);
  444. }
  445. static int IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw)
  446. {
  447. return (int)xSemaphoreGiveFromISR(semphr, hptw);
  448. }
  449. static int semphr_take_wrapper(void *semphr, uint32_t block_time_ms)
  450. {
  451. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  452. return (int)xSemaphoreTake(semphr, portMAX_DELAY);
  453. } else {
  454. return (int)xSemaphoreTake(semphr, block_time_ms / portTICK_PERIOD_MS);
  455. }
  456. }
  457. static int semphr_give_wrapper(void *semphr)
  458. {
  459. return (int)xSemaphoreGive(semphr);
  460. }
  461. static void *mutex_create_wrapper(void)
  462. {
  463. return (void *)xSemaphoreCreateMutex();
  464. }
  465. static void mutex_delete_wrapper(void *mutex)
  466. {
  467. vSemaphoreDelete(mutex);
  468. }
  469. static int mutex_lock_wrapper(void *mutex)
  470. {
  471. return (int)xSemaphoreTake(mutex, portMAX_DELAY);
  472. }
  473. static int mutex_unlock_wrapper(void *mutex)
  474. {
  475. return (int)xSemaphoreGive(mutex);
  476. }
  477. static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size)
  478. {
  479. return (void *)xQueueCreate(queue_len, item_size);
  480. }
  481. static void queue_delete_wrapper(void *queue)
  482. {
  483. vQueueDelete(queue);
  484. }
  485. static int queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms)
  486. {
  487. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  488. return (int)xQueueSend(queue, item, portMAX_DELAY);
  489. } else {
  490. return (int)xQueueSend(queue, item, block_time_ms / portTICK_PERIOD_MS);
  491. }
  492. }
  493. static int IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw)
  494. {
  495. return (int)xQueueSendFromISR(queue, item, hptw);
  496. }
  497. static int queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms)
  498. {
  499. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  500. return (int)xQueueReceive(queue, item, portMAX_DELAY);
  501. } else {
  502. return (int)xQueueReceive(queue, item, block_time_ms / portTICK_PERIOD_MS);
  503. }
  504. }
  505. static int IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw)
  506. {
  507. return (int)xQueueReceiveFromISR(queue, item, hptw);
  508. }
  509. static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
  510. {
  511. return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
  512. }
  513. static void task_delete_wrapper(void *task_handle)
  514. {
  515. vTaskDelete(task_handle);
  516. }
  517. static bool IRAM_ATTR is_in_isr_wrapper(void)
  518. {
  519. return (bool)xPortInIsrContext();
  520. }
  521. static void *malloc_internal_wrapper(size_t size)
  522. {
  523. return heap_caps_malloc(size, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL|MALLOC_CAP_DMA);
  524. }
  525. static int IRAM_ATTR read_mac_wrapper(uint8_t mac[6])
  526. {
  527. int ret = esp_read_mac(mac, ESP_MAC_BT);
  528. ESP_LOGI(BTDM_LOG_TAG, "Bluetooth MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
  529. mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
  530. return ret;
  531. }
  532. static void IRAM_ATTR srand_wrapper(unsigned int seed)
  533. {
  534. /* empty function */
  535. }
  536. static int IRAM_ATTR rand_wrapper(void)
  537. {
  538. return (int)esp_random();
  539. }
  540. static uint32_t IRAM_ATTR btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr)
  541. {
  542. uint64_t local_error_corr = (error_corr == NULL) ? 0 : (uint64_t)(*error_corr);
  543. uint64_t res = (uint64_t)btdm_lpcycle_us * cycles * 2;
  544. local_error_corr += res;
  545. res = (local_error_corr >> btdm_lpcycle_us_frac);
  546. local_error_corr -= (res << btdm_lpcycle_us_frac);
  547. if (error_corr) {
  548. *error_corr = (uint32_t) local_error_corr;
  549. }
  550. return (uint32_t)res;
  551. }
  552. /*
  553. * @brief Converts a duration in half us into a number of low power clock cycles.
  554. */
  555. static uint32_t IRAM_ATTR btdm_hus_2_lpcycles(uint32_t hus)
  556. {
  557. // The number of sleep duration(us) should not lead to overflow. Thrs: 100s
  558. // Compute the sleep duration in us to low power clock cycles, with calibration result applied
  559. // clock measurement is conducted
  560. uint64_t cycles = ((uint64_t)(hus) << btdm_lpcycle_us_frac) / btdm_lpcycle_us;
  561. cycles >>= 1;
  562. return (uint32_t)cycles;
  563. }
  564. static bool IRAM_ATTR btdm_sleep_check_duration(int32_t *half_slot_cnt)
  565. {
  566. if (*half_slot_cnt < BTDM_MIN_SLEEP_DURATION) {
  567. return false;
  568. }
  569. /* wake up in advance considering the delay in enabling PHY/RF */
  570. *half_slot_cnt -= BTDM_MODEM_WAKE_UP_DELAY;
  571. return true;
  572. }
  573. static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles)
  574. {
  575. if (s_lp_cntl.wakeup_timer_required == 0) {
  576. return;
  577. }
  578. // start a timer to wake up and acquire the pm_lock before modem_sleep awakes
  579. uint32_t us_to_sleep = btdm_lpcycles_2_hus(lpcycles, NULL) >> 1;
  580. #define BTDM_MIN_TIMER_UNCERTAINTY_US (1800)
  581. assert(us_to_sleep > BTDM_MIN_TIMER_UNCERTAINTY_US);
  582. // allow a maximum time uncertainty to be about 488ppm(1/2048) at least as clock drift
  583. // and set the timer in advance
  584. uint32_t uncertainty = (us_to_sleep >> 11);
  585. if (uncertainty < BTDM_MIN_TIMER_UNCERTAINTY_US) {
  586. uncertainty = BTDM_MIN_TIMER_UNCERTAINTY_US;
  587. }
  588. assert (s_lp_stat.wakeup_timer_started == 0);
  589. if (esp_timer_start_once(s_btdm_slp_tmr, us_to_sleep - uncertainty) == ESP_OK) {
  590. s_lp_stat.wakeup_timer_started = 1;
  591. } else {
  592. ESP_LOGE(BTDM_LOG_TAG, "timer start failed");
  593. assert(0);
  594. }
  595. }
  596. static void btdm_sleep_enter_phase2_wrapper(void)
  597. {
  598. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  599. if (s_lp_stat.phy_enabled) {
  600. esp_phy_disable();
  601. s_lp_stat.phy_enabled = 0;
  602. } else {
  603. assert(0);
  604. }
  605. if (s_lp_stat.pm_lock_released == 0) {
  606. #ifdef CONFIG_PM_ENABLE
  607. esp_pm_lock_release(s_pm_lock);
  608. #endif
  609. s_lp_stat.pm_lock_released = 1;
  610. }
  611. }
  612. }
  613. static void btdm_sleep_exit_phase3_wrapper(void)
  614. {
  615. #ifdef CONFIG_PM_ENABLE
  616. // If BT wakeup before esp timer coming due to timer task have no chance to run.
  617. // Then we will not run into `btdm_sleep_exit_phase0` and acquire PM lock,
  618. // Do it again here to fix this issue.
  619. if (s_lp_stat.pm_lock_released) {
  620. esp_pm_lock_acquire(s_pm_lock);
  621. s_lp_stat.pm_lock_released = 0;
  622. }
  623. #endif
  624. if(btdm_sleep_clock_sync()) {
  625. ESP_LOGE(BTDM_LOG_TAG, "sleep eco state err\n");
  626. assert(0);
  627. }
  628. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  629. if (s_lp_stat.phy_enabled == 0) {
  630. esp_phy_enable();
  631. s_lp_stat.phy_enabled = 1;
  632. }
  633. }
  634. // If BT wakeup before esp timer coming due to timer task have no chance to run.
  635. // Then we will not run into `btdm_sleep_exit_phase0` and stop esp timer,
  636. // Do it again here to fix this issue.
  637. if (s_lp_cntl.wakeup_timer_required && s_lp_stat.wakeup_timer_started) {
  638. esp_timer_stop(s_btdm_slp_tmr);
  639. s_lp_stat.wakeup_timer_started = 0;
  640. }
  641. }
  642. static void IRAM_ATTR btdm_sleep_exit_phase0(void *param)
  643. {
  644. assert(s_lp_cntl.enable == 1);
  645. #ifdef CONFIG_PM_ENABLE
  646. if (s_lp_stat.pm_lock_released) {
  647. esp_pm_lock_acquire(s_pm_lock);
  648. s_lp_stat.pm_lock_released = 0;
  649. }
  650. #endif
  651. int event = (int) param;
  652. if (event == BTDM_ASYNC_WAKEUP_SRC_VHCI || event == BTDM_ASYNC_WAKEUP_SRC_DISA) {
  653. btdm_wakeup_request();
  654. }
  655. if (s_lp_cntl.wakeup_timer_required && s_lp_stat.wakeup_timer_started) {
  656. esp_timer_stop(s_btdm_slp_tmr);
  657. s_lp_stat.wakeup_timer_started = 0;
  658. }
  659. if (event == BTDM_ASYNC_WAKEUP_SRC_VHCI || event == BTDM_ASYNC_WAKEUP_SRC_DISA) {
  660. semphr_give_wrapper(s_wakeup_req_sem);
  661. }
  662. }
  663. static void IRAM_ATTR btdm_slp_tmr_callback(void *arg)
  664. {
  665. #ifdef CONFIG_PM_ENABLE
  666. btdm_vnd_offload_post(BTDM_VND_OL_SIG_WAKEUP_TMR, (void *)BTDM_ASYNC_WAKEUP_SRC_TMR);
  667. #endif
  668. }
  669. static bool async_wakeup_request(int event)
  670. {
  671. if (s_lp_cntl.enable == 0) {
  672. return false;
  673. }
  674. bool do_wakeup_request = false;
  675. switch (event) {
  676. case BTDM_ASYNC_WAKEUP_SRC_VHCI:
  677. case BTDM_ASYNC_WAKEUP_SRC_DISA:
  678. btdm_in_wakeup_requesting_set(true);
  679. if (!btdm_power_state_active()) {
  680. btdm_vnd_offload_post(BTDM_VND_OL_SIG_WAKEUP_TMR, (void *)event);
  681. do_wakeup_request = true;
  682. semphr_take_wrapper(s_wakeup_req_sem, OSI_FUNCS_TIME_BLOCKING);
  683. }
  684. break;
  685. default:
  686. break;
  687. }
  688. return do_wakeup_request;
  689. }
  690. static void async_wakeup_request_end(int event)
  691. {
  692. if (s_lp_cntl.enable == 0) {
  693. return;
  694. }
  695. bool allow_to_sleep;
  696. switch (event) {
  697. case BTDM_ASYNC_WAKEUP_SRC_VHCI:
  698. case BTDM_ASYNC_WAKEUP_SRC_DISA:
  699. allow_to_sleep = true;
  700. break;
  701. default:
  702. allow_to_sleep = true;
  703. break;
  704. }
  705. if (allow_to_sleep) {
  706. btdm_in_wakeup_requesting_set(false);
  707. }
  708. return;
  709. }
  710. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
  711. {
  712. #if CONFIG_SW_COEXIST_ENABLE
  713. coex_schm_status_bit_set(type, status);
  714. #endif
  715. }
  716. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
  717. {
  718. #if CONFIG_SW_COEXIST_ENABLE
  719. coex_schm_status_bit_clear(type, status);
  720. #endif
  721. }
  722. bool esp_vhci_host_check_send_available(void)
  723. {
  724. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  725. return false;
  726. }
  727. return API_vhci_host_check_send_available();
  728. }
  729. void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
  730. {
  731. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  732. return;
  733. }
  734. async_wakeup_request(BTDM_ASYNC_WAKEUP_SRC_VHCI);
  735. API_vhci_host_send_packet(data, len);
  736. async_wakeup_request_end(BTDM_ASYNC_WAKEUP_SRC_VHCI);
  737. }
  738. esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
  739. {
  740. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  741. return ESP_FAIL;
  742. }
  743. return API_vhci_host_register_callback((const vhci_host_callback_t *)callback) == 0 ? ESP_OK : ESP_FAIL;
  744. }
  745. static void btdm_controller_mem_init(void)
  746. {
  747. extern void btdm_controller_rom_data_init(void );
  748. btdm_controller_rom_data_init();
  749. }
  750. esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
  751. {
  752. ESP_LOGW(BTDM_LOG_TAG, "%s not implemented, return OK", __func__);
  753. return ESP_OK;
  754. }
  755. esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
  756. {
  757. ESP_LOGW(BTDM_LOG_TAG, "%s not implemented, return OK", __func__);
  758. return ESP_OK;
  759. }
  760. static esp_err_t try_heap_caps_add_region(intptr_t start, intptr_t end)
  761. {
  762. int ret = heap_caps_add_region(start, end);
  763. /* heap_caps_add_region() returns ESP_ERR_INVALID_SIZE if the memory region is
  764. * is too small to fit a heap. This cannot be termed as a fatal error and hence
  765. * we replace it by ESP_OK
  766. */
  767. if (ret == ESP_ERR_INVALID_SIZE) {
  768. return ESP_OK;
  769. }
  770. return ret;
  771. }
  772. // release wifi and coex memory, free about 720 bytes,
  773. void esp_release_wifi_and_coex_mem(void)
  774. {
  775. ESP_ERROR_CHECK(try_heap_caps_add_region((intptr_t)ets_rom_layout_p->dram_start_coexist, (intptr_t)ets_rom_layout_p->dram_end_pp));
  776. ESP_ERROR_CHECK(try_heap_caps_add_region((intptr_t)ets_rom_layout_p->data_start_interface_coexist,(intptr_t)ets_rom_layout_p->bss_end_interface_pp));
  777. }
  778. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
  779. static void IRAM_ATTR btdm_mac_bb_power_down_cb(void)
  780. {
  781. if (s_lp_cntl.mac_bb_pd && s_lp_stat.mac_bb_pd == 0) {
  782. #if (CONFIG_MAC_BB_PD)
  783. btdm_ble_power_down_dma_copy(true);
  784. #endif
  785. s_lp_stat.mac_bb_pd = 1;
  786. }
  787. }
  788. static void IRAM_ATTR btdm_mac_bb_power_up_cb(void)
  789. {
  790. #if (CONFIG_MAC_BB_PD)
  791. if (s_lp_cntl.mac_bb_pd && s_lp_stat.mac_bb_pd) {
  792. btdm_ble_power_down_dma_copy(false);
  793. s_lp_stat.mac_bb_pd = 0;
  794. }
  795. #endif
  796. }
  797. #endif
  798. esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
  799. {
  800. esp_err_t err = ESP_FAIL;
  801. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
  802. return ESP_ERR_INVALID_STATE;
  803. }
  804. if (cfg == NULL) {
  805. return ESP_ERR_INVALID_ARG;
  806. }
  807. if (cfg->controller_task_prio != ESP_TASK_BT_CONTROLLER_PRIO
  808. || cfg->controller_task_stack_size < ESP_TASK_BT_CONTROLLER_STACK) {
  809. ESP_LOGE(BTDM_LOG_TAG, "Invalid controller task prioriy or stack size");
  810. return ESP_ERR_INVALID_ARG;
  811. }
  812. if (cfg->bluetooth_mode != ESP_BT_MODE_BLE) {
  813. ESP_LOGE(BTDM_LOG_TAG, "%s controller only support BLE only mode", __func__);
  814. return ESP_ERR_NOT_SUPPORTED;
  815. }
  816. if (cfg->bluetooth_mode & ESP_BT_MODE_BLE) {
  817. if ((cfg->ble_max_act <= 0) || (cfg->ble_max_act > BT_CTRL_BLE_MAX_ACT_LIMIT)) {
  818. ESP_LOGE(BTDM_LOG_TAG, "Invalid value of ble_max_act");
  819. return ESP_ERR_INVALID_ARG;
  820. }
  821. }
  822. if (cfg->sleep_mode == ESP_BT_SLEEP_MODE_1) {
  823. if (cfg->sleep_clock == ESP_BT_SLEEP_CLOCK_NONE) {
  824. ESP_LOGE(BTDM_LOG_TAG, "SLEEP_MODE_1 enabled but sleep clock not configured");
  825. return ESP_ERR_INVALID_ARG;
  826. }
  827. }
  828. // overwrite some parameters
  829. cfg->magic = ESP_BT_CTRL_CONFIG_MAGIC_VAL;
  830. btdm_controller_mem_init();
  831. #if CONFIG_MAC_BB_PD
  832. if (esp_register_mac_bb_pd_callback(btdm_mac_bb_power_down_cb) != 0) {
  833. err = ESP_ERR_INVALID_ARG;
  834. goto error;
  835. }
  836. if (esp_register_mac_bb_pu_callback(btdm_mac_bb_power_up_cb) != 0) {
  837. err = ESP_ERR_INVALID_ARG;
  838. goto error;
  839. }
  840. #endif
  841. osi_funcs_p = (struct osi_funcs_t *)malloc_internal_wrapper(sizeof(struct osi_funcs_t));
  842. if (osi_funcs_p == NULL) {
  843. return ESP_ERR_NO_MEM;
  844. }
  845. memcpy(osi_funcs_p, &osi_funcs_ro, sizeof(struct osi_funcs_t));
  846. if (btdm_osi_funcs_register(osi_funcs_p) != 0) {
  847. return ESP_ERR_INVALID_ARG;
  848. }
  849. ESP_LOGI(BTDM_LOG_TAG, "BT controller compile version [%s]", btdm_controller_get_compile_version());
  850. // init low-power control resources
  851. do {
  852. // set default values for global states or resources
  853. s_lp_stat.val = 0;
  854. s_lp_cntl.val = 0;
  855. s_wakeup_req_sem = NULL;
  856. s_btdm_slp_tmr = NULL;
  857. // configure and initialize resources
  858. s_lp_cntl.enable = (cfg->sleep_mode == ESP_BT_SLEEP_MODE_1) ? 1 : 0;
  859. s_lp_cntl.no_light_sleep = 0;
  860. if (s_lp_cntl.enable) {
  861. #if (CONFIG_MAC_BB_PD)
  862. if (!btdm_deep_sleep_mem_init()) {
  863. err = ESP_ERR_NO_MEM;
  864. goto error;
  865. }
  866. s_lp_cntl.mac_bb_pd = 1;
  867. #endif
  868. #ifdef CONFIG_PM_ENABLE
  869. s_lp_cntl.wakeup_timer_required = 1;
  870. #endif
  871. // async wakeup semaphore for VHCI
  872. s_wakeup_req_sem = semphr_create_wrapper(1, 0);
  873. if (s_wakeup_req_sem == NULL) {
  874. err = ESP_ERR_NO_MEM;
  875. goto error;
  876. }
  877. btdm_vnd_offload_task_register(BTDM_VND_OL_SIG_WAKEUP_TMR, btdm_sleep_exit_phase0);
  878. }
  879. if (s_lp_cntl.wakeup_timer_required) {
  880. esp_timer_create_args_t create_args = {
  881. .callback = btdm_slp_tmr_callback,
  882. .arg = NULL,
  883. .name = "btSlp",
  884. };
  885. if ((err = esp_timer_create(&create_args, &s_btdm_slp_tmr)) != ESP_OK) {
  886. goto error;
  887. }
  888. }
  889. // set default bluetooth sleep clock cycle and its fractional bits
  890. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  891. btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
  892. // // set default bluetooth sleep clock source
  893. // s_lp_cntl.lpclk_sel = BTDM_LPCLK_SEL_XTAL;
  894. #if CONFIG_BT_CTRL_LPCLK_SEL_EXT_32K_XTAL
  895. // check whether or not EXT_CRYS is working
  896. if (rtc_clk_slow_freq_get() == RTC_SLOW_FREQ_32K_XTAL) {
  897. s_lp_cntl.lpclk_sel = BTDM_LPCLK_SEL_XTAL32K; // set default value
  898. // #ifdef CONFIG_PM_ENABLE
  899. // s_btdm_allow_light_sleep = true;
  900. // #endif
  901. } else {
  902. ESP_LOGW(BTDM_LOG_TAG, "32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock\n"
  903. "light sleep mode will not be able to apply when bluetooth is enabled");
  904. s_lp_cntl.lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
  905. }
  906. #elif (CONFIG_BT_CTRL_LPCLK_SEL_RTC_SLOW)
  907. // check whether or not EXT_CRYS is working
  908. if (rtc_clk_slow_freq_get() == RTC_SLOW_FREQ_RTC) {
  909. s_lp_cntl.lpclk_sel = BTDM_LPCLK_SEL_RTC_SLOW; // set default value
  910. } else {
  911. ESP_LOGW(BTDM_LOG_TAG, "Internal 150kHz RC oscillator not detected, fall back to main XTAL as Bluetooth sleep clock\n"
  912. "light sleep mode will not be able to apply when bluetooth is enabled");
  913. s_lp_cntl.lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
  914. }
  915. #else
  916. s_lp_cntl.lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
  917. #endif
  918. bool select_src_ret, set_div_ret;
  919. if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_XTAL) {
  920. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL);
  921. set_div_ret = btdm_lpclk_set_div(rtc_clk_xtal_freq_get() * 2);
  922. assert(select_src_ret && set_div_ret);
  923. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  924. btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
  925. } else if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_XTAL32K) {
  926. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL32K);
  927. set_div_ret = btdm_lpclk_set_div(0);
  928. assert(select_src_ret && set_div_ret);
  929. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  930. btdm_lpcycle_us = (RTC_CLK_CAL_FRACT > 15) ? (1000000 << (RTC_CLK_CAL_FRACT - 15)) :
  931. (1000000 >> (15 - RTC_CLK_CAL_FRACT));
  932. assert(btdm_lpcycle_us != 0);
  933. } else if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_RTC_SLOW) {
  934. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_RTC_SLOW);
  935. set_div_ret = btdm_lpclk_set_div(0);
  936. assert(select_src_ret && set_div_ret);
  937. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  938. btdm_lpcycle_us = esp_clk_slowclk_cal_get();
  939. } else {
  940. err = ESP_ERR_INVALID_ARG;
  941. goto error;
  942. }
  943. #ifdef CONFIG_PM_ENABLE
  944. if (s_lp_cntl.no_light_sleep) {
  945. if ((err = esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, "btLS", &s_light_sleep_pm_lock)) != ESP_OK) {
  946. err = ESP_ERR_NO_MEM;
  947. goto error;
  948. }
  949. }
  950. if ((err = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "bt", &s_pm_lock)) != ESP_OK) {
  951. err = ESP_ERR_NO_MEM;
  952. goto error;
  953. } else {
  954. s_lp_stat.pm_lock_released = 1;
  955. }
  956. #endif
  957. } while (0);
  958. #if CONFIG_SW_COEXIST_ENABLE
  959. coex_init();
  960. #endif
  961. periph_module_enable(PERIPH_BT_MODULE);
  962. esp_phy_enable();
  963. s_lp_stat.phy_enabled = 1;
  964. if (btdm_controller_init(cfg) != 0) {
  965. err = ESP_ERR_NO_MEM;
  966. goto error;
  967. }
  968. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  969. return ESP_OK;
  970. error:
  971. if (s_lp_stat.phy_enabled) {
  972. esp_phy_disable();
  973. s_lp_stat.phy_enabled = 0;
  974. }
  975. do {
  976. // deinit low power control resources
  977. #ifdef CONFIG_PM_ENABLE
  978. if (s_lp_cntl.no_light_sleep) {
  979. if (s_light_sleep_pm_lock != NULL) {
  980. esp_pm_lock_delete(s_light_sleep_pm_lock);
  981. s_light_sleep_pm_lock = NULL;
  982. }
  983. }
  984. if (s_pm_lock != NULL) {
  985. esp_pm_lock_delete(s_pm_lock);
  986. s_pm_lock = NULL;
  987. s_lp_stat.pm_lock_released = 0;
  988. }
  989. #endif
  990. if (s_lp_cntl.wakeup_timer_required && s_btdm_slp_tmr != NULL) {
  991. esp_timer_delete(s_btdm_slp_tmr);
  992. s_btdm_slp_tmr = NULL;
  993. }
  994. #if (CONFIG_MAC_BB_PD)
  995. if (s_lp_cntl.mac_bb_pd) {
  996. btdm_deep_sleep_mem_deinit();
  997. s_lp_cntl.mac_bb_pd = 0;
  998. }
  999. #endif
  1000. if (s_lp_cntl.enable) {
  1001. btdm_vnd_offload_task_deregister(BTDM_VND_OL_SIG_WAKEUP_TMR);
  1002. if (s_wakeup_req_sem != NULL) {
  1003. semphr_delete_wrapper(s_wakeup_req_sem);
  1004. s_wakeup_req_sem = NULL;
  1005. }
  1006. }
  1007. } while (0);
  1008. #if CONFIG_MAC_BB_PD
  1009. esp_unregister_mac_bb_pd_callback(btdm_mac_bb_power_down_cb);
  1010. esp_unregister_mac_bb_pu_callback(btdm_mac_bb_power_up_cb);
  1011. #endif
  1012. if (osi_funcs_p != NULL) {
  1013. free(osi_funcs_p);
  1014. osi_funcs_p = NULL;
  1015. }
  1016. return err;
  1017. }
  1018. esp_err_t esp_bt_controller_deinit(void)
  1019. {
  1020. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  1021. return ESP_ERR_INVALID_STATE;
  1022. }
  1023. btdm_controller_deinit();
  1024. periph_module_disable(PERIPH_BT_MODULE);
  1025. if (s_lp_stat.phy_enabled) {
  1026. esp_phy_disable();
  1027. s_lp_stat.phy_enabled = 0;
  1028. } else {
  1029. assert(0);
  1030. }
  1031. // deinit low power control resources
  1032. do {
  1033. #if (CONFIG_MAC_BB_PD)
  1034. btdm_deep_sleep_mem_deinit();
  1035. #endif
  1036. #ifdef CONFIG_PM_ENABLE
  1037. if (s_lp_cntl.no_light_sleep) {
  1038. esp_pm_lock_delete(s_light_sleep_pm_lock);
  1039. s_light_sleep_pm_lock = NULL;
  1040. }
  1041. esp_pm_lock_delete(s_pm_lock);
  1042. s_pm_lock = NULL;
  1043. s_lp_stat.pm_lock_released = 0;
  1044. #endif
  1045. if (s_lp_cntl.wakeup_timer_required) {
  1046. if (s_lp_stat.wakeup_timer_started) {
  1047. esp_timer_stop(s_btdm_slp_tmr);
  1048. }
  1049. s_lp_stat.wakeup_timer_started = 0;
  1050. esp_timer_delete(s_btdm_slp_tmr);
  1051. s_btdm_slp_tmr = NULL;
  1052. }
  1053. if (s_lp_cntl.enable) {
  1054. btdm_vnd_offload_task_deregister(BTDM_VND_OL_SIG_WAKEUP_TMR);
  1055. semphr_delete_wrapper(s_wakeup_req_sem);
  1056. s_wakeup_req_sem = NULL;
  1057. }
  1058. } while (0);
  1059. #if CONFIG_MAC_BB_PD
  1060. esp_unregister_mac_bb_pd_callback(btdm_mac_bb_power_down_cb);
  1061. esp_unregister_mac_bb_pu_callback(btdm_mac_bb_power_up_cb);
  1062. #endif
  1063. free(osi_funcs_p);
  1064. osi_funcs_p = NULL;
  1065. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  1066. btdm_lpcycle_us = 0;
  1067. return ESP_OK;
  1068. }
  1069. esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
  1070. {
  1071. int ret = ESP_OK;
  1072. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  1073. return ESP_ERR_INVALID_STATE;
  1074. }
  1075. //As the history reason, mode should be equal to the mode which set in esp_bt_controller_init()
  1076. if (mode != btdm_controller_get_mode()) {
  1077. ESP_LOGE(BTDM_LOG_TAG, "invalid mode %d, controller support mode is %d", mode, btdm_controller_get_mode());
  1078. return ESP_ERR_INVALID_ARG;
  1079. }
  1080. #if CONFIG_SW_COEXIST_ENABLE
  1081. coex_enable();
  1082. #endif
  1083. // enable low power mode
  1084. do {
  1085. #ifdef CONFIG_PM_ENABLE
  1086. if (s_lp_cntl.no_light_sleep) {
  1087. esp_pm_lock_acquire(s_light_sleep_pm_lock);
  1088. }
  1089. esp_pm_lock_acquire(s_pm_lock);
  1090. s_lp_stat.pm_lock_released = 0;
  1091. #endif
  1092. if (s_lp_cntl.enable) {
  1093. btdm_controller_enable_sleep(true);
  1094. }
  1095. } while (0);
  1096. if (btdm_controller_enable(mode) != 0) {
  1097. ret = ESP_ERR_INVALID_STATE;
  1098. goto error;
  1099. }
  1100. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
  1101. return ret;
  1102. error:
  1103. // disable low power mode
  1104. do {
  1105. btdm_controller_enable_sleep(false);
  1106. #ifdef CONFIG_PM_ENABLE
  1107. if (s_lp_cntl.no_light_sleep) {
  1108. esp_pm_lock_release(s_light_sleep_pm_lock);
  1109. }
  1110. if (s_lp_stat.pm_lock_released == 0) {
  1111. esp_pm_lock_release(s_pm_lock);
  1112. s_lp_stat.pm_lock_released = 1;
  1113. }
  1114. #endif
  1115. } while (0);
  1116. return ret;
  1117. }
  1118. esp_err_t esp_bt_controller_disable(void)
  1119. {
  1120. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1121. return ESP_ERR_INVALID_STATE;
  1122. }
  1123. async_wakeup_request(BTDM_ASYNC_WAKEUP_SRC_DISA);
  1124. while (!btdm_power_state_active()){}
  1125. btdm_controller_disable();
  1126. async_wakeup_request_end(BTDM_ASYNC_WAKEUP_SRC_DISA);
  1127. #if CONFIG_SW_COEXIST_ENABLE
  1128. coex_disable();
  1129. #endif
  1130. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  1131. // disable low power mode
  1132. do {
  1133. #ifdef CONFIG_PM_ENABLE
  1134. if (s_lp_cntl.no_light_sleep) {
  1135. esp_pm_lock_release(s_light_sleep_pm_lock);
  1136. }
  1137. if (s_lp_stat.pm_lock_released == 0) {
  1138. esp_pm_lock_release(s_pm_lock);
  1139. s_lp_stat.pm_lock_released = 1;
  1140. } else {
  1141. assert(0);
  1142. }
  1143. #endif
  1144. } while (0);
  1145. return ESP_OK;
  1146. }
  1147. esp_bt_controller_status_t esp_bt_controller_get_status(void)
  1148. {
  1149. return btdm_controller_status;
  1150. }
  1151. /* extra functions */
  1152. esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
  1153. {
  1154. esp_err_t stat = ESP_FAIL;
  1155. switch (power_type) {
  1156. case ESP_BLE_PWR_TYPE_ADV:
  1157. case ESP_BLE_PWR_TYPE_SCAN:
  1158. case ESP_BLE_PWR_TYPE_DEFAULT:
  1159. if (ble_txpwr_set(power_type, power_level) == 0) {
  1160. stat = ESP_OK;
  1161. }
  1162. break;
  1163. default:
  1164. stat = ESP_ERR_NOT_SUPPORTED;
  1165. break;
  1166. }
  1167. return stat;
  1168. }
  1169. esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
  1170. {
  1171. esp_power_level_t lvl;
  1172. switch (power_type) {
  1173. case ESP_BLE_PWR_TYPE_ADV:
  1174. case ESP_BLE_PWR_TYPE_SCAN:
  1175. lvl = (esp_power_level_t)ble_txpwr_get(power_type);
  1176. break;
  1177. case ESP_BLE_PWR_TYPE_CONN_HDL0:
  1178. case ESP_BLE_PWR_TYPE_CONN_HDL1:
  1179. case ESP_BLE_PWR_TYPE_CONN_HDL2:
  1180. case ESP_BLE_PWR_TYPE_CONN_HDL3:
  1181. case ESP_BLE_PWR_TYPE_CONN_HDL4:
  1182. case ESP_BLE_PWR_TYPE_CONN_HDL5:
  1183. case ESP_BLE_PWR_TYPE_CONN_HDL6:
  1184. case ESP_BLE_PWR_TYPE_CONN_HDL7:
  1185. case ESP_BLE_PWR_TYPE_CONN_HDL8:
  1186. case ESP_BLE_PWR_TYPE_DEFAULT:
  1187. lvl = (esp_power_level_t)ble_txpwr_get(ESP_BLE_PWR_TYPE_DEFAULT);
  1188. break;
  1189. default:
  1190. lvl = ESP_PWR_LVL_INVALID;
  1191. break;
  1192. }
  1193. return lvl;
  1194. }
  1195. esp_err_t esp_bt_sleep_enable (void)
  1196. {
  1197. esp_err_t status;
  1198. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1199. return ESP_ERR_INVALID_STATE;
  1200. }
  1201. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  1202. btdm_controller_enable_sleep (true);
  1203. status = ESP_OK;
  1204. } else {
  1205. status = ESP_ERR_NOT_SUPPORTED;
  1206. }
  1207. return status;
  1208. }
  1209. esp_err_t esp_bt_sleep_disable (void)
  1210. {
  1211. esp_err_t status;
  1212. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1213. return ESP_ERR_INVALID_STATE;
  1214. }
  1215. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  1216. btdm_controller_enable_sleep (false);
  1217. status = ESP_OK;
  1218. } else {
  1219. status = ESP_ERR_NOT_SUPPORTED;
  1220. }
  1221. return status;
  1222. }
  1223. bool esp_bt_controller_is_sleeping(void)
  1224. {
  1225. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED ||
  1226. btdm_controller_get_sleep_mode() != ESP_BT_SLEEP_MODE_1) {
  1227. return false;
  1228. }
  1229. return !btdm_power_state_active();
  1230. }
  1231. void esp_bt_controller_wakeup_request(void)
  1232. {
  1233. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED ||
  1234. btdm_controller_get_sleep_mode() != ESP_BT_SLEEP_MODE_1) {
  1235. return;
  1236. }
  1237. btdm_wakeup_request();
  1238. }
  1239. int IRAM_ATTR esp_bt_h4tl_eif_io_event_notify(int event)
  1240. {
  1241. return btdm_hci_tl_io_event_post(event);
  1242. }
  1243. uint16_t esp_bt_get_tx_buf_num(void)
  1244. {
  1245. return l2c_ble_link_get_tx_buf_num();
  1246. }
  1247. static void coex_wifi_sleep_set_hook(bool sleep)
  1248. {
  1249. }
  1250. #endif /* CONFIG_BT_ENABLED */