test_i2s.c 19 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523
  1. /**
  2. * I2S test environment UT_T1_I2S:
  3. * We use internal signals instead of external wiring, but please keep the following IO connections, or connect nothing to prevent the signal from being disturbed.
  4. * connect GPIO15 and GPIO19, GPIO25(ESP32)/GPIO17(ESP32-S2) and GPIO26, GPIO21 and GPIO22(ESP32)/GPIO20(ESP32-S2)
  5. * Please do not connect GPIO32(ESP32) any pull-up resistors externally, it will be used to test i2s adc function.
  6. */
  7. #include <stdio.h>
  8. #include <string.h>
  9. #include "freertos/FreeRTOS.h"
  10. #include "freertos/task.h"
  11. #include "driver/i2s.h"
  12. #include "driver/gpio.h"
  13. #include "hal/gpio_hal.h"
  14. #include "unity.h"
  15. #include "math.h"
  16. #include "esp_rom_gpio.h"
  17. #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3, ESP32C3)
  18. #define SAMPLE_RATE (36000)
  19. #define SAMPLE_BITS (16)
  20. #define MASTER_BCK_IO 15
  21. #define SLAVE_BCK_IO 19
  22. #define SLAVE_WS_IO 26
  23. #define DATA_IN_IO 21
  24. #if CONFIG_IDF_TARGET_ESP32
  25. #define MASTER_WS_IO 25
  26. #define DATA_OUT_IO 22
  27. #define ADC1_CHANNEL_4_IO 32
  28. #elif CONFIG_IDF_TARGET_ESP32S2
  29. #define MASTER_WS_IO 28
  30. #define DATA_OUT_IO 20
  31. #endif
  32. #define PERCENT_DIFF 0.0001
  33. #define I2S_TEST_MODE_SLAVE_TO_MAXTER 0
  34. #define I2S_TEST_MODE_MASTER_TO_SLAVE 1
  35. #define I2S_TEST_MODE_LOOPBACK 2
  36. // mode: 0, master rx, slave tx. mode: 1, master tx, slave rx. mode: 2, master tx rx loopback
  37. // Since ESP32-S2 has only one I2S, only loop back test can be tested.
  38. static void i2s_test_io_config(int mode)
  39. {
  40. // Connect internal signals using IO matrix.
  41. gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[MASTER_BCK_IO], PIN_FUNC_GPIO);
  42. gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[MASTER_WS_IO], PIN_FUNC_GPIO);
  43. gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[DATA_OUT_IO], PIN_FUNC_GPIO);
  44. gpio_set_direction(MASTER_BCK_IO, GPIO_MODE_INPUT_OUTPUT);
  45. gpio_set_direction(MASTER_WS_IO, GPIO_MODE_INPUT_OUTPUT);
  46. gpio_set_direction(DATA_OUT_IO, GPIO_MODE_INPUT_OUTPUT);
  47. switch (mode) {
  48. #if SOC_I2S_NUM > 1
  49. case I2S_TEST_MODE_SLAVE_TO_MAXTER: {
  50. esp_rom_gpio_connect_out_signal(MASTER_BCK_IO, I2S0I_BCK_OUT_IDX, 0, 0);
  51. esp_rom_gpio_connect_in_signal(MASTER_BCK_IO, I2S1O_BCK_IN_IDX, 0);
  52. esp_rom_gpio_connect_out_signal(MASTER_WS_IO, I2S0I_WS_OUT_IDX, 0, 0);
  53. esp_rom_gpio_connect_in_signal(MASTER_WS_IO, I2S1O_WS_IN_IDX, 0);
  54. esp_rom_gpio_connect_out_signal(DATA_OUT_IO, I2S1O_DATA_OUT23_IDX, 0, 0);
  55. esp_rom_gpio_connect_in_signal(DATA_OUT_IO, I2S0I_DATA_IN15_IDX, 0);
  56. }
  57. break;
  58. case I2S_TEST_MODE_MASTER_TO_SLAVE: {
  59. esp_rom_gpio_connect_out_signal(MASTER_BCK_IO, I2S0O_BCK_OUT_IDX, 0, 0);
  60. esp_rom_gpio_connect_in_signal(MASTER_BCK_IO, I2S1I_BCK_IN_IDX, 0);
  61. esp_rom_gpio_connect_out_signal(MASTER_WS_IO, I2S0O_WS_OUT_IDX, 0, 0);
  62. esp_rom_gpio_connect_in_signal(MASTER_WS_IO, I2S1I_WS_IN_IDX, 0);
  63. esp_rom_gpio_connect_out_signal(DATA_OUT_IO, I2S0O_DATA_OUT23_IDX, 0, 0);
  64. esp_rom_gpio_connect_in_signal(DATA_OUT_IO, I2S1I_DATA_IN15_IDX, 0);
  65. }
  66. break;
  67. #endif
  68. case I2S_TEST_MODE_LOOPBACK: {
  69. esp_rom_gpio_connect_out_signal(DATA_OUT_IO, I2S0O_DATA_OUT23_IDX, 0, 0);
  70. esp_rom_gpio_connect_in_signal(DATA_OUT_IO, I2S0I_DATA_IN15_IDX, 0);
  71. }
  72. break;
  73. default: {
  74. TEST_FAIL_MESSAGE("error: mode not supported");
  75. }
  76. break;
  77. }
  78. }
  79. /**
  80. * i2s initialize test
  81. * 1. i2s_driver_install
  82. * 2. i2s_set_pin
  83. */
  84. TEST_CASE("I2S basic driver install, uninstall, set pin test", "[i2s]")
  85. {
  86. // dac, adc i2s
  87. i2s_config_t i2s_config = {
  88. .mode = I2S_MODE_MASTER | I2S_MODE_TX,
  89. .sample_rate = SAMPLE_RATE,
  90. .bits_per_sample = SAMPLE_BITS,
  91. .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
  92. .communication_format = I2S_COMM_FORMAT_STAND_I2S,
  93. .dma_buf_count = 6,
  94. .dma_buf_len = 60,
  95. .use_apll = 0,
  96. .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
  97. };
  98. #if CONFIG_IDF_TARGET_ESP32
  99. //install and start i2s driver
  100. TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
  101. //for internal DAC, this will enable both of the internal channels
  102. TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, NULL));
  103. //stop & destroy i2s driver
  104. TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
  105. #endif
  106. // normal i2s
  107. i2s_pin_config_t pin_config = {
  108. .bck_io_num = MASTER_BCK_IO,
  109. .ws_io_num = MASTER_WS_IO,
  110. .data_out_num = DATA_OUT_IO,
  111. .data_in_num = -1
  112. };
  113. TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
  114. TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &pin_config));
  115. TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
  116. //error param test
  117. TEST_ASSERT(i2s_driver_install(I2S_NUM_MAX, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG);
  118. TEST_ASSERT(i2s_driver_install(I2S_NUM_0, NULL, 0, NULL) == ESP_ERR_INVALID_ARG);
  119. i2s_config.dma_buf_count = 1;
  120. TEST_ASSERT(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG);
  121. i2s_config.dma_buf_count = 129;
  122. TEST_ASSERT(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG);
  123. TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
  124. }
  125. TEST_CASE("I2S Loopback test(master tx and rx)", "[i2s]")
  126. {
  127. // master driver installed and send data
  128. i2s_config_t master_i2s_config = {
  129. .mode = I2S_MODE_MASTER | I2S_MODE_TX | I2S_MODE_RX,
  130. .sample_rate = SAMPLE_RATE,
  131. .bits_per_sample = SAMPLE_BITS,
  132. .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
  133. .communication_format = I2S_COMM_FORMAT_STAND_I2S,
  134. .dma_buf_count = 6,
  135. .dma_buf_len = 100,
  136. .use_apll = 0,
  137. .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
  138. };
  139. i2s_pin_config_t master_pin_config = {
  140. .bck_io_num = MASTER_BCK_IO,
  141. .ws_io_num = MASTER_WS_IO,
  142. .data_out_num = DATA_OUT_IO,
  143. .data_in_num = DATA_IN_IO
  144. };
  145. TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
  146. TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
  147. i2s_test_io_config(I2S_TEST_MODE_LOOPBACK);
  148. printf("\r\nheap size: %d\n", esp_get_free_heap_size());
  149. uint8_t* data_wr = (uint8_t*)malloc(sizeof(uint8_t)*400);
  150. size_t i2s_bytes_write = 0;
  151. size_t bytes_read = 0;
  152. int length = 0;
  153. uint8_t *i2s_read_buff = (uint8_t*)malloc(sizeof(uint8_t)*10000);
  154. for(int i=0; i<100; i++) {
  155. data_wr[i] = i+1;
  156. }
  157. int flag=0; // break loop flag
  158. int end_position = 0;
  159. // write data to slave
  160. i2s_write(I2S_NUM_0, data_wr, sizeof(uint8_t)*400, &i2s_bytes_write, 1000 / portTICK_PERIOD_MS);
  161. while(!flag){
  162. if (length >= 10000 - 500) {
  163. break;
  164. }
  165. i2s_read(I2S_NUM_0, i2s_read_buff + length, sizeof(uint8_t)*500, &bytes_read, 1000/portMAX_DELAY);
  166. if(bytes_read>0) {
  167. printf("read data size: %d\n", bytes_read);
  168. for(int i=length; i<length + bytes_read; i++) {
  169. if(i2s_read_buff[i] == 100) {
  170. flag=1;
  171. end_position = i;
  172. break;
  173. }
  174. }
  175. }
  176. length = length + bytes_read;
  177. }
  178. // test the read data right or not
  179. for(int i=end_position-99; i<=end_position; i++) {
  180. TEST_ASSERT_EQUAL_UINT8((i-end_position+100), *(i2s_read_buff + i));
  181. }
  182. free(data_wr);
  183. free(i2s_read_buff);
  184. i2s_driver_uninstall(I2S_NUM_0);
  185. }
  186. #if !DISABLED_FOR_TARGETS(ESP32S2)
  187. /* ESP32S2 has only single I2S port and hence following test cases are not applicable */
  188. TEST_CASE("I2S adc test", "[i2s]")
  189. {
  190. // init I2S ADC
  191. i2s_config_t i2s_config = {
  192. .mode = I2S_MODE_MASTER | I2S_MODE_RX | I2S_MODE_ADC_BUILT_IN,
  193. .sample_rate = SAMPLE_RATE,
  194. .bits_per_sample = SAMPLE_BITS,
  195. .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
  196. .intr_alloc_flags = 0,
  197. .dma_buf_count = 2,
  198. .dma_buf_len = 1024,
  199. .use_apll = 0,
  200. };
  201. // install and start I2S driver
  202. i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL);
  203. // init ADC pad
  204. i2s_set_adc_mode(ADC_UNIT_1, ADC1_CHANNEL_4);
  205. // enable adc sampling, ADC_WIDTH_BIT_12, ADC_ATTEN_DB_11 hard-coded in adc_i2s_mode_init
  206. i2s_adc_enable(I2S_NUM_0);
  207. // init read buffer
  208. uint16_t* i2sReadBuffer = (uint16_t*)calloc(1024, sizeof(uint16_t));
  209. size_t bytesRead;
  210. for (int loop = 0; loop < 10; loop++) {
  211. for (int level = 0; level <= 1; level++) {
  212. if (level == 0) {
  213. gpio_set_pull_mode(ADC1_CHANNEL_4_IO, GPIO_PULLDOWN_ONLY);
  214. } else {
  215. gpio_set_pull_mode(ADC1_CHANNEL_4_IO, GPIO_PULLUP_ONLY);
  216. }
  217. vTaskDelay(200 / portTICK_RATE_MS);
  218. // read data from adc, will block until buffer is full
  219. i2s_read(I2S_NUM_0, (void*)i2sReadBuffer, 1024 * sizeof(uint16_t), &bytesRead, portMAX_DELAY);
  220. // calc average
  221. int64_t adcSumValue = 0;
  222. for (size_t i = 0; i < 1024; i++) {
  223. adcSumValue += i2sReadBuffer[i] & 0xfff;
  224. }
  225. int adcAvgValue = adcSumValue / 1024;
  226. printf("adc average val: %d\n", adcAvgValue);
  227. if (level == 0) {
  228. TEST_ASSERT_LESS_THAN(100, adcAvgValue);
  229. } else {
  230. TEST_ASSERT_GREATER_THAN(4000, adcAvgValue);
  231. }
  232. }
  233. }
  234. i2s_adc_disable(I2S_NUM_0);
  235. free(i2sReadBuffer);
  236. i2s_driver_uninstall(I2S_NUM_0);
  237. }
  238. TEST_CASE("I2S write and read test(master tx and slave rx)", "[i2s]")
  239. {
  240. // master driver installed and send data
  241. i2s_config_t master_i2s_config = {
  242. .mode = I2S_MODE_MASTER | I2S_MODE_TX,
  243. .sample_rate = SAMPLE_RATE,
  244. .bits_per_sample = SAMPLE_BITS,
  245. .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
  246. .communication_format = I2S_COMM_FORMAT_STAND_I2S,
  247. .dma_buf_count = 6,
  248. .dma_buf_len = 100,
  249. .use_apll = 0,
  250. .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
  251. };
  252. i2s_pin_config_t master_pin_config = {
  253. .bck_io_num = MASTER_BCK_IO,
  254. .ws_io_num = MASTER_WS_IO,
  255. .data_out_num = DATA_OUT_IO,
  256. .data_in_num = -1
  257. };
  258. TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
  259. TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
  260. i2s_test_io_config(I2S_TEST_MODE_MASTER_TO_SLAVE);
  261. printf("\r\nheap size: %d\n", esp_get_free_heap_size());
  262. i2s_config_t slave_i2s_config = {
  263. .mode = I2S_MODE_SLAVE | I2S_MODE_RX,
  264. .sample_rate = SAMPLE_RATE,
  265. .bits_per_sample = SAMPLE_BITS,
  266. .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
  267. .communication_format = I2S_COMM_FORMAT_STAND_I2S,
  268. .dma_buf_count = 6,
  269. .dma_buf_len = 100,
  270. .use_apll = 0,
  271. .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
  272. };
  273. i2s_pin_config_t slave_pin_config = {
  274. .bck_io_num = SLAVE_BCK_IO,
  275. .ws_io_num = SLAVE_WS_IO,
  276. .data_out_num = -1,
  277. .data_in_num = DATA_IN_IO,
  278. };
  279. // slave driver installed and receive data
  280. TEST_ESP_OK(i2s_driver_install(I2S_NUM_1, &slave_i2s_config, 0, NULL));
  281. TEST_ESP_OK(i2s_set_pin(I2S_NUM_1, &slave_pin_config));
  282. i2s_test_io_config(I2S_TEST_MODE_MASTER_TO_SLAVE);
  283. printf("\r\nheap size: %d\n", esp_get_free_heap_size());
  284. uint8_t* data_wr = (uint8_t*)malloc(sizeof(uint8_t)*400);
  285. size_t i2s_bytes_write = 0;
  286. size_t bytes_read = 0;
  287. int length = 0;
  288. uint8_t *i2s_read_buff = (uint8_t*)malloc(sizeof(uint8_t)*10000);
  289. for(int i=0; i<100; i++) {
  290. data_wr[i] = i+1;
  291. }
  292. int flag=0; // break loop flag
  293. int end_position = 0;
  294. // write data to slave
  295. i2s_write(I2S_NUM_0, data_wr, sizeof(uint8_t)*400, &i2s_bytes_write, 1000 / portTICK_PERIOD_MS);
  296. while(!flag){
  297. i2s_read(I2S_NUM_1, i2s_read_buff + length, sizeof(uint8_t)*500, &bytes_read, 1000/portMAX_DELAY);
  298. if(bytes_read>0) {
  299. printf("read data size: %d\n", bytes_read);
  300. for(int i=length; i<length + bytes_read; i++) {
  301. if(i2s_read_buff[i] == 100) {
  302. flag=1;
  303. end_position = i;
  304. break;
  305. }
  306. }
  307. }
  308. length = length + bytes_read;
  309. }
  310. // test the readed data right or not
  311. for(int i=end_position-99; i<=end_position; i++) {
  312. TEST_ASSERT_EQUAL_UINT8((i-end_position+100), *(i2s_read_buff + i));
  313. }
  314. free(data_wr);
  315. free(i2s_read_buff);
  316. i2s_driver_uninstall(I2S_NUM_0);
  317. i2s_driver_uninstall(I2S_NUM_1);
  318. }
  319. TEST_CASE("I2S write and read test(master rx and slave tx)", "[i2s]")
  320. {
  321. // master driver installed and send data
  322. i2s_config_t master_i2s_config = {
  323. .mode = I2S_MODE_MASTER | I2S_MODE_RX,
  324. .sample_rate = SAMPLE_RATE,
  325. .bits_per_sample = SAMPLE_BITS,
  326. .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
  327. .communication_format = I2S_COMM_FORMAT_STAND_I2S,
  328. .dma_buf_count = 6,
  329. .dma_buf_len = 100,
  330. .use_apll = 1,
  331. .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
  332. };
  333. i2s_pin_config_t master_pin_config = {
  334. .bck_io_num = MASTER_BCK_IO,
  335. .ws_io_num = MASTER_WS_IO,
  336. .data_out_num = -1,
  337. .data_in_num = DATA_IN_IO,
  338. };
  339. TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
  340. TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
  341. i2s_test_io_config(I2S_TEST_MODE_SLAVE_TO_MAXTER);
  342. printf("\r\nheap size: %d\n", esp_get_free_heap_size());
  343. i2s_config_t slave_i2s_config = {
  344. .mode = I2S_MODE_SLAVE | I2S_MODE_TX, // Only RX
  345. .sample_rate = SAMPLE_RATE,
  346. .bits_per_sample = SAMPLE_BITS,
  347. .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, //2-channels
  348. .communication_format = I2S_COMM_FORMAT_STAND_I2S,
  349. .dma_buf_count = 6,
  350. .dma_buf_len = 100,
  351. .use_apll = 1,
  352. .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
  353. };
  354. i2s_pin_config_t slave_pin_config = {
  355. .bck_io_num = SLAVE_BCK_IO,
  356. .ws_io_num = SLAVE_WS_IO,
  357. .data_out_num = DATA_OUT_IO,
  358. .data_in_num = -1
  359. };
  360. // slave driver installed and receive data
  361. TEST_ESP_OK(i2s_driver_install(I2S_NUM_1, &slave_i2s_config, 0, NULL));
  362. TEST_ESP_OK(i2s_set_pin(I2S_NUM_1, &slave_pin_config));
  363. i2s_test_io_config(I2S_TEST_MODE_SLAVE_TO_MAXTER);
  364. uint8_t* data_wr = (uint8_t*)malloc(sizeof(uint8_t)*400);
  365. size_t i2s_bytes_write = 0;
  366. size_t bytes_read = 0;
  367. int length = 0;
  368. uint8_t *i2s_read_buff = (uint8_t*)malloc(sizeof(uint8_t)*100000);
  369. for(int i=0; i<100; i++) {
  370. data_wr[i] = i+1;
  371. }
  372. // slave write data to master
  373. i2s_write(I2S_NUM_1, data_wr, sizeof(uint8_t)*400, &i2s_bytes_write, 1000 / portTICK_PERIOD_MS);
  374. int flag=0; // break loop flag
  375. int end_position = 0;
  376. // write data to slave
  377. while(!flag){
  378. TEST_ESP_OK(i2s_read(I2S_NUM_0, i2s_read_buff + length, 10000-length, &bytes_read, 1000/portMAX_DELAY));
  379. if(bytes_read > 0) {
  380. for(int i=length; i<length+bytes_read; i++) {
  381. if(i2s_read_buff[i] == 100) {
  382. flag=1;
  383. end_position = i;
  384. break;
  385. }
  386. }
  387. }
  388. length = length + bytes_read;
  389. }
  390. // test the readed data right or not
  391. for(int i=end_position-99; i<=end_position; i++) {
  392. TEST_ASSERT_EQUAL_UINT8((i-end_position+100), *(i2s_read_buff + i));
  393. }
  394. free(data_wr);
  395. free(i2s_read_buff);
  396. i2s_driver_uninstall(I2S_NUM_0);
  397. i2s_driver_uninstall(I2S_NUM_1);
  398. }
  399. #endif
  400. TEST_CASE("I2S memory leaking test", "[i2s]")
  401. {
  402. i2s_config_t master_i2s_config = {
  403. .mode = I2S_MODE_MASTER | I2S_MODE_RX,
  404. .sample_rate = SAMPLE_RATE,
  405. .bits_per_sample = SAMPLE_BITS,
  406. .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
  407. .communication_format = I2S_COMM_FORMAT_STAND_I2S,
  408. .dma_buf_count = 6,
  409. .dma_buf_len = 100,
  410. .use_apll = 0,
  411. .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
  412. };
  413. i2s_pin_config_t master_pin_config = {
  414. .bck_io_num = MASTER_BCK_IO,
  415. .ws_io_num = MASTER_WS_IO,
  416. .data_out_num = -1,
  417. .data_in_num = DATA_IN_IO
  418. };
  419. TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
  420. TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
  421. i2s_driver_uninstall(I2S_NUM_0);
  422. int initial_size = esp_get_free_heap_size();
  423. for(int i=0; i<100; i++) {
  424. TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
  425. TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
  426. i2s_driver_uninstall(I2S_NUM_0);
  427. TEST_ASSERT(initial_size == esp_get_free_heap_size());
  428. }
  429. vTaskDelay(100 / portTICK_PERIOD_MS);
  430. TEST_ASSERT(initial_size == esp_get_free_heap_size());
  431. }
  432. /*
  433. * The I2S APLL clock variation test used to test the difference between the different sample rates, different bits per sample
  434. * and the APLL clock generate for it. The TEST_CASE passes PERCENT_DIFF variation from the provided sample rate in APLL generated clock
  435. * The percentage difference calculated as (mod((obtained clock rate - desired clock rate)/(desired clock rate))) * 100.
  436. */
  437. TEST_CASE("I2S APLL clock variation test", "[i2s]")
  438. {
  439. i2s_pin_config_t pin_config = {
  440. .bck_io_num = MASTER_BCK_IO,
  441. .ws_io_num = MASTER_WS_IO,
  442. .data_out_num = DATA_OUT_IO,
  443. .data_in_num = -1
  444. };
  445. i2s_config_t i2s_config = {
  446. .mode = I2S_MODE_MASTER | I2S_MODE_TX,
  447. .sample_rate = SAMPLE_RATE,
  448. .bits_per_sample = SAMPLE_BITS,
  449. .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
  450. .communication_format = I2S_COMM_FORMAT_STAND_I2S,
  451. .dma_buf_count = 6,
  452. .dma_buf_len = 60,
  453. .use_apll = true,
  454. .intr_alloc_flags = 0,
  455. };
  456. TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
  457. TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &pin_config));
  458. TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
  459. int initial_size = esp_get_free_heap_size();
  460. uint32_t sample_rate_arr[8] = { 10675, 11025, 16000, 22050, 32000, 44100, 48000, 96000 };
  461. int bits_per_sample_arr[3] = { 16, 24, 32 };
  462. for (int i = 0; i < (sizeof(sample_rate_arr)/sizeof(sample_rate_arr[0])); i++) {
  463. for (int j = 0; j < (sizeof(bits_per_sample_arr)/sizeof(bits_per_sample_arr[0])); j++) {
  464. i2s_config.sample_rate = sample_rate_arr[i];
  465. i2s_config.bits_per_sample = bits_per_sample_arr[j];
  466. TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
  467. TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &pin_config));
  468. TEST_ASSERT((fabs((i2s_get_clk(I2S_NUM_0) - sample_rate_arr[i]))/(sample_rate_arr[i]))*100 < PERCENT_DIFF);
  469. TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
  470. TEST_ASSERT(initial_size == esp_get_free_heap_size());
  471. }
  472. }
  473. vTaskDelay(100 / portTICK_PERIOD_MS);
  474. TEST_ASSERT(initial_size == esp_get_free_heap_size());
  475. }
  476. #endif