esp_flash_spi_init.c 10 KB

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  1. // Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. //
  7. // http://www.apache.org/licenses/LICENSE-2.0
  8. //
  9. // Unless required by applicable law or agreed to in writing, software
  10. // distributed under the License is distributed on an "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. // See the License for the specific language governing permissions and
  13. // limitations under the License.
  14. #include "sdkconfig.h"
  15. #include "esp_flash.h"
  16. #include "memspi_host_driver.h"
  17. #include "esp_flash_spi_init.h"
  18. #include "driver/gpio.h"
  19. #include "esp_rom_gpio.h"
  20. #include "esp_rom_efuse.h"
  21. #include "esp_log.h"
  22. #include "esp_heap_caps.h"
  23. #include "hal/spi_types.h"
  24. #include "driver/spi_common_internal.h"
  25. #include "hal/spi_flash_hal.h"
  26. #include "hal/gpio_hal.h"
  27. #include "esp_flash_internal.h"
  28. #include "esp_rom_gpio.h"
  29. #if CONFIG_IDF_TARGET_ESP32
  30. #include "esp32/rom/spi_flash.h"
  31. #elif CONFIG_IDF_TARGET_ESP32S2
  32. #include "esp32s2/rom/spi_flash.h"
  33. #elif CONFIG_IDF_TARGET_ESP32S3
  34. #include "esp32s3/rom/spi_flash.h"
  35. #elif CONFIG_IDF_TARGET_ESP32C3
  36. #include "esp32c3/rom/spi_flash.h"
  37. #endif
  38. __attribute__((unused)) static const char TAG[] = "spi_flash";
  39. #ifdef CONFIG_ESPTOOLPY_FLASHFREQ_80M
  40. #define DEFAULT_FLASH_SPEED ESP_FLASH_80MHZ
  41. #elif defined CONFIG_ESPTOOLPY_FLASHFREQ_40M
  42. #define DEFAULT_FLASH_SPEED ESP_FLASH_40MHZ
  43. #elif defined CONFIG_ESPTOOLPY_FLASHFREQ_26M
  44. #define DEFAULT_FLASH_SPEED ESP_FLASH_26MHZ
  45. #elif defined CONFIG_ESPTOOLPY_FLASHFREQ_20M
  46. #define DEFAULT_FLASH_SPEED ESP_FLASH_20MHZ
  47. #else
  48. #error Flash frequency not defined! Check the ``CONFIG_ESPTOOLPY_FLASHFREQ_*`` options.
  49. #endif
  50. #if defined(CONFIG_ESPTOOLPY_FLASHMODE_QIO)
  51. #define DEFAULT_FLASH_MODE SPI_FLASH_QIO
  52. #elif defined(CONFIG_ESPTOOLPY_FLASHMODE_QOUT)
  53. #define DEFAULT_FLASH_MODE SPI_FLASH_QOUT
  54. #elif defined(CONFIG_ESPTOOLPY_FLASHMODE_DIO)
  55. #define DEFAULT_FLASH_MODE SPI_FLASH_DIO
  56. #elif defined(CONFIG_ESPTOOLPY_FLASHMODE_DOUT)
  57. #define DEFAULT_FLASH_MODE SPI_FLASH_DOUT
  58. #else
  59. #define DEFAULT_FLASH_MODE SPI_FLASH_FASTRD
  60. #endif
  61. //TODO: modify cs hold to meet requirements of all chips!!!
  62. #if CONFIG_IDF_TARGET_ESP32
  63. #define ESP_FLASH_HOST_CONFIG_DEFAULT() (memspi_host_config_t){ \
  64. .host_id = SPI1_HOST,\
  65. .speed = DEFAULT_FLASH_SPEED, \
  66. .cs_num = 0, \
  67. .iomux = false, \
  68. .input_delay_ns = 0,\
  69. }
  70. #elif CONFIG_IDF_TARGET_ESP32S2
  71. #define ESP_FLASH_HOST_CONFIG_DEFAULT() (memspi_host_config_t){ \
  72. .host_id = SPI1_HOST,\
  73. .speed = DEFAULT_FLASH_SPEED, \
  74. .cs_num = 0, \
  75. .iomux = true, \
  76. .input_delay_ns = 0,\
  77. }
  78. #elif CONFIG_IDF_TARGET_ESP32S3
  79. #include "esp32s3/rom/efuse.h"
  80. #define ESP_FLASH_HOST_CONFIG_DEFAULT() (memspi_host_config_t){ \
  81. .host_id = SPI1_HOST,\
  82. .speed = DEFAULT_FLASH_SPEED, \
  83. .cs_num = 0, \
  84. .iomux = true, \
  85. .input_delay_ns = 0,\
  86. }
  87. #elif CONFIG_IDF_TARGET_ESP32C3
  88. #include "esp32c3/rom/efuse.h"
  89. #if !CONFIG_SPI_FLASH_AUTO_SUSPEND
  90. #define ESP_FLASH_HOST_CONFIG_DEFAULT() (memspi_host_config_t){ \
  91. .host_id = SPI1_HOST,\
  92. .speed = DEFAULT_FLASH_SPEED, \
  93. .cs_num = 0, \
  94. .iomux = true, \
  95. .input_delay_ns = 0,\
  96. }
  97. #else
  98. #define ESP_FLASH_HOST_CONFIG_DEFAULT() (memspi_host_config_t){ \
  99. .host_id = SPI1_HOST,\
  100. .speed = DEFAULT_FLASH_SPEED, \
  101. .cs_num = 0, \
  102. .iomux = true, \
  103. .input_delay_ns = 0,\
  104. .auto_sus_en = true,\
  105. }
  106. #endif //!CONFIG_SPI_FLASH_AUTO_SUSPEND
  107. #endif
  108. static IRAM_ATTR NOINLINE_ATTR void cs_initialize(esp_flash_t *chip, const esp_flash_spi_device_config_t *config, bool use_iomux, int cs_id)
  109. {
  110. //Not using spicommon_cs_initialize since we don't want to put the whole
  111. //spi_periph_signal into the DRAM. Copy these data from flash before the
  112. //cache disabling
  113. int cs_io_num = config->cs_io_num;
  114. int spics_in = spi_periph_signal[config->host_id].spics_in;
  115. int spics_out = spi_periph_signal[config->host_id].spics_out[cs_id];
  116. int spics_func = spi_periph_signal[config->host_id].func;
  117. uint32_t iomux_reg = GPIO_PIN_MUX_REG[cs_io_num];
  118. //To avoid the panic caused by flash data line conflicts during cs line
  119. //initialization, disable the cache temporarily
  120. chip->os_func->start(chip->os_func_data);
  121. PIN_INPUT_ENABLE(iomux_reg);
  122. if (use_iomux) {
  123. gpio_hal_iomux_func_sel(iomux_reg, spics_func);
  124. } else {
  125. #if SOC_GPIO_PIN_COUNT <= 32
  126. GPIO.enable_w1ts.val = (0x1 << cs_io_num);
  127. #else
  128. if (cs_io_num < 32) {
  129. GPIO.enable_w1ts = (0x1 << cs_io_num);
  130. } else {
  131. GPIO.enable1_w1ts.data = (0x1 << (cs_io_num - 32));
  132. }
  133. #endif
  134. GPIO.pin[cs_io_num].pad_driver = 0;
  135. esp_rom_gpio_connect_out_signal(cs_io_num, spics_out, false, false);
  136. if (cs_id == 0) {
  137. esp_rom_gpio_connect_in_signal(cs_io_num, spics_in, false);
  138. }
  139. gpio_hal_iomux_func_sel(iomux_reg, PIN_FUNC_GPIO);
  140. }
  141. chip->os_func->end(chip->os_func_data);
  142. }
  143. esp_err_t spi_bus_add_flash_device(esp_flash_t **out_chip, const esp_flash_spi_device_config_t *config)
  144. {
  145. if (out_chip == NULL) {
  146. return ESP_ERR_INVALID_ARG;
  147. }
  148. if (!GPIO_IS_VALID_OUTPUT_GPIO(config->cs_io_num)) {
  149. return ESP_ERR_INVALID_ARG;
  150. }
  151. esp_flash_t *chip = NULL;
  152. memspi_host_inst_t *host = NULL;
  153. esp_err_t ret = ESP_OK;
  154. uint32_t caps = MALLOC_CAP_DEFAULT;
  155. if (config->host_id == SPI1_HOST) caps = MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT;
  156. chip = (esp_flash_t*)heap_caps_malloc(sizeof(esp_flash_t), caps);
  157. if (!chip) {
  158. ret = ESP_ERR_NO_MEM;
  159. goto fail;
  160. }
  161. host = (memspi_host_inst_t*)heap_caps_malloc(sizeof(memspi_host_inst_t), caps);
  162. *chip = (esp_flash_t) {
  163. .read_mode = config->io_mode,
  164. .host = (spi_flash_host_inst_t*)host,
  165. };
  166. if (!host) {
  167. ret = ESP_ERR_NO_MEM;
  168. goto fail;
  169. }
  170. int dev_id = -1;
  171. esp_err_t err = esp_flash_init_os_functions(chip, config->host_id, &dev_id);
  172. if (err == ESP_ERR_NOT_SUPPORTED) {
  173. ESP_LOGE(TAG, "Init os functions failed! No free CS.");
  174. } else if (err == ESP_ERR_INVALID_ARG) {
  175. ESP_LOGE(TAG, "Init os functions failed! Bus lock not initialized (check CONFIG_SPI_FLASH_SHARE_SPI1_BUS).");
  176. }
  177. if (err != ESP_OK) {
  178. ret = err;
  179. goto fail;
  180. }
  181. // When `CONFIG_SPI_FLASH_SHARE_SPI1_BUS` is not enabled on SPI1 bus, the
  182. // `esp_flash_init_os_functions` will not be able to assign a new device ID. In this case, we
  183. // use the `cs_id` in the config structure.
  184. if (dev_id == -1 && config->host_id == SPI1_HOST) {
  185. dev_id = config->cs_id;
  186. }
  187. assert(dev_id < SOC_SPI_PERIPH_CS_NUM(config->host_id) && dev_id >= 0);
  188. bool use_iomux = spicommon_bus_using_iomux(config->host_id);
  189. memspi_host_config_t host_cfg = {
  190. .host_id = config->host_id,
  191. .cs_num = dev_id,
  192. .iomux = use_iomux,
  193. .input_delay_ns = config->input_delay_ns,
  194. .speed = config->speed,
  195. };
  196. err = memspi_host_init_pointers(host, &host_cfg);
  197. if (err != ESP_OK) {
  198. ret = err;
  199. goto fail;
  200. }
  201. // The cs_id inside `config` is deprecated, use the `dev_id` provided by the bus lock instead.
  202. cs_initialize(chip, config, use_iomux, dev_id);
  203. *out_chip = chip;
  204. return ret;
  205. fail:
  206. // The memory allocated are free'd in the `spi_bus_remove_flash_device`.
  207. spi_bus_remove_flash_device(chip);
  208. return ret;
  209. }
  210. esp_err_t spi_bus_remove_flash_device(esp_flash_t *chip)
  211. {
  212. if (chip==NULL) {
  213. return ESP_ERR_INVALID_ARG;
  214. }
  215. esp_flash_deinit_os_functions(chip);
  216. free(chip->host);
  217. free(chip);
  218. return ESP_OK;
  219. }
  220. /* The default (ie initial boot) no-OS ROM esp_flash_os_functions_t */
  221. extern const esp_flash_os_functions_t esp_flash_noos_functions;
  222. /* This pointer is defined in ROM and extern-ed on targets where CONFIG_SPI_FLASH_ROM_IMPL = y*/
  223. #if !CONFIG_SPI_FLASH_ROM_IMPL
  224. esp_flash_t *esp_flash_default_chip = NULL;
  225. #endif
  226. #ifndef CONFIG_SPI_FLASH_USE_LEGACY_IMPL
  227. static DRAM_ATTR memspi_host_inst_t esp_flash_default_host;
  228. static DRAM_ATTR esp_flash_t default_chip = {
  229. .read_mode = DEFAULT_FLASH_MODE,
  230. .host = (spi_flash_host_inst_t*)&esp_flash_default_host,
  231. .os_func = &esp_flash_noos_functions,
  232. };
  233. extern esp_err_t esp_flash_suspend_cmd_init(esp_flash_t* chip);
  234. esp_err_t esp_flash_init_default_chip(void)
  235. {
  236. const esp_rom_spiflash_chip_t *legacy_chip = &g_rom_flashchip;
  237. memspi_host_config_t cfg = ESP_FLASH_HOST_CONFIG_DEFAULT();
  238. #if !CONFIG_IDF_TARGET_ESP32
  239. // For esp32s2 spi IOs are configured as from IO MUX by default
  240. cfg.iomux = esp_rom_efuse_get_flash_gpio_info() == 0 ? true : false;
  241. #endif
  242. //the host is already initialized, only do init for the data and load it to the host
  243. esp_err_t err = memspi_host_init_pointers(&esp_flash_default_host, &cfg);
  244. if (err != ESP_OK) {
  245. return err;
  246. }
  247. // ROM TODO: account for non-standard default pins in efuse
  248. // ROM TODO: to account for chips which are slow to power on, maybe keep probing in a loop here
  249. err = esp_flash_init(&default_chip);
  250. if (err != ESP_OK) {
  251. return err;
  252. }
  253. if (default_chip.size < legacy_chip->chip_size) {
  254. ESP_EARLY_LOGE(TAG, "Detected size(%dk) smaller than the size in the binary image header(%dk). Probe failed.", default_chip.size/1024, legacy_chip->chip_size/1024);
  255. return ESP_ERR_FLASH_SIZE_NOT_MATCH;
  256. }
  257. if (default_chip.size > legacy_chip->chip_size) {
  258. ESP_EARLY_LOGW(TAG, "Detected size(%dk) larger than the size in the binary image header(%dk). Using the size in the binary image header.", default_chip.size/1024, legacy_chip->chip_size/1024);
  259. }
  260. default_chip.size = legacy_chip->chip_size;
  261. esp_flash_default_chip = &default_chip;
  262. #ifdef CONFIG_SPI_FLASH_AUTO_SUSPEND
  263. err = esp_flash_suspend_cmd_init(&default_chip);
  264. if (err != ESP_OK) {
  265. return err;
  266. }
  267. #endif
  268. return ESP_OK;
  269. }
  270. esp_err_t esp_flash_app_init(void)
  271. {
  272. esp_err_t err = ESP_OK;
  273. #if CONFIG_SPI_FLASH_SHARE_SPI1_BUS
  274. err = esp_flash_init_main_bus_lock();
  275. if (err != ESP_OK) return err;
  276. #endif
  277. err = esp_flash_app_enable_os_functions(&default_chip);
  278. return err;
  279. }
  280. #endif //!CONFIG_SPI_FLASH_USE_LEGACY_IMPL