stdatomic.c 4.4 KB

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  1. // Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. //
  7. // http://www.apache.org/licenses/LICENSE-2.0
  8. //
  9. // Unless required by applicable law or agreed to in writing, software
  10. // distributed under the License is distributed on an "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. // See the License for the specific language governing permissions and
  13. // limitations under the License.
  14. //replacement for gcc built-in functions
  15. #include "sdkconfig.h"
  16. #include <stdbool.h>
  17. #include <stdint.h>
  18. #ifdef __XTENSA__
  19. #include "xtensa/config/core-isa.h"
  20. #include "xtensa/xtruntime.h"
  21. // This allows nested interrupts disabling and restoring via local registers or stack.
  22. // They can be called from interrupts too.
  23. // WARNING: Only applies to current CPU.
  24. #define _ATOMIC_ENTER_CRITICAL(void) ({ \
  25. unsigned state = XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL); \
  26. atomic_benchmark_intr_disable(); \
  27. state; \
  28. })
  29. #define _ATOMIC_EXIT_CRITICAL(state) do { \
  30. atomic_benchmark_intr_restore(state); \
  31. XTOS_RESTORE_JUST_INTLEVEL(state); \
  32. } while (0)
  33. #ifndef XCHAL_HAVE_S32C1I
  34. #error "XCHAL_HAVE_S32C1I not defined, include correct header!"
  35. #endif
  36. #define NO_ATOMICS_SUPPORT (XCHAL_HAVE_S32C1I == 0)
  37. #else // RISCV
  38. #include "freertos/portmacro.h"
  39. // This allows nested interrupts disabling and restoring via local registers or stack.
  40. // They can be called from interrupts too.
  41. // WARNING: Only applies to current CPU.
  42. #define _ATOMIC_ENTER_CRITICAL(void) ({ \
  43. unsigned state = portENTER_CRITICAL_NESTED(); \
  44. atomic_benchmark_intr_disable(); \
  45. state; \
  46. })
  47. #define _ATOMIC_EXIT_CRITICAL(state) do { \
  48. atomic_benchmark_intr_restore(state); \
  49. portEXIT_CRITICAL_NESTED(state); \
  50. } while (0)
  51. #define NO_ATOMICS_SUPPORT 1 // [todo] Get the equivalent XCHAL_HAVE_S32C1I check for RISCV
  52. #endif
  53. //reserved to measure atomic operation time
  54. #define atomic_benchmark_intr_disable()
  55. #define atomic_benchmark_intr_restore(STATE)
  56. #define CMP_EXCHANGE(n, type) bool __atomic_compare_exchange_ ## n (type* mem, type* expect, type desired, int success, int failure) \
  57. { \
  58. bool ret = false; \
  59. unsigned state = _ATOMIC_ENTER_CRITICAL(); \
  60. if (*mem == *expect) { \
  61. ret = true; \
  62. *mem = desired; \
  63. } else { \
  64. *expect = *mem; \
  65. } \
  66. _ATOMIC_EXIT_CRITICAL(state); \
  67. return ret; \
  68. }
  69. #define FETCH_ADD(n, type) type __atomic_fetch_add_ ## n (type* ptr, type value, int memorder) \
  70. { \
  71. unsigned state = _ATOMIC_ENTER_CRITICAL(); \
  72. type ret = *ptr; \
  73. *ptr = *ptr + value; \
  74. _ATOMIC_EXIT_CRITICAL(state); \
  75. return ret; \
  76. }
  77. #define FETCH_SUB(n, type) type __atomic_fetch_sub_ ## n (type* ptr, type value, int memorder) \
  78. { \
  79. unsigned state = _ATOMIC_ENTER_CRITICAL(); \
  80. type ret = *ptr; \
  81. *ptr = *ptr - value; \
  82. _ATOMIC_EXIT_CRITICAL(state); \
  83. return ret; \
  84. }
  85. #define FETCH_AND(n, type) type __atomic_fetch_and_ ## n (type* ptr, type value, int memorder) \
  86. { \
  87. unsigned state = _ATOMIC_ENTER_CRITICAL(); \
  88. type ret = *ptr; \
  89. *ptr = *ptr & value; \
  90. _ATOMIC_EXIT_CRITICAL(state); \
  91. return ret; \
  92. }
  93. #define FETCH_OR(n, type) type __atomic_fetch_or_ ## n (type* ptr, type value, int memorder) \
  94. { \
  95. unsigned state = _ATOMIC_ENTER_CRITICAL(); \
  96. type ret = *ptr; \
  97. *ptr = *ptr | value; \
  98. _ATOMIC_EXIT_CRITICAL(state); \
  99. return ret; \
  100. }
  101. #define FETCH_XOR(n, type) type __atomic_fetch_xor_ ## n (type* ptr, type value, int memorder) \
  102. { \
  103. unsigned state = _ATOMIC_ENTER_CRITICAL(); \
  104. type ret = *ptr; \
  105. *ptr = *ptr ^ value; \
  106. _ATOMIC_EXIT_CRITICAL(state); \
  107. return ret; \
  108. }
  109. #pragma GCC diagnostic ignored "-Wbuiltin-declaration-mismatch"
  110. #if NO_ATOMICS_SUPPORT
  111. CMP_EXCHANGE(1, uint8_t)
  112. CMP_EXCHANGE(2, uint16_t)
  113. CMP_EXCHANGE(4, uint32_t)
  114. CMP_EXCHANGE(8, uint64_t)
  115. FETCH_ADD(1, uint8_t)
  116. FETCH_ADD(2, uint16_t)
  117. FETCH_ADD(4, uint32_t)
  118. FETCH_ADD(8, uint64_t)
  119. FETCH_SUB(1, uint8_t)
  120. FETCH_SUB(2, uint16_t)
  121. FETCH_SUB(4, uint32_t)
  122. FETCH_SUB(8, uint64_t)
  123. FETCH_AND(1, uint8_t)
  124. FETCH_AND(2, uint16_t)
  125. FETCH_AND(4, uint32_t)
  126. FETCH_AND(8, uint64_t)
  127. FETCH_OR(1, uint8_t)
  128. FETCH_OR(2, uint16_t)
  129. FETCH_OR(4, uint32_t)
  130. FETCH_OR(8, uint64_t)
  131. FETCH_XOR(1, uint8_t)
  132. FETCH_XOR(2, uint16_t)
  133. FETCH_XOR(4, uint32_t)
  134. FETCH_XOR(8, uint64_t)
  135. #endif