timer.c 23 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include <string.h>
  7. #include "esp_log.h"
  8. #include "esp_err.h"
  9. #include "esp_check.h"
  10. #include "esp_intr_alloc.h"
  11. #include "freertos/FreeRTOS.h"
  12. #include "driver/timer.h"
  13. #include "driver/periph_ctrl.h"
  14. #include "hal/timer_hal.h"
  15. #include "soc/timer_periph.h"
  16. #include "soc/rtc.h"
  17. static const char *TIMER_TAG = "timer_group";
  18. #define TIMER_GROUP_NUM_ERROR "TIMER GROUP NUM ERROR"
  19. #define TIMER_NUM_ERROR "HW TIMER NUM ERROR"
  20. #define TIMER_PARAM_ADDR_ERROR "HW TIMER PARAM ADDR ERROR"
  21. #define TIMER_NEVER_INIT_ERROR "HW TIMER NEVER INIT ERROR"
  22. #define TIMER_COUNT_DIR_ERROR "HW TIMER COUNTER DIR ERROR"
  23. #define TIMER_AUTORELOAD_ERROR "HW TIMER AUTORELOAD ERROR"
  24. #define TIMER_SCALE_ERROR "HW TIMER SCALE ERROR"
  25. #define TIMER_ALARM_ERROR "HW TIMER ALARM ERROR"
  26. #define DIVIDER_RANGE_ERROR "HW TIMER divider outside of [2, 65536] range error"
  27. #define TIMER_ENTER_CRITICAL(mux) portENTER_CRITICAL_SAFE(mux);
  28. #define TIMER_EXIT_CRITICAL(mux) portEXIT_CRITICAL_SAFE(mux);
  29. typedef struct {
  30. timer_isr_t fn; /*!< isr function */
  31. void *args; /*!< isr function args */
  32. timer_isr_handle_t timer_isr_handle; /*!< interrupt handle */
  33. timer_group_t isr_timer_group; /*!< timer group of interrupt triggered */
  34. } timer_isr_func_t;
  35. typedef struct {
  36. timer_hal_context_t hal;
  37. timer_isr_func_t timer_isr_fun;
  38. } timer_obj_t;
  39. static timer_obj_t *p_timer_obj[TIMER_GROUP_MAX][TIMER_MAX] = {0};
  40. static portMUX_TYPE timer_spinlock[TIMER_GROUP_MAX] = {portMUX_INITIALIZER_UNLOCKED, portMUX_INITIALIZER_UNLOCKED};
  41. esp_err_t timer_get_counter_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t *timer_val)
  42. {
  43. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  44. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  45. ESP_RETURN_ON_FALSE(timer_val != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
  46. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  47. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  48. timer_hal_get_counter_value(&(p_timer_obj[group_num][timer_num]->hal), timer_val);
  49. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  50. return ESP_OK;
  51. }
  52. esp_err_t timer_get_counter_time_sec(timer_group_t group_num, timer_idx_t timer_num, double *time)
  53. {
  54. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  55. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  56. ESP_RETURN_ON_FALSE(time != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
  57. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  58. uint64_t timer_val;
  59. esp_err_t err = timer_get_counter_value(group_num, timer_num, &timer_val);
  60. if (err == ESP_OK) {
  61. uint32_t div;
  62. timer_hal_get_divider(&(p_timer_obj[group_num][timer_num]->hal), &div);
  63. *time = (double)timer_val * div / rtc_clk_apb_freq_get();
  64. #if SOC_TIMER_GROUP_SUPPORT_XTAL
  65. if (timer_hal_get_use_xtal(&(p_timer_obj[group_num][timer_num]->hal))) {
  66. *time = (double)timer_val * div / ((int)rtc_clk_xtal_freq_get() * 1000000);
  67. }
  68. #endif
  69. }
  70. return err;
  71. }
  72. esp_err_t timer_set_counter_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t load_val)
  73. {
  74. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  75. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  76. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  77. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  78. timer_hal_set_counter_value(&(p_timer_obj[group_num][timer_num]->hal), load_val);
  79. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  80. return ESP_OK;
  81. }
  82. esp_err_t timer_start(timer_group_t group_num, timer_idx_t timer_num)
  83. {
  84. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  85. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  86. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  87. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  88. timer_hal_set_counter_enable(&(p_timer_obj[group_num][timer_num]->hal), TIMER_START);
  89. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  90. return ESP_OK;
  91. }
  92. esp_err_t timer_pause(timer_group_t group_num, timer_idx_t timer_num)
  93. {
  94. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  95. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  96. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  97. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  98. timer_hal_set_counter_enable(&(p_timer_obj[group_num][timer_num]->hal), TIMER_PAUSE);
  99. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  100. return ESP_OK;
  101. }
  102. esp_err_t timer_set_counter_mode(timer_group_t group_num, timer_idx_t timer_num, timer_count_dir_t counter_dir)
  103. {
  104. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  105. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  106. ESP_RETURN_ON_FALSE(counter_dir < TIMER_COUNT_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_COUNT_DIR_ERROR);
  107. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  108. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  109. timer_hal_set_counter_increase(&(p_timer_obj[group_num][timer_num]->hal), counter_dir);
  110. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  111. return ESP_OK;
  112. }
  113. esp_err_t timer_set_auto_reload(timer_group_t group_num, timer_idx_t timer_num, timer_autoreload_t reload)
  114. {
  115. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  116. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  117. ESP_RETURN_ON_FALSE(reload < TIMER_AUTORELOAD_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_AUTORELOAD_ERROR);
  118. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  119. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  120. timer_hal_set_auto_reload(&(p_timer_obj[group_num][timer_num]->hal), reload);
  121. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  122. return ESP_OK;
  123. }
  124. esp_err_t timer_set_divider(timer_group_t group_num, timer_idx_t timer_num, uint32_t divider)
  125. {
  126. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  127. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  128. ESP_RETURN_ON_FALSE(divider > 1 && divider < 65537, ESP_ERR_INVALID_ARG, TIMER_TAG, DIVIDER_RANGE_ERROR);
  129. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  130. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  131. timer_hal_set_divider(&(p_timer_obj[group_num][timer_num]->hal), divider);
  132. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  133. return ESP_OK;
  134. }
  135. esp_err_t timer_set_alarm_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t alarm_value)
  136. {
  137. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  138. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  139. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  140. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  141. timer_hal_set_alarm_value(&(p_timer_obj[group_num][timer_num]->hal), alarm_value);
  142. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  143. return ESP_OK;
  144. }
  145. esp_err_t timer_get_alarm_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t *alarm_value)
  146. {
  147. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  148. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  149. ESP_RETURN_ON_FALSE(alarm_value != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
  150. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  151. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  152. timer_hal_get_alarm_value(&(p_timer_obj[group_num][timer_num]->hal), alarm_value);
  153. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  154. return ESP_OK;
  155. }
  156. esp_err_t timer_set_alarm(timer_group_t group_num, timer_idx_t timer_num, timer_alarm_t alarm_en)
  157. {
  158. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  159. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  160. ESP_RETURN_ON_FALSE(alarm_en < TIMER_ALARM_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_ALARM_ERROR);
  161. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  162. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  163. timer_hal_set_alarm_enable(&(p_timer_obj[group_num][timer_num]->hal), alarm_en);
  164. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  165. return ESP_OK;
  166. }
  167. static void IRAM_ATTR timer_isr_default(void *arg)
  168. {
  169. bool is_awoken = false;
  170. timer_obj_t *timer_obj = (timer_obj_t *)arg;
  171. if (timer_obj == NULL) {
  172. return;
  173. }
  174. if (timer_obj->timer_isr_fun.fn == NULL) {
  175. return;
  176. }
  177. TIMER_ENTER_CRITICAL(&timer_spinlock[timer_obj->timer_isr_fun.isr_timer_group]);
  178. {
  179. uint32_t intr_status = 0;
  180. timer_hal_get_intr_status(&(timer_obj->hal), &intr_status);
  181. if (intr_status & BIT(timer_obj->hal.idx)) {
  182. is_awoken = timer_obj->timer_isr_fun.fn(timer_obj->timer_isr_fun.args);
  183. //Clear intrrupt status
  184. timer_hal_clear_intr_status(&(timer_obj->hal));
  185. //After the alarm has been triggered, we need enable it again, so it is triggered the next time.
  186. timer_hal_set_alarm_enable(&(timer_obj->hal), TIMER_ALARM_EN);
  187. }
  188. }
  189. TIMER_EXIT_CRITICAL(&timer_spinlock[timer_obj->timer_isr_fun.isr_timer_group]);
  190. if (is_awoken) {
  191. portYIELD_FROM_ISR();
  192. }
  193. }
  194. esp_err_t timer_isr_callback_add(timer_group_t group_num, timer_idx_t timer_num, timer_isr_t isr_handler, void *args, int intr_alloc_flags)
  195. {
  196. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  197. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  198. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  199. timer_disable_intr(group_num, timer_num);
  200. p_timer_obj[group_num][timer_num]->timer_isr_fun.fn = isr_handler;
  201. p_timer_obj[group_num][timer_num]->timer_isr_fun.args = args;
  202. p_timer_obj[group_num][timer_num]->timer_isr_fun.isr_timer_group = group_num;
  203. timer_isr_register(group_num, timer_num, timer_isr_default, (void *)p_timer_obj[group_num][timer_num],
  204. intr_alloc_flags, &(p_timer_obj[group_num][timer_num]->timer_isr_fun.timer_isr_handle));
  205. timer_enable_intr(group_num, timer_num);
  206. return ESP_OK;
  207. }
  208. esp_err_t timer_isr_callback_remove(timer_group_t group_num, timer_idx_t timer_num)
  209. {
  210. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  211. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  212. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  213. timer_disable_intr(group_num, timer_num);
  214. p_timer_obj[group_num][timer_num]->timer_isr_fun.fn = NULL;
  215. p_timer_obj[group_num][timer_num]->timer_isr_fun.args = NULL;
  216. esp_intr_free(p_timer_obj[group_num][timer_num]->timer_isr_fun.timer_isr_handle);
  217. return ESP_OK;
  218. }
  219. esp_err_t timer_isr_register(timer_group_t group_num, timer_idx_t timer_num,
  220. void (*fn)(void *), void *arg, int intr_alloc_flags, timer_isr_handle_t *handle)
  221. {
  222. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  223. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  224. ESP_RETURN_ON_FALSE(fn != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
  225. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  226. uint32_t status_reg = 0;
  227. uint32_t mask = 0;
  228. timer_hal_get_status_reg_mask_bit(&(p_timer_obj[group_num][timer_num]->hal), &status_reg, &mask);
  229. return esp_intr_alloc_intrstatus(timer_group_periph_signals.groups[group_num].t0_irq_id + timer_num, intr_alloc_flags, status_reg, mask, fn, arg, handle);
  230. }
  231. esp_err_t timer_init(timer_group_t group_num, timer_idx_t timer_num, const timer_config_t *config)
  232. {
  233. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  234. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  235. ESP_RETURN_ON_FALSE(config != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
  236. ESP_RETURN_ON_FALSE(config->divider > 1 && config->divider < 65537, ESP_ERR_INVALID_ARG, TIMER_TAG, DIVIDER_RANGE_ERROR);
  237. periph_module_enable(timer_group_periph_signals.groups[group_num].module);
  238. if (p_timer_obj[group_num][timer_num] == NULL) {
  239. p_timer_obj[group_num][timer_num] = (timer_obj_t *) heap_caps_calloc(1, sizeof(timer_obj_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
  240. if (p_timer_obj[group_num][timer_num] == NULL) {
  241. ESP_LOGE(TIMER_TAG, "TIMER driver malloc error");
  242. return ESP_FAIL;
  243. }
  244. }
  245. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  246. timer_hal_init(&(p_timer_obj[group_num][timer_num]->hal), group_num, timer_num);
  247. timer_hal_intr_disable(&(p_timer_obj[group_num][timer_num]->hal));
  248. timer_hal_clear_intr_status(&(p_timer_obj[group_num][timer_num]->hal));
  249. timer_hal_set_auto_reload(&(p_timer_obj[group_num][timer_num]->hal), config->auto_reload);
  250. timer_hal_set_divider(&(p_timer_obj[group_num][timer_num]->hal), config->divider);
  251. timer_hal_set_counter_increase(&(p_timer_obj[group_num][timer_num]->hal), config->counter_dir);
  252. timer_hal_set_alarm_enable(&(p_timer_obj[group_num][timer_num]->hal), config->alarm_en);
  253. timer_hal_set_level_int_enable(&(p_timer_obj[group_num][timer_num]->hal), true);
  254. if (config->intr_type != TIMER_INTR_LEVEL) {
  255. ESP_LOGW(TIMER_TAG, "only support Level Interrupt, switch to Level Interrupt instead");
  256. }
  257. timer_hal_set_counter_enable(&(p_timer_obj[group_num][timer_num]->hal), config->counter_en);
  258. #if SOC_TIMER_GROUP_SUPPORT_XTAL
  259. timer_hal_set_use_xtal(&(p_timer_obj[group_num][timer_num]->hal), config->clk_src);
  260. #endif
  261. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  262. return ESP_OK;
  263. }
  264. esp_err_t timer_deinit(timer_group_t group_num, timer_idx_t timer_num)
  265. {
  266. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  267. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  268. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  269. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  270. timer_hal_set_counter_enable(&(p_timer_obj[group_num][timer_num]->hal), TIMER_PAUSE);
  271. timer_hal_intr_disable(&(p_timer_obj[group_num][timer_num]->hal));
  272. timer_hal_clear_intr_status(&(p_timer_obj[group_num][timer_num]->hal));
  273. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  274. heap_caps_free(p_timer_obj[group_num][timer_num]);
  275. p_timer_obj[group_num][timer_num] = NULL;
  276. return ESP_OK;
  277. }
  278. esp_err_t timer_get_config(timer_group_t group_num, timer_idx_t timer_num, timer_config_t *config)
  279. {
  280. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  281. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  282. ESP_RETURN_ON_FALSE(config != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
  283. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  284. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  285. config->alarm_en = timer_hal_get_alarm_enable(&(p_timer_obj[group_num][timer_num]->hal));
  286. config->auto_reload = timer_hal_get_auto_reload(&(p_timer_obj[group_num][timer_num]->hal));
  287. config->counter_dir = timer_hal_get_counter_increase(&(p_timer_obj[group_num][timer_num]->hal));
  288. config->counter_en = timer_hal_get_counter_enable(&(p_timer_obj[group_num][timer_num]->hal));
  289. uint32_t div;
  290. timer_hal_get_divider(&(p_timer_obj[group_num][timer_num]->hal), &div);
  291. config->divider = div;
  292. if (timer_hal_get_level_int_enable(&(p_timer_obj[group_num][timer_num]->hal))) {
  293. config->intr_type = TIMER_INTR_LEVEL;
  294. } else {
  295. config->intr_type = TIMER_INTR_MAX;
  296. }
  297. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  298. return ESP_OK;
  299. }
  300. esp_err_t timer_group_intr_enable(timer_group_t group_num, timer_intr_t en_mask)
  301. {
  302. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  303. ESP_RETURN_ON_FALSE(p_timer_obj[group_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  304. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  305. for (int i = 0; i < TIMER_MAX; i++) {
  306. if (en_mask & BIT(i)) {
  307. timer_hal_intr_enable(&(p_timer_obj[group_num][i]->hal));
  308. }
  309. }
  310. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  311. return ESP_OK;
  312. }
  313. esp_err_t timer_group_intr_disable(timer_group_t group_num, timer_intr_t disable_mask)
  314. {
  315. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  316. ESP_RETURN_ON_FALSE(p_timer_obj[group_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  317. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  318. for (int i = 0; i < TIMER_MAX; i++) {
  319. if (disable_mask & BIT(i)) {
  320. timer_hal_intr_disable(&(p_timer_obj[group_num][i]->hal));
  321. }
  322. }
  323. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  324. return ESP_OK;
  325. }
  326. esp_err_t timer_enable_intr(timer_group_t group_num, timer_idx_t timer_num)
  327. {
  328. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  329. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  330. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  331. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  332. timer_hal_intr_enable(&(p_timer_obj[group_num][timer_num]->hal));
  333. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  334. return ESP_OK;
  335. }
  336. esp_err_t timer_disable_intr(timer_group_t group_num, timer_idx_t timer_num)
  337. {
  338. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  339. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  340. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  341. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  342. timer_hal_intr_disable(&(p_timer_obj[group_num][timer_num]->hal));
  343. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  344. return ESP_OK;
  345. }
  346. /* This function is deprecated */
  347. timer_intr_t IRAM_ATTR timer_group_intr_get_in_isr(timer_group_t group_num)
  348. {
  349. uint32_t intr_raw_status = 0;
  350. timer_hal_get_intr_raw_status(group_num, &intr_raw_status);
  351. return intr_raw_status;
  352. }
  353. uint32_t IRAM_ATTR timer_group_get_intr_status_in_isr(timer_group_t group_num)
  354. {
  355. uint32_t intr_status = 0;
  356. if (p_timer_obj[group_num][TIMER_0] != NULL) {
  357. timer_hal_get_intr_status(&(p_timer_obj[group_num][TIMER_0]->hal), &intr_status);
  358. }
  359. #if SOC_TIMER_GROUP_TIMERS_PER_GROUP > 1
  360. else if (p_timer_obj[group_num][TIMER_1] != NULL) {
  361. timer_hal_get_intr_status(&(p_timer_obj[group_num][TIMER_1]->hal), &intr_status);
  362. }
  363. #endif
  364. return intr_status;
  365. }
  366. /* This function is deprecated */
  367. void IRAM_ATTR timer_group_intr_clr_in_isr(timer_group_t group_num, timer_idx_t timer_num)
  368. {
  369. timer_group_clr_intr_status_in_isr(group_num, timer_num);
  370. }
  371. void IRAM_ATTR timer_group_clr_intr_status_in_isr(timer_group_t group_num, timer_idx_t timer_num)
  372. {
  373. timer_hal_clear_intr_status(&(p_timer_obj[group_num][timer_num]->hal));
  374. }
  375. void IRAM_ATTR timer_group_enable_alarm_in_isr(timer_group_t group_num, timer_idx_t timer_num)
  376. {
  377. timer_hal_set_alarm_enable(&(p_timer_obj[group_num][timer_num]->hal), true);
  378. }
  379. uint64_t IRAM_ATTR timer_group_get_counter_value_in_isr(timer_group_t group_num, timer_idx_t timer_num)
  380. {
  381. uint64_t val;
  382. timer_hal_get_counter_value(&(p_timer_obj[group_num][timer_num]->hal), &val);
  383. return val;
  384. }
  385. void IRAM_ATTR timer_group_set_alarm_value_in_isr(timer_group_t group_num, timer_idx_t timer_num, uint64_t alarm_val)
  386. {
  387. timer_hal_set_alarm_value(&(p_timer_obj[group_num][timer_num]->hal), alarm_val);
  388. }
  389. void IRAM_ATTR timer_group_set_counter_enable_in_isr(timer_group_t group_num, timer_idx_t timer_num, timer_start_t counter_en)
  390. {
  391. timer_hal_set_counter_enable(&(p_timer_obj[group_num][timer_num]->hal), counter_en);
  392. }
  393. /* This function is deprecated */
  394. void IRAM_ATTR timer_group_clr_intr_sta_in_isr(timer_group_t group_num, timer_intr_t intr_mask)
  395. {
  396. for (uint32_t timer_idx = 0; timer_idx < TIMER_MAX; timer_idx++) {
  397. if (intr_mask & BIT(timer_idx)) {
  398. timer_group_clr_intr_status_in_isr(group_num, timer_idx);
  399. }
  400. }
  401. }
  402. bool IRAM_ATTR timer_group_get_auto_reload_in_isr(timer_group_t group_num, timer_idx_t timer_num)
  403. {
  404. return timer_hal_get_auto_reload(&(p_timer_obj[group_num][timer_num]->hal));
  405. }
  406. esp_err_t IRAM_ATTR timer_spinlock_take(timer_group_t group_num)
  407. {
  408. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  409. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  410. return ESP_OK;
  411. }
  412. esp_err_t IRAM_ATTR timer_spinlock_give(timer_group_t group_num)
  413. {
  414. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  415. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  416. return ESP_OK;
  417. }