system_api.c 11 KB

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  1. // Copyright 2013-2016 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. //
  7. // http://www.apache.org/licenses/LICENSE-2.0
  8. //
  9. // Unless required by applicable law or agreed to in writing, software
  10. // distributed under the License is distributed on an "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. // See the License for the specific language governing permissions and
  13. // limitations under the License.
  14. #include <string.h>
  15. #include "esp_system.h"
  16. #include "esp_attr.h"
  17. #include "esp_wifi.h"
  18. #include "esp_wifi_internal.h"
  19. #include "esp_log.h"
  20. #include "sdkconfig.h"
  21. #include "rom/efuse.h"
  22. #include "rom/cache.h"
  23. #include "rom/uart.h"
  24. #include "soc/dport_reg.h"
  25. #include "soc/efuse_reg.h"
  26. #include "soc/rtc_cntl_reg.h"
  27. #include "soc/timer_group_reg.h"
  28. #include "soc/timer_group_struct.h"
  29. #include "soc/cpu.h"
  30. #include "soc/rtc.h"
  31. #include "freertos/FreeRTOS.h"
  32. #include "freertos/task.h"
  33. #include "freertos/xtensa_api.h"
  34. #include "esp_heap_caps.h"
  35. static const char* TAG = "system_api";
  36. static uint8_t base_mac_addr[6] = { 0 };
  37. void system_init()
  38. {
  39. }
  40. esp_err_t esp_base_mac_addr_set(uint8_t *mac)
  41. {
  42. if (mac == NULL) {
  43. ESP_LOGE(TAG, "Base MAC address is NULL");
  44. abort();
  45. }
  46. memcpy(base_mac_addr, mac, 6);
  47. return ESP_OK;
  48. }
  49. esp_err_t esp_base_mac_addr_get(uint8_t *mac)
  50. {
  51. uint8_t null_mac[6] = {0};
  52. if (memcmp(base_mac_addr, null_mac, 6) == 0) {
  53. ESP_LOGI(TAG, "Base MAC address is not set, read default base MAC address from BLK0 of EFUSE");
  54. return ESP_ERR_INVALID_MAC;
  55. }
  56. memcpy(mac, base_mac_addr, 6);
  57. return ESP_OK;
  58. }
  59. esp_err_t esp_efuse_mac_get_custom(uint8_t *mac)
  60. {
  61. uint32_t mac_low;
  62. uint32_t mac_high;
  63. uint8_t efuse_crc;
  64. uint8_t calc_crc;
  65. uint8_t version = REG_READ(EFUSE_BLK3_RDATA5_REG) >> 24;
  66. if (version != 1) {
  67. ESP_LOGE(TAG, "Base MAC address from BLK3 of EFUSE version error, version = %d", version);
  68. return ESP_ERR_INVALID_VERSION;
  69. }
  70. mac_low = REG_READ(EFUSE_BLK3_RDATA1_REG);
  71. mac_high = REG_READ(EFUSE_BLK3_RDATA0_REG);
  72. mac[0] = mac_high >> 8;
  73. mac[1] = mac_high >> 16;
  74. mac[2] = mac_high >> 24;
  75. mac[3] = mac_low;
  76. mac[4] = mac_low >> 8;
  77. mac[5] = mac_low >> 16;
  78. efuse_crc = mac_high;
  79. calc_crc = esp_crc8(mac, 6);
  80. if (efuse_crc != calc_crc) {
  81. ESP_LOGE(TAG, "Base MAC address from BLK3 of EFUSE CRC error, efuse_crc = 0x%02x; calc_crc = 0x%02x", efuse_crc, calc_crc);
  82. return ESP_ERR_INVALID_CRC;
  83. }
  84. return ESP_OK;
  85. }
  86. esp_err_t esp_efuse_mac_get_default(uint8_t* mac)
  87. {
  88. uint32_t mac_low;
  89. uint32_t mac_high;
  90. uint8_t efuse_crc;
  91. uint8_t calc_crc;
  92. mac_low = REG_READ(EFUSE_BLK0_RDATA1_REG);
  93. mac_high = REG_READ(EFUSE_BLK0_RDATA2_REG);
  94. mac[0] = mac_high >> 8;
  95. mac[1] = mac_high;
  96. mac[2] = mac_low >> 24;
  97. mac[3] = mac_low >> 16;
  98. mac[4] = mac_low >> 8;
  99. mac[5] = mac_low;
  100. efuse_crc = mac_high >> 16;
  101. calc_crc = esp_crc8(mac, 6);
  102. if (efuse_crc != calc_crc) {
  103. // Small range of MAC addresses are accepted even if CRC is invalid.
  104. // These addresses are reserved for Espressif internal use.
  105. if ((mac_high & 0xFFFF) == 0x18fe) {
  106. if ((mac_low >= 0x346a85c7) && (mac_low <= 0x346a85f8)) {
  107. return ESP_OK;
  108. }
  109. } else {
  110. ESP_LOGE(TAG, "Base MAC address from BLK0 of EFUSE CRC error, efuse_crc = 0x%02x; calc_crc = 0x%02x", efuse_crc, calc_crc);
  111. abort();
  112. }
  113. }
  114. return ESP_OK;
  115. }
  116. esp_err_t system_efuse_read_mac(uint8_t *mac) __attribute__((alias("esp_efuse_mac_get_default")));
  117. esp_err_t esp_efuse_read_mac(uint8_t *mac) __attribute__((alias("esp_efuse_mac_get_default")));
  118. esp_err_t esp_derive_mac(uint8_t* local_mac, const uint8_t* universal_mac)
  119. {
  120. uint8_t idx;
  121. if (local_mac == NULL || universal_mac == NULL) {
  122. ESP_LOGE(TAG, "mac address param is NULL");
  123. return ESP_ERR_INVALID_ARG;
  124. }
  125. memcpy(local_mac, universal_mac, 6);
  126. for (idx = 0; idx < 64; idx++) {
  127. local_mac[0] = universal_mac[0] | 0x02;
  128. local_mac[0] ^= idx << 2;
  129. if (memcmp(local_mac, universal_mac, 6)) {
  130. break;
  131. }
  132. }
  133. return ESP_OK;
  134. }
  135. esp_err_t esp_read_mac(uint8_t* mac, esp_mac_type_t type)
  136. {
  137. uint8_t efuse_mac[6];
  138. if (mac == NULL) {
  139. ESP_LOGE(TAG, "mac address param is NULL");
  140. return ESP_ERR_INVALID_ARG;
  141. }
  142. if (type < ESP_MAC_WIFI_STA || type > ESP_MAC_ETH) {
  143. ESP_LOGE(TAG, "mac type is incorrect");
  144. return ESP_ERR_INVALID_ARG;
  145. }
  146. _Static_assert(UNIVERSAL_MAC_ADDR_NUM == FOUR_UNIVERSAL_MAC_ADDR \
  147. || UNIVERSAL_MAC_ADDR_NUM == TWO_UNIVERSAL_MAC_ADDR, \
  148. "incorrect NUM_MAC_ADDRESS_FROM_EFUSE value");
  149. if (esp_base_mac_addr_get(efuse_mac) != ESP_OK) {
  150. esp_efuse_mac_get_default(efuse_mac);
  151. }
  152. switch (type) {
  153. case ESP_MAC_WIFI_STA:
  154. memcpy(mac, efuse_mac, 6);
  155. break;
  156. case ESP_MAC_WIFI_SOFTAP:
  157. if (UNIVERSAL_MAC_ADDR_NUM == FOUR_UNIVERSAL_MAC_ADDR) {
  158. memcpy(mac, efuse_mac, 6);
  159. mac[5] += 1;
  160. }
  161. else if (UNIVERSAL_MAC_ADDR_NUM == TWO_UNIVERSAL_MAC_ADDR) {
  162. esp_derive_mac(mac, efuse_mac);
  163. }
  164. break;
  165. case ESP_MAC_BT:
  166. memcpy(mac, efuse_mac, 6);
  167. if (UNIVERSAL_MAC_ADDR_NUM == FOUR_UNIVERSAL_MAC_ADDR) {
  168. mac[5] += 2;
  169. }
  170. else if (UNIVERSAL_MAC_ADDR_NUM == TWO_UNIVERSAL_MAC_ADDR) {
  171. mac[5] += 1;
  172. }
  173. break;
  174. case ESP_MAC_ETH:
  175. if (UNIVERSAL_MAC_ADDR_NUM == FOUR_UNIVERSAL_MAC_ADDR) {
  176. memcpy(mac, efuse_mac, 6);
  177. mac[5] += 3;
  178. }
  179. else if (UNIVERSAL_MAC_ADDR_NUM == TWO_UNIVERSAL_MAC_ADDR) {
  180. efuse_mac[5] += 1;
  181. esp_derive_mac(mac, efuse_mac);
  182. }
  183. break;
  184. default:
  185. ESP_LOGW(TAG, "incorrect mac type");
  186. break;
  187. }
  188. return ESP_OK;
  189. }
  190. void esp_restart_noos() __attribute__ ((noreturn));
  191. /* Dummy function to be used instead of esp_wifi_stop if WiFi stack is not
  192. * linked in (even though CONFIG_WIFI_ENABLED is set).
  193. */
  194. esp_err_t wifi_stop_noop()
  195. {
  196. return ESP_OK;
  197. }
  198. esp_err_t esp_wifi_stop(void) __attribute((weak, alias("wifi_stop_noop")));
  199. void IRAM_ATTR esp_restart(void)
  200. {
  201. #ifdef CONFIG_WIFI_ENABLED
  202. esp_wifi_stop();
  203. #endif
  204. // Disable scheduler on this core.
  205. vTaskSuspendAll();
  206. esp_restart_noos();
  207. }
  208. /* "inner" restart function for after RTOS, interrupts & anything else on this
  209. * core are already stopped. Stalls other core, resets hardware,
  210. * triggers restart.
  211. */
  212. void IRAM_ATTR esp_restart_noos()
  213. {
  214. const uint32_t core_id = xPortGetCoreID();
  215. const uint32_t other_core_id = core_id == 0 ? 1 : 0;
  216. esp_cpu_stall(other_core_id);
  217. // other core is now stalled, can access DPORT registers directly
  218. esp_dport_access_int_deinit();
  219. // We need to disable TG0/TG1 watchdogs
  220. // First enable RTC watchdog to be on the safe side
  221. REG_WRITE(RTC_CNTL_WDTWPROTECT_REG, RTC_CNTL_WDT_WKEY_VALUE);
  222. REG_WRITE(RTC_CNTL_WDTCONFIG0_REG,
  223. RTC_CNTL_WDT_FLASHBOOT_MOD_EN_M |
  224. (1 << RTC_CNTL_WDT_SYS_RESET_LENGTH_S) |
  225. (1 << RTC_CNTL_WDT_CPU_RESET_LENGTH_S) );
  226. REG_WRITE(RTC_CNTL_WDTCONFIG1_REG, 128000);
  227. // Disable TG0/TG1 watchdogs
  228. TIMERG0.wdt_wprotect=TIMG_WDT_WKEY_VALUE;
  229. TIMERG0.wdt_config0.en = 0;
  230. TIMERG0.wdt_wprotect=0;
  231. TIMERG1.wdt_wprotect=TIMG_WDT_WKEY_VALUE;
  232. TIMERG1.wdt_config0.en = 0;
  233. TIMERG1.wdt_wprotect=0;
  234. // Disable all interrupts
  235. xt_ints_off(0xFFFFFFFF);
  236. // Disable cache
  237. Cache_Read_Disable(0);
  238. Cache_Read_Disable(1);
  239. // Flush any data left in UART FIFOs
  240. uart_tx_wait_idle(0);
  241. uart_tx_wait_idle(1);
  242. uart_tx_wait_idle(2);
  243. // Reset wifi/bluetooth/ethernet/sdio (bb/mac)
  244. DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG,
  245. DPORT_BB_RST | DPORT_FE_RST | DPORT_MAC_RST |
  246. DPORT_BT_RST | DPORT_BTMAC_RST | DPORT_SDIO_RST |
  247. DPORT_SDIO_HOST_RST | DPORT_EMAC_RST | DPORT_MACPWR_RST |
  248. DPORT_RW_BTMAC_RST | DPORT_RW_BTLP_RST);
  249. DPORT_REG_WRITE(DPORT_CORE_RST_EN_REG, 0);
  250. // Reset timer/spi/uart
  251. DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG,
  252. DPORT_TIMERS_RST | DPORT_SPI_RST_1 | DPORT_UART_RST);
  253. DPORT_REG_WRITE(DPORT_PERIP_RST_EN_REG, 0);
  254. // Set CPU back to XTAL source, no PLL, same as hard reset
  255. rtc_clk_cpu_freq_set(RTC_CPU_FREQ_XTAL);
  256. // Clear entry point for APP CPU
  257. DPORT_REG_WRITE(DPORT_APPCPU_CTRL_D_REG, 0);
  258. // Reset CPUs
  259. if (core_id == 0) {
  260. // Running on PRO CPU: APP CPU is stalled. Can reset both CPUs.
  261. SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG,
  262. RTC_CNTL_SW_PROCPU_RST_M | RTC_CNTL_SW_APPCPU_RST_M);
  263. } else {
  264. // Running on APP CPU: need to reset PRO CPU and unstall it,
  265. // then reset APP CPU
  266. SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_PROCPU_RST_M);
  267. esp_cpu_unstall(0);
  268. SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_APPCPU_RST_M);
  269. }
  270. while(true) {
  271. ;
  272. }
  273. }
  274. void system_restart(void) __attribute__((alias("esp_restart")));
  275. void system_restore(void)
  276. {
  277. esp_wifi_restore();
  278. }
  279. uint32_t esp_get_free_heap_size( void )
  280. {
  281. return heap_caps_get_free_size( MALLOC_CAP_8BIT );
  282. }
  283. uint32_t esp_get_minimum_free_heap_size( void )
  284. {
  285. return heap_caps_get_minimum_free_size( MALLOC_CAP_8BIT );
  286. }
  287. uint32_t system_get_free_heap_size(void) __attribute__((alias("esp_get_free_heap_size")));
  288. const char* system_get_sdk_version(void)
  289. {
  290. return "master";
  291. }
  292. const char* esp_get_idf_version(void)
  293. {
  294. return IDF_VER;
  295. }
  296. static void get_chip_info_esp32(esp_chip_info_t* out_info)
  297. {
  298. out_info->model = CHIP_ESP32;
  299. uint32_t reg = REG_READ(EFUSE_BLK0_RDATA3_REG);
  300. memset(out_info, 0, sizeof(*out_info));
  301. if ((reg & EFUSE_RD_CHIP_VER_REV1_M) != 0) {
  302. out_info->revision = 1;
  303. }
  304. if ((reg & EFUSE_RD_CHIP_VER_DIS_APP_CPU_M) == 0) {
  305. out_info->cores = 2;
  306. } else {
  307. out_info->cores = 1;
  308. }
  309. out_info->features = CHIP_FEATURE_WIFI_BGN;
  310. if ((reg & EFUSE_RD_CHIP_VER_DIS_BT_M) == 0) {
  311. out_info->features |= CHIP_FEATURE_BT | CHIP_FEATURE_BLE;
  312. }
  313. if (((reg & EFUSE_RD_CHIP_VER_PKG_M) >> EFUSE_RD_CHIP_VER_PKG_S) ==
  314. EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5) {
  315. out_info->features |= CHIP_FEATURE_EMB_FLASH;
  316. }
  317. }
  318. void esp_chip_info(esp_chip_info_t* out_info)
  319. {
  320. // Only ESP32 is supported now, in the future call one of the
  321. // chip-specific functions based on sdkconfig choice
  322. return get_chip_info_esp32(out_info);
  323. }