test_i2c.c 12 KB

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  1. /**
  2. * test environment UT_T2_I2C:
  3. * please prepare two ESP32-WROVER-KIT board.
  4. * Then connect GPIO18 and GPIO18, GPIO19 and GPIO19 between these two boards.
  5. */
  6. #include <stdio.h>
  7. #include <string.h>
  8. #include "unity.h"
  9. #include "test_utils.h"
  10. #include "unity_config.h"
  11. #include "driver/i2c.h"
  12. #include "esp_attr.h"
  13. #include "esp_log.h"
  14. #include "soc/gpio_periph.h"
  15. #include "soc/i2c_periph.h"
  16. #include "esp_system.h"
  17. #include "driver/pcnt.h"
  18. #define DATA_LENGTH 512 /*!<Data buffer length for test buffer*/
  19. #define RW_TEST_LENGTH 129 /*!<Data length for r/w test, any value from 0-DATA_LENGTH*/
  20. #define DELAY_TIME_BETWEEN_ITEMS_MS 1234 /*!< delay time between different test items */
  21. #define I2C_SLAVE_SCL_IO 19 /*!<gpio number for i2c slave clock */
  22. #define I2C_SLAVE_SDA_IO 18 /*!<gpio number for i2c slave data */
  23. #define I2C_SLAVE_NUM I2C_NUM_0 /*!<I2C port number for slave dev */
  24. #define I2C_SLAVE_TX_BUF_LEN (2*DATA_LENGTH) /*!<I2C slave tx buffer size */
  25. #define I2C_SLAVE_RX_BUF_LEN (2*DATA_LENGTH) /*!<I2C slave rx buffer size */
  26. #define I2C_MASTER_SCL_IO 19 /*!< gpio number for I2C master clock */
  27. #define I2C_MASTER_SDA_IO 18 /*!< gpio number for I2C master data */
  28. #define I2C_MASTER_NUM I2C_NUM_1 /*!< I2C port number for master dev */
  29. #define I2C_MASTER_TX_BUF_DISABLE 0 /*!< I2C master do not need buffer */
  30. #define I2C_MASTER_RX_BUF_DISABLE 0 /*!< I2C master do not need buffer */
  31. #define I2C_MASTER_FREQ_HZ 100000 /*!< I2C master clock frequency */
  32. #define ESP_SLAVE_ADDR 0x28 /*!< ESP32 slave address, you can set any 7bit value */
  33. #define WRITE_BIT I2C_MASTER_WRITE /*!< I2C master write */
  34. #define READ_BIT I2C_MASTER_READ /*!< I2C master read */
  35. #define ACK_CHECK_EN 0x1 /*!< I2C master will check ack from slave*/
  36. #define ACK_CHECK_DIS 0x0 /*!< I2C master will not check ack from slave */
  37. #define ACK_VAL 0x0 /*!< I2C ack value */
  38. #define NACK_VAL 0x1 /*!< I2C nack value */
  39. #define PULSE_IO 19
  40. #define PCNT_INPUT_IO 4
  41. #define PCNT_CTRL_FLOATING_IO 5
  42. #define HIGHEST_LIMIT 10000
  43. #define LOWEST_LIMIT -10000
  44. static DRAM_ATTR i2c_dev_t *const I2C[I2C_NUM_MAX] = { &I2C0, &I2C1 };
  45. static esp_err_t i2c_master_write_slave(i2c_port_t i2c_num, uint8_t *data_wr, size_t size)
  46. {
  47. i2c_cmd_handle_t cmd = i2c_cmd_link_create();
  48. i2c_master_start(cmd);
  49. TEST_ESP_OK(i2c_master_write_byte(cmd, ( ESP_SLAVE_ADDR << 1 ) | WRITE_BIT, ACK_CHECK_EN));
  50. TEST_ESP_OK(i2c_master_write(cmd, data_wr, size, ACK_CHECK_EN));
  51. TEST_ESP_OK(i2c_master_stop(cmd));
  52. esp_err_t ret = i2c_master_cmd_begin(i2c_num, cmd, 5000 / portTICK_RATE_MS);
  53. i2c_cmd_link_delete(cmd);
  54. return ret;
  55. }
  56. static i2c_config_t i2c_master_init(void)
  57. {
  58. i2c_config_t conf_master = {
  59. .mode = I2C_MODE_MASTER,
  60. .sda_pullup_en = GPIO_PULLUP_ENABLE,
  61. .scl_pullup_en = GPIO_PULLUP_ENABLE,
  62. .master.clk_speed = I2C_MASTER_FREQ_HZ,
  63. .sda_io_num = I2C_MASTER_SDA_IO,
  64. .scl_io_num = I2C_MASTER_SCL_IO,
  65. };
  66. return conf_master;
  67. }
  68. static i2c_config_t i2c_slave_init(void)
  69. {
  70. i2c_config_t conf_slave = {
  71. .mode = I2C_MODE_SLAVE,
  72. .sda_io_num = I2C_SLAVE_SDA_IO,
  73. .scl_io_num = I2C_SLAVE_SCL_IO,
  74. .sda_pullup_en = GPIO_PULLUP_ENABLE,
  75. .scl_pullup_en = GPIO_PULLUP_ENABLE,
  76. .slave.addr_10bit_en = 0,
  77. .slave.slave_addr = ESP_SLAVE_ADDR,
  78. };
  79. return conf_slave;
  80. }
  81. TEST_CASE("I2C config test", "[i2c]")
  82. {
  83. // master test
  84. i2c_config_t conf_master = i2c_master_init();
  85. gpio_pullup_t sda_pull_up_en[2] = {GPIO_PULLUP_DISABLE, GPIO_PULLUP_ENABLE};
  86. gpio_pullup_t scl_pull_up_en[2] = {GPIO_PULLUP_DISABLE, GPIO_PULLUP_ENABLE};
  87. for (int i = 0; i < 2; i++) {
  88. for (int j = 0; j < 2; j++) {
  89. conf_master.sda_pullup_en = sda_pull_up_en[i];
  90. conf_master.scl_pullup_en = scl_pull_up_en[j];
  91. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  92. TEST_ASSERT_EQUAL_INT32(I2C[I2C_MASTER_NUM]->ctr.ms_mode, 1);
  93. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  94. I2C_MASTER_RX_BUF_DISABLE,
  95. I2C_MASTER_TX_BUF_DISABLE, 0));
  96. TEST_ESP_OK(i2c_driver_delete(I2C_MASTER_NUM));
  97. }
  98. }
  99. // slave test
  100. i2c_config_t conf_slave = i2c_slave_init();
  101. for (int i = 0; i < 2; i++) {
  102. for (int j = 0; j < 2; j++) {
  103. conf_master.sda_pullup_en = sda_pull_up_en[i];
  104. conf_master.scl_pullup_en = scl_pull_up_en[j];
  105. conf_slave.sda_pullup_en = sda_pull_up_en[i];
  106. conf_slave.scl_pullup_en = scl_pull_up_en[j];
  107. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  108. TEST_ASSERT_EQUAL_INT32(I2C[I2C_SLAVE_NUM] -> ctr.ms_mode, 0);
  109. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  110. I2C_SLAVE_RX_BUF_LEN,
  111. I2C_SLAVE_TX_BUF_LEN, 0));
  112. TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
  113. }
  114. }
  115. }
  116. TEST_CASE("I2C set and get period test", "[i2c]")
  117. {
  118. int high_period, low_period;
  119. i2c_config_t conf_master = i2c_master_init();
  120. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  121. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  122. I2C_MASTER_RX_BUF_DISABLE,
  123. I2C_MASTER_TX_BUF_DISABLE, 0));
  124. TEST_ESP_OK(i2c_set_period(I2C_MASTER_NUM, I2C_SCL_HIGH_PERIOD_V, I2C_SCL_HIGH_PERIOD_V));
  125. TEST_ESP_OK(i2c_get_period(I2C_MASTER_NUM, &high_period, &low_period));
  126. TEST_ASSERT_EQUAL_INT(I2C_SCL_HIGH_PERIOD_V, high_period);
  127. TEST_ASSERT_EQUAL_INT(I2C_SCL_HIGH_PERIOD_V, low_period);
  128. TEST_ASSERT_NOT_NULL((void *)i2c_set_period(I2C_MASTER_NUM, I2C_SCL_HIGH_PERIOD_V + 1, I2C_SCL_HIGH_PERIOD_V + 1));
  129. TEST_ESP_OK(i2c_set_period(I2C_MASTER_NUM, 300, 400));
  130. TEST_ESP_OK(i2c_get_period(I2C_MASTER_NUM, &high_period, &low_period));
  131. TEST_ASSERT_EQUAL_INT(300, high_period);
  132. TEST_ASSERT_EQUAL_INT(400, low_period);
  133. TEST_ESP_OK(i2c_driver_delete(I2C_MASTER_NUM));
  134. }
  135. TEST_CASE("I2C config FIFO test", "[i2c]")
  136. {
  137. TEST_ASSERT_BIT_LOW(1, I2C[I2C_SLAVE_NUM]->fifo_conf.tx_fifo_rst);
  138. TEST_ESP_OK(i2c_reset_tx_fifo(I2C_SLAVE_NUM));
  139. TEST_ASSERT_BIT_LOW(0, I2C[I2C_SLAVE_NUM]->fifo_conf.tx_fifo_rst);
  140. TEST_ESP_OK(i2c_reset_rx_fifo(I2C_SLAVE_NUM));
  141. TEST_ASSERT_BIT_LOW(0, I2C[I2C_SLAVE_NUM]->fifo_conf.rx_fifo_rst);
  142. }
  143. TEST_CASE("I2C timing test", "[i2c]")
  144. {
  145. int test_setup_time, test_data_time, test_stop_time, test_hold_time;
  146. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  147. i2c_config_t conf_master = i2c_master_init();
  148. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  149. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  150. I2C_MASTER_RX_BUF_DISABLE,
  151. I2C_MASTER_TX_BUF_DISABLE, 0));
  152. TEST_ESP_OK(i2c_set_start_timing(I2C_MASTER_NUM, 50, 60));
  153. TEST_ESP_OK(i2c_set_data_timing(I2C_MASTER_NUM, 80, 60));
  154. TEST_ESP_OK(i2c_set_stop_timing(I2C_MASTER_NUM, 100, 60));
  155. for (int i = 0; i < DATA_LENGTH; i++) {
  156. data_wr[i] = i;
  157. }
  158. i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
  159. TEST_ESP_OK(i2c_get_start_timing(I2C_MASTER_NUM, &test_setup_time, &test_hold_time));
  160. TEST_ESP_OK(i2c_get_data_timing(I2C_MASTER_NUM, &test_data_time, &test_hold_time));
  161. TEST_ESP_OK(i2c_get_stop_timing(I2C_MASTER_NUM, &test_stop_time, &test_hold_time));
  162. TEST_ASSERT_EQUAL_INT32(50, test_setup_time);
  163. TEST_ASSERT_EQUAL_INT32(80, test_data_time);
  164. TEST_ASSERT_EQUAL_INT32(100, test_stop_time);
  165. TEST_ASSERT_EQUAL_INT32(60, test_hold_time);
  166. free(data_wr);
  167. i2c_driver_delete(I2C_MASTER_NUM);
  168. }
  169. TEST_CASE("I2C data mode test", "[i2c]")
  170. {
  171. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  172. i2c_trans_mode_t test_tx_trans_mode, test_rx_trans_mode;
  173. i2c_config_t conf_master = i2c_master_init();
  174. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  175. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  176. I2C_MASTER_RX_BUF_DISABLE,
  177. I2C_MASTER_TX_BUF_DISABLE, 0));
  178. for (int i = 0; i < DATA_LENGTH; i++) {
  179. data_wr[i] = i;
  180. }
  181. i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
  182. TEST_ESP_OK(i2c_set_data_mode(I2C_MASTER_NUM, I2C_DATA_MODE_LSB_FIRST, I2C_DATA_MODE_LSB_FIRST));
  183. i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
  184. TEST_ASSERT_EQUAL_INT(1, I2C[I2C_MASTER_NUM]->ctr.rx_lsb_first);
  185. TEST_ASSERT_EQUAL_INT(1, I2C[I2C_MASTER_NUM]->ctr.tx_lsb_first);
  186. TEST_ESP_OK(i2c_get_data_mode(I2C_MASTER_NUM, &test_tx_trans_mode, &test_rx_trans_mode));
  187. TEST_ASSERT_EQUAL_INT(1, test_tx_trans_mode);
  188. TEST_ASSERT_EQUAL_INT(1, test_rx_trans_mode);
  189. free(data_wr);
  190. i2c_driver_delete(I2C_MASTER_NUM);
  191. }
  192. TEST_CASE("I2C driver memory leaking check", "[i2c]")
  193. {
  194. esp_err_t ret;
  195. i2c_config_t conf_slave = i2c_slave_init();
  196. ret = i2c_param_config(I2C_SLAVE_NUM, &conf_slave);
  197. TEST_ASSERT(ret == ESP_OK);
  198. int size = esp_get_free_heap_size();
  199. for (uint32_t i = 0; i <= 1000; i++) {
  200. ret = i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  201. I2C_SLAVE_RX_BUF_LEN,
  202. I2C_SLAVE_TX_BUF_LEN, 0);
  203. TEST_ASSERT(ret == ESP_OK);
  204. vTaskDelay(10 / portTICK_RATE_MS);
  205. i2c_driver_delete(I2C_SLAVE_NUM);
  206. TEST_ASSERT(ret == ESP_OK);
  207. }
  208. TEST_ASSERT_INT_WITHIN(100, size, esp_get_free_heap_size());
  209. }
  210. static volatile bool exit_flag;
  211. static bool test_read_func;
  212. static void test_task(void *pvParameters)
  213. {
  214. xSemaphoreHandle *sema = (xSemaphoreHandle *) pvParameters;
  215. uint8_t *data = (uint8_t *) malloc(DATA_LENGTH);
  216. i2c_config_t conf_slave = i2c_slave_init();
  217. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  218. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  219. I2C_SLAVE_RX_BUF_LEN,
  220. I2C_SLAVE_TX_BUF_LEN, 0));
  221. while (exit_flag == false) {
  222. if (test_read_func) {
  223. i2c_slave_read_buffer(I2C_SLAVE_NUM, data, DATA_LENGTH, 0);
  224. } else {
  225. i2c_slave_write_buffer(I2C_SLAVE_NUM, data, DATA_LENGTH, 0);
  226. }
  227. }
  228. free(data);
  229. xSemaphoreGive(*sema);
  230. vTaskDelete(NULL);
  231. }
  232. TEST_CASE("test i2c_slave_read_buffer is not blocked when ticks_to_wait=0", "[i2c]")
  233. {
  234. xSemaphoreHandle exit_sema = xSemaphoreCreateBinary();
  235. exit_flag = false;
  236. test_read_func = true;
  237. xTaskCreate(test_task, "tsk1", 2048, &exit_sema, 5, NULL);
  238. printf("Waiting for 5 sec\n");
  239. vTaskDelay(5000 / portTICK_PERIOD_MS);
  240. exit_flag = true;
  241. if (xSemaphoreTake(exit_sema, 1000 / portTICK_PERIOD_MS) == pdTRUE) {
  242. vSemaphoreDelete(exit_sema);
  243. } else {
  244. TEST_FAIL_MESSAGE("i2c_slave_read_buffer is blocked");
  245. }
  246. TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
  247. }
  248. TEST_CASE("test i2c_slave_write_buffer is not blocked when ticks_to_wait=0", "[i2c]")
  249. {
  250. xSemaphoreHandle exit_sema = xSemaphoreCreateBinary();
  251. exit_flag = false;
  252. test_read_func = false;
  253. xTaskCreate(test_task, "tsk1", 2048, &exit_sema, 5, NULL);
  254. printf("Waiting for 5 sec\n");
  255. vTaskDelay(5000 / portTICK_PERIOD_MS);
  256. exit_flag = true;
  257. if (xSemaphoreTake(exit_sema, 1000 / portTICK_PERIOD_MS) == pdTRUE) {
  258. vSemaphoreDelete(exit_sema);
  259. } else {
  260. TEST_FAIL_MESSAGE("i2c_slave_write_buffer is blocked");
  261. }
  262. TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
  263. }