reset_reason.c 4.0 KB

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  1. // Copyright 2018 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. //
  7. // http://www.apache.org/licenses/LICENSE-2.0
  8. //
  9. // Unless required by applicable law or agreed to in writing, software
  10. // distributed under the License is distributed on an "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. // See the License for the specific language governing permissions and
  13. // limitations under the License.
  14. #include "esp_system.h"
  15. #include "esp32/rom/rtc.h"
  16. #include "esp_private/system_internal.h"
  17. #include "soc/rtc_periph.h"
  18. static void esp_reset_reason_clear_hint(void);
  19. static esp_reset_reason_t s_reset_reason;
  20. static esp_reset_reason_t get_reset_reason(RESET_REASON rtc_reset_reason, esp_reset_reason_t reset_reason_hint)
  21. {
  22. switch (rtc_reset_reason) {
  23. case POWERON_RESET:
  24. return ESP_RST_POWERON;
  25. /* For ESP32, ESP_RST_EXT is never returned */
  26. case SW_CPU_RESET:
  27. case SW_RESET:
  28. case EXT_CPU_RESET: /* unused */
  29. if (reset_reason_hint == ESP_RST_PANIC ||
  30. reset_reason_hint == ESP_RST_BROWNOUT ||
  31. reset_reason_hint == ESP_RST_TASK_WDT ||
  32. reset_reason_hint == ESP_RST_INT_WDT) {
  33. return reset_reason_hint;
  34. }
  35. return ESP_RST_SW;
  36. case DEEPSLEEP_RESET:
  37. return ESP_RST_DEEPSLEEP;
  38. case TG0WDT_SYS_RESET:
  39. return ESP_RST_TASK_WDT;
  40. case TG1WDT_SYS_RESET:
  41. return ESP_RST_INT_WDT;
  42. case OWDT_RESET:
  43. case RTCWDT_SYS_RESET:
  44. case RTCWDT_RTC_RESET:
  45. case RTCWDT_CPU_RESET: /* unused */
  46. case TGWDT_CPU_RESET: /* unused */
  47. return ESP_RST_WDT;
  48. case RTCWDT_BROWN_OUT_RESET: /* unused */
  49. return ESP_RST_BROWNOUT;
  50. case SDIO_RESET:
  51. return ESP_RST_SDIO;
  52. case INTRUSION_RESET: /* unused */
  53. default:
  54. return ESP_RST_UNKNOWN;
  55. }
  56. }
  57. static void __attribute__((constructor)) esp_reset_reason_init(void)
  58. {
  59. esp_reset_reason_t hint = esp_reset_reason_get_hint();
  60. s_reset_reason = get_reset_reason(rtc_get_reset_reason(PRO_CPU_NUM),
  61. hint);
  62. if (hint != ESP_RST_UNKNOWN) {
  63. esp_reset_reason_clear_hint();
  64. }
  65. }
  66. esp_reset_reason_t esp_reset_reason(void)
  67. {
  68. return s_reset_reason;
  69. }
  70. /* Reset reason hint is stored in RTC_RESET_CAUSE_REG, a.k.a. RTC_CNTL_STORE6_REG,
  71. * a.k.a. RTC_ENTRY_ADDR_REG. It is safe to use this register both for the
  72. * deep sleep wake stub entry address and for reset reason hint, since wake stub
  73. * is only used for deep sleep reset, and in this case the reason provided by
  74. * rtc_get_reset_reason is unambiguous.
  75. *
  76. * Same layout is used as for RTC_APB_FREQ_REG (a.k.a. RTC_CNTL_STORE5_REG):
  77. * the value is replicated in low and high half-words. In addition to that,
  78. * MSB is set to 1, which doesn't happen when RTC_CNTL_STORE6_REG contains
  79. * deep sleep wake stub address.
  80. */
  81. #define RST_REASON_BIT 0x80000000
  82. #define RST_REASON_MASK 0x7FFF
  83. #define RST_REASON_SHIFT 16
  84. /* in IRAM, can be called from panic handler */
  85. void IRAM_ATTR esp_reset_reason_set_hint(esp_reset_reason_t hint)
  86. {
  87. assert((hint & (~RST_REASON_MASK)) == 0);
  88. uint32_t val = hint | (hint << RST_REASON_SHIFT) | RST_REASON_BIT;
  89. REG_WRITE(RTC_RESET_CAUSE_REG, val);
  90. }
  91. /* in IRAM, can be called from panic handler */
  92. esp_reset_reason_t IRAM_ATTR esp_reset_reason_get_hint(void)
  93. {
  94. uint32_t reset_reason_hint = REG_READ(RTC_RESET_CAUSE_REG);
  95. uint32_t high = (reset_reason_hint >> RST_REASON_SHIFT) & RST_REASON_MASK;
  96. uint32_t low = reset_reason_hint & RST_REASON_MASK;
  97. if ((reset_reason_hint & RST_REASON_BIT) == 0 || high != low) {
  98. return ESP_RST_UNKNOWN;
  99. }
  100. return (esp_reset_reason_t) low;
  101. }
  102. static void esp_reset_reason_clear_hint(void)
  103. {
  104. REG_WRITE(RTC_RESET_CAUSE_REG, 0);
  105. }