flash-encryption.rst 40 KB

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  1. Flash Encryption
  2. ================
  3. :link_to_translation:`zh_CN:[中文]`
  4. This document provides introduction to Flash encryption concept on ESP32 and demonstrates how this feature can be used during development as well as production by the user using a sample example. The primary intention of the document is to act as a quick start guide to test and verify flash encryption operations. The details of the flash encryption block can be found in the `ESP32 Technical reference manual`_.
  5. .. _ESP32 Technical Reference Manual: https://www.espressif.com/sites/default/files/documentation/esp32_technical_reference_manual_en.pdf
  6. Introduction
  7. ------------
  8. Flash encryption is a feature for encrypting the contents of the ESP32's attached SPI flash. When flash encryption is enabled, physical readout of the SPI flash is not sufficient to recover most flash contents. Encryption is applied by flashing the ESP32 with plaintext data, and (if encryption is enabled) the bootloader encrypts the data in place on first boot.
  9. With flash encryption enabled, following kinds of flash data are encrypted by default:
  10. - Bootloader
  11. - Partition Table
  12. - All "app" type partitions
  13. Other types of flash data are encrypted conditionally:
  14. - Secure boot bootloader digest (if secure boot is enabled)
  15. - Any partition marked with the "encrypted" flag in the partition table
  16. Flash encryption is separate from the :doc:`Secure Boot <secure-boot>` feature, and you can use flash encryption without enabling secure boot. However, for a secure environment both should be used simultaneously.
  17. .. important::
  18. For production use, flash encryption should be enabled in the "Release" mode only.
  19. .. important::
  20. Enabling flash encryption limits the options for further updates of the ESP32. Make sure to read this document (including :ref:`flash-encryption-limitations`) and understand the implications of enabling flash encryption.
  21. .. _flash-encryption-efuse:
  22. eFuse Used During Flash Encryption Process
  23. -------------------------------------------
  24. The flash encryption operation is controlled by various eFuses available on ESP32. Below is the list of eFuse and their description:
  25. ::
  26. eFuse Description Can be locked for Default
  27. reading/writing Value
  28. .. code-block:: none
  29. Coding scheme This 2 bit wide eFuse controls the Yes 0
  30. actual number of bits to be used
  31. from BLOCK1 to derive final 256 bit
  32. AES key. The coding scheme value is
  33. decoded as below:
  34. 0: 256 bits
  35. 1: 192 bits
  36. 2: 128 bits
  37. Final AES key is derived based on the
  38. FLASH_CRYPT_CONFIG value
  39. BLOCK1 256 bit wide eFuse block for storing Yes x
  40. AES key
  41. FLASH_CRYPT_CONFIG 4 bit wide eFuse which controls the Yes 0xF
  42. AES encryption process
  43. download_dis_encrypt When set, disables the flash encryption Yes 0
  44. operation while running in UART
  45. download mode
  46. download_dis_decrypt When set, disables the flash decryption Yes 0
  47. operation while running in UART
  48. download mode
  49. FLASH_CRYPT_CNT 7 bit eFuse which enables/disables Yes 0
  50. encryption at boot time
  51. Even number of bits set (0, 2, 4, 6):
  52. encrypt flash at boot time
  53. Odd number of bits set (1, 3, 5, 7): do
  54. not encrypt flash at boot time
  55. Read and write access to above bits is controlled by appropriate bits in ``efuse_wr_disable`` and ``efuse_rd_disable`` registers. More information about ESP32 eFuse can be found at :doc:`eFuse manager <../api-reference/system/efuse>`.
  56. Flash Encryption Process
  57. ------------------------
  58. Assuming the eFuse values are in default state and second stage bootloader is compiled to support flash encryption, the flash encryption process executes as below:
  59. - On first power-on reset, all data in flash is un-encrypted (plaintext). First stage loader (ROM) will load the second stage loader in IRAM.
  60. - Second stage bootloader will read the flash_crypt_cnt (=00000000b) eFuse value and since the value is 0 (even number of bits set) it will configure and enable the flash encryption block. It will also program ``FLASH_CRYPT_CFG`` eFuse to value 0xF.
  61. - The flash encryption block will generate AES-256 bit key and store into BLOCK1 eFuse. This operation is performed in hardware and the key can not be accessed by software.
  62. - Next the flash encryption block will encrypt the flash contents (based on partition table flag value). Encrypting in-place can take some time (up to a minute for large partitions).
  63. - Second stage bootloader then sets the first available bit in flash_crypt_cnt (=00000001b) to mark the flash contents as encrypted (odd number of bits set).
  64. - For :ref:`flash_enc_release_mode` second stage bootloader will program ``download_dis_encrypt``, ``download_dis_decrypt`` & ``download_dis_cache`` eFuse bits to 1 to prevent UART bootloader from decrypting the flash contents. It will also write protect the ``FLASH_CRYPT_CNT`` eFuse bits.
  65. - For :ref:`flash_enc_development_mode` second stage bootloader will program only ``download_dis_decrypt`` & ``download_dis_cache`` eFuse bits to allow UART bootloader reflashing of encrypted binaries. Also ``FLASH_CRYPT_CNT`` eFuse bits will NOT be write protected.
  66. - The second stage bootloader then reboots the device to start executing encrypted image. It will transparently decrypt the flash contents and load into IRAM.
  67. During development stage there is a frequent need to program different plaintext flash images and test the flash encryption process. This requires UART download mode to be able to load new plaintext images as many number of times as required. However during manufacturing or production UART download mode should not be allowed to access flash contents due to security reason. Hence this requires two different ESP32 configurations: one for development and other for production. Following section describes :ref:`flash_enc_development_mode` and :ref:`flash_enc_release_mode` for flash encryption and a step by step process to use them.
  68. .. important::
  69. Development mode as the name suggests should be used ONLY DURING DEVELOPMENT as it does not prevent modification and possible read back of encrypted flash contents.
  70. Steps to Setup Flash Encryption
  71. -------------------------------
  72. .. _flash_enc_development_mode:
  73. Development Mode
  74. ^^^^^^^^^^^^^^^^
  75. It is possible to run flash encryption process for development using either ESP32 internally generated key or external host generated keys.
  76. Using ESP32 Generated Flash Encryption Key
  77. ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
  78. As mentioned above :ref:`flash_enc_development_mode` allows user to download as many plaintext images using UART download mode. Following steps needs to be done to test flash encryption process:
  79. - Ensure you have a ESP32 device with default flash encryption eFuse settings as shown in :ref:`flash-encryption-efuse`.
  80. - Navigate to flash encryption sample application in ``$IDF_PATH/examples/security/flash_encryption`` folder. This sample application will print the status of flash encryption: enabled or disabled. It will print the ``FLASH_CRYPT_CNT`` eFuse value.
  81. - Enable flash encryption support in second stage bootloader. In :ref:`project-configuration-menu`, navigate to "Security Features".
  82. - Select :ref:`Enable flash encryption on boot <CONFIG_SECURE_FLASH_ENC_ENABLED>`.
  83. - By default the mode is set for **Development**.
  84. - Select appropriate Bootloader log verbosity under Bootloader config.
  85. - Update to the partition table offset may be required since after enabling flash encryption the size of bootloader is increased. See :ref:`secure-boot-bootloader-size`
  86. - Save the configuration and exit.
  87. Build and flash the complete image including: bootloader, partition table and app. These partitions are initially written to the flash unencrypted.
  88. ::
  89. idf.py flash monitor
  90. Once the flashing is complete device will reset and on next boot second stage bootloader will encrypt the flash app partition and then reset. Now the sample application would get decrypted at runtime and executed. Below is a sample output when ESP32 boots after flash encryption is enabled for the first time.
  91. ::
  92. --- idf_monitor on /dev/cu.SLAB_USBtoUART 115200 ---
  93. --- Quit: Ctrl+] | Menu: Ctrl+T | Help: Ctrl+T followed by Ctrl+H ---
  94. ets Jun 8 2016 00:22:57
  95. rst:0x1 (POWERON_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
  96. configsip: 0, SPIWP:0xee
  97. clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
  98. mode:DIO, clock div:2
  99. load:0x3fff0018,len:4
  100. load:0x3fff001c,len:8452
  101. load:0x40078000,len:13608
  102. load:0x40080400,len:6664
  103. entry 0x40080764
  104. I (28) boot: ESP-IDF v4.0-dev-850-gc4447462d-dirty 2nd stage bootloader
  105. I (29) boot: compile time 15:37:14
  106. I (30) boot: Enabling RNG early entropy source...
  107. I (35) boot: SPI Speed : 40MHz
  108. I (39) boot: SPI Mode : DIO
  109. I (43) boot: SPI Flash Size : 4MB
  110. I (47) boot: Partition Table:
  111. I (51) boot: ## Label Usage Type ST Offset Length
  112. I (58) boot: 0 nvs WiFi data 01 02 0000a000 00006000
  113. I (66) boot: 1 phy_init RF data 01 01 00010000 00001000
  114. I (73) boot: 2 factory factory app 00 00 00020000 00100000
  115. I (81) boot: End of partition table
  116. I (85) esp_image: segment 0: paddr=0x00020020 vaddr=0x3f400020 size=0x0808c ( 32908) map
  117. I (105) esp_image: segment 1: paddr=0x000280b4 vaddr=0x3ffb0000 size=0x01ea4 ( 7844) load
  118. I (109) esp_image: segment 2: paddr=0x00029f60 vaddr=0x40080000 size=0x00400 ( 1024) load
  119. 0x40080000: _WindowOverflow4 at esp-idf/esp-idf/components/freertos/xtensa_vectors.S:1778
  120. I (114) esp_image: segment 3: paddr=0x0002a368 vaddr=0x40080400 size=0x05ca8 ( 23720) load
  121. I (132) esp_image: segment 4: paddr=0x00030018 vaddr=0x400d0018 size=0x126a8 ( 75432) map
  122. 0x400d0018: _flash_cache_start at ??:?
  123. I (159) esp_image: segment 5: paddr=0x000426c8 vaddr=0x400860a8 size=0x01f4c ( 8012) load
  124. 0x400860a8: prvAddNewTaskToReadyList at esp-idf/esp-idf/components/freertos/tasks.c:4561
  125. I (168) boot: Loaded app from partition at offset 0x20000
  126. I (168) boot: Checking flash encryption...
  127. I (168) flash_encrypt: Generating new flash encryption key...
  128. I (187) flash_encrypt: Read & write protecting new key...
  129. I (187) flash_encrypt: Setting CRYPT_CONFIG efuse to 0xF
  130. W (188) flash_encrypt: Not disabling UART bootloader encryption
  131. I (195) flash_encrypt: Disable UART bootloader decryption...
  132. I (201) flash_encrypt: Disable UART bootloader MMU cache...
  133. I (208) flash_encrypt: Disable JTAG...
  134. I (212) flash_encrypt: Disable ROM BASIC interpreter fallback...
  135. I (219) esp_image: segment 0: paddr=0x00001020 vaddr=0x3fff0018 size=0x00004 ( 4)
  136. I (227) esp_image: segment 1: paddr=0x0000102c vaddr=0x3fff001c size=0x02104 ( 8452)
  137. I (239) esp_image: segment 2: paddr=0x00003138 vaddr=0x40078000 size=0x03528 ( 13608)
  138. I (249) esp_image: segment 3: paddr=0x00006668 vaddr=0x40080400 size=0x01a08 ( 6664)
  139. I (657) esp_image: segment 0: paddr=0x00020020 vaddr=0x3f400020 size=0x0808c ( 32908) map
  140. I (669) esp_image: segment 1: paddr=0x000280b4 vaddr=0x3ffb0000 size=0x01ea4 ( 7844)
  141. I (672) esp_image: segment 2: paddr=0x00029f60 vaddr=0x40080000 size=0x00400 ( 1024)
  142. 0x40080000: _WindowOverflow4 at esp-idf/esp-idf/components/freertos/xtensa_vectors.S:1778
  143. I (676) esp_image: segment 3: paddr=0x0002a368 vaddr=0x40080400 size=0x05ca8 ( 23720)
  144. I (692) esp_image: segment 4: paddr=0x00030018 vaddr=0x400d0018 size=0x126a8 ( 75432) map
  145. 0x400d0018: _flash_cache_start at ??:?
  146. I (719) esp_image: segment 5: paddr=0x000426c8 vaddr=0x400860a8 size=0x01f4c ( 8012)
  147. 0x400860a8: prvAddNewTaskToReadyList at esp-idf/esp-idf/components/freertos/tasks.c:4561
  148. I (722) flash_encrypt: Encrypting partition 2 at offset 0x20000...
  149. I (13229) flash_encrypt: Flash encryption completed
  150. I (13229) boot: Resetting with flash encryption enabled...
  151. Once the flash encryption is enabled, on subsequent boot the output would mention that flash encryption is already enabled.
  152. ::
  153. rst:0x1 (POWERON_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
  154. configsip: 0, SPIWP:0xee
  155. clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
  156. mode:DIO, clock div:2
  157. load:0x3fff0018,len:4
  158. load:0x3fff001c,len:8452
  159. load:0x40078000,len:13652
  160. ho 0 tail 12 room 4
  161. load:0x40080400,len:6664
  162. entry 0x40080764
  163. I (30) boot: ESP-IDF v4.0-dev-850-gc4447462d-dirty 2nd stage bootloader
  164. I (30) boot: compile time 16:32:53
  165. I (31) boot: Enabling RNG early entropy source...
  166. I (37) boot: SPI Speed : 40MHz
  167. I (41) boot: SPI Mode : DIO
  168. I (45) boot: SPI Flash Size : 4MB
  169. I (49) boot: Partition Table:
  170. I (52) boot: ## Label Usage Type ST Offset Length
  171. I (60) boot: 0 nvs WiFi data 01 02 0000a000 00006000
  172. I (67) boot: 1 phy_init RF data 01 01 00010000 00001000
  173. I (75) boot: 2 factory factory app 00 00 00020000 00100000
  174. I (82) boot: End of partition table
  175. I (86) esp_image: segment 0: paddr=0x00020020 vaddr=0x3f400020 size=0x0808c ( 32908) map
  176. I (107) esp_image: segment 1: paddr=0x000280b4 vaddr=0x3ffb0000 size=0x01ea4 ( 7844) load
  177. I (111) esp_image: segment 2: paddr=0x00029f60 vaddr=0x40080000 size=0x00400 ( 1024) load
  178. 0x40080000: _WindowOverflow4 at esp-idf/esp-idf/components/freertos/xtensa_vectors.S:1778
  179. I (116) esp_image: segment 3: paddr=0x0002a368 vaddr=0x40080400 size=0x05ca8 ( 23720) load
  180. I (134) esp_image: segment 4: paddr=0x00030018 vaddr=0x400d0018 size=0x126a8 ( 75432) map
  181. 0x400d0018: _flash_cache_start at ??:?
  182. I (162) esp_image: segment 5: paddr=0x000426c8 vaddr=0x400860a8 size=0x01f4c ( 8012) load
  183. 0x400860a8: prvAddNewTaskToReadyList at esp-idf/esp-idf/components/freertos/tasks.c:4561
  184. I (171) boot: Loaded app from partition at offset 0x20000
  185. I (171) boot: Checking flash encryption...
  186. I (171) flash_encrypt: flash encryption is enabled (3 plaintext flashes left)
  187. I (178) boot: Disabling RNG early entropy source...
  188. I (184) cpu_start: Pro cpu up.
  189. I (188) cpu_start: Application information:
  190. I (193) cpu_start: Project name: flash-encryption
  191. I (198) cpu_start: App version: v4.0-dev-850-gc4447462d-dirty
  192. I (205) cpu_start: Compile time: Jun 17 2019 16:32:52
  193. I (211) cpu_start: ELF file SHA256: 8770c886bdf561a7...
  194. I (217) cpu_start: ESP-IDF: v4.0-dev-850-gc4447462d-dirty
  195. I (224) cpu_start: Starting app cpu, entry point is 0x40080e4c
  196. 0x40080e4c: call_start_cpu1 at esp-idf/esp-idf/components/esp32/cpu_start.c:265
  197. I (0) cpu_start: App cpu up.
  198. I (235) heap_init: Initializing. RAM available for dynamic allocation:
  199. I (241) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
  200. I (247) heap_init: At 3FFB2EC8 len 0002D138 (180 KiB): DRAM
  201. I (254) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM
  202. I (260) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
  203. I (266) heap_init: At 40087FF4 len 0001800C (96 KiB): IRAM
  204. I (273) cpu_start: Pro cpu start user code
  205. I (291) cpu_start: Starting scheduler on PRO CPU.
  206. I (0) cpu_start: Starting scheduler on APP CPU.
  207. Sample program to check Flash Encryption
  208. This is ESP32 chip with 2 CPU cores, WiFi/BT/BLE, silicon revision 1, 4MB external flash
  209. Flash encryption feature is enabled
  210. Flash encryption mode is DEVELOPMENT
  211. Flash in encrypted mode with flash_crypt_cnt = 1
  212. Halting...
  213. At this stage if user wants to update modified plaintext application image to flash in encrypted format it can be done using following command:
  214. ::
  215. idf.py encrypted-app-flash monitor
  216. .. _encrypt_partitions:
  217. Encrypt Multiple Partitions
  218. ^^^^^^^^^^^^^^^^^^^^^^^^^^^
  219. If all partitions needs to be updated in encrypted format, it can be done as
  220. ::
  221. idf.py encrypted-flash monitor
  222. .. _pregenerated-flash-encryption-key:
  223. Using Host Generated Flash Encryption Key
  224. ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
  225. It is possible to pregenerate the flash encryption key on the host computer and burn it into the ESP32's eFuse key block. This allows data to be pre-encrypted on the host and flashed to the ESP32 without needing a plaintext flash update. This feature allows encrypted flashing in both :ref:`flash_enc_development_mode` and :ref:`flash_enc_release_mode` modes.
  226. .. note:: This option is not recommended for production unless a separate key is generated for each individual device.
  227. - Ensure you have a ESP32 device with default flash encryption eFuse settings as shown in :ref:`flash-encryption-efuse`.
  228. - Generate a random key with espsecure.py::
  229. espsecure.py generate_flash_encryption_key my_flash_encryption_key.bin
  230. - Burn the key to the device (one time only). **This must be done before first encrypted boot**, otherwise the ESP32 will generate a random key that software can't access or modify::
  231. espefuse.py --port PORT burn_key flash_encryption my_flash_encryption_key.bin
  232. - Enable flash encryption support in second stage bootloader. In :ref:`project-configuration-menu`, navigate to "Security Features".
  233. - Select :ref:`Enable flash encryption on boot <CONFIG_SECURE_FLASH_ENC_ENABLED>`.
  234. - By default the mode is set for **Development**.
  235. - Select appropriate Bootloader log verbosity under Bootloader config.
  236. - Update to the partition table offset may be required since after enabling flash encryption the size of bootloader is increased. See :ref:`secure-boot-bootloader-size`
  237. - Save the configuration and exit.
  238. Build and flash the complete image including: bootloader, partition table and app. These partitions are initially written to the flash unencrypted
  239. ::
  240. idf.py flash monitor
  241. On next boot second stage bootloader will encrypt the flash app partition and then reset. Now the sample application would get decrypted at runtime and executed.
  242. At this stage if user wants to update new plaintext application image to flash they should issue following command
  243. ::
  244. idf.py encrypted-app-flash monitor
  245. For reprogramming all partitions in encrypted format follow :ref:`encrypt_partitions`.
  246. .. _flash_enc_release_mode:
  247. Release Mode
  248. ^^^^^^^^^^^^
  249. In Release mode UART bootloader can not perform flash encryption operations and new plaintext images can be downloaded ONLY using OTA scheme which will encrypt the plaintext image before writing to flash.
  250. - Ensure you have a ESP32 device with default flash encryption eFuse settings as shown in :ref:`flash-encryption-efuse`.
  251. - Enable flash encryption support in second stage bootloader. In :ref:`project-configuration-menu`, navigate to "Security Features".
  252. - Select :ref:`Enable flash encryption on boot <CONFIG_SECURE_FLASH_ENC_ENABLED>`.
  253. - Select **Release Mode**, by default the mode is set for **Development**. Please note **once the Release mode is selected the ``download_dis_encrypt`` and ``download_dis_decrypt`` eFuse bits will be programmed to disable UART bootloader access to flash contents**.
  254. - Select appropriate Bootloader log verbosity under Bootloader config.
  255. - Update to the partition table offset may be required since after enabling flash encryption the size of bootloader is increased. See :ref:`secure-boot-bootloader-size`
  256. - Save the configuration and exit.
  257. Build and flash the complete image including: bootloader, partition table and app. These partitions are initially written to the flash unencrypted
  258. ::
  259. idf.py flash monitor
  260. On next boot second stage bootloader will encrypt the flash app partition and then reset. Now the sample application should execute correctly.
  261. Once the flash encryption is enabled in Release mode the bootloader will write protect the ``FLASH_CRYPT_CNT`` eFuse.
  262. For subsequent plaintext update in field OTA scheme should be used. Please refer :doc:`OTA <../api-reference/system/ota>` for further details.
  263. Possible Failures
  264. ^^^^^^^^^^^^^^^^^
  265. Once flash encryption is enabled and if the ``FLASH_CRYPT_CNT`` eFuse value has an odd number of bits set then all the partitions (which are marked with encryption flag) are expected to contain encrypted ciphertext. Below are three typical failure cases if the ESP32 is loaded with plaintext data:
  266. 1. In case the bootloader partition is re-updated with plaintext bootloader image the ROM loader will fail to load the bootloader and following type of failure will be displayed:
  267. ::
  268. rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
  269. flash read err, 1000
  270. ets_main.c 371
  271. ets Jun 8 2016 00:22:57
  272. rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
  273. flash read err, 1000
  274. ets_main.c 371
  275. ets Jun 8 2016 00:22:57
  276. rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
  277. flash read err, 1000
  278. ets_main.c 371
  279. ets Jun 8 2016 00:22:57
  280. rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
  281. flash read err, 1000
  282. ets_main.c 371
  283. ets Jun 8 2016 00:22:57
  284. rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
  285. flash read err, 1000
  286. ets_main.c 371
  287. ets Jun 8 2016 00:22:57
  288. .. note:: This error also appears in the flash contents is erased or corrupted.
  289. 2. In case the bootloader is encrypted but partition table is re-updated with plaintext partition table image the bootloader will fail to read the partition table and following type of failure will be displayed:
  290. ::
  291. rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
  292. configsip: 0, SPIWP:0xee
  293. clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
  294. mode:DIO, clock div:2
  295. load:0x3fff0018,len:4
  296. load:0x3fff001c,len:10464
  297. ho 0 tail 12 room 4
  298. load:0x40078000,len:19168
  299. load:0x40080400,len:6664
  300. entry 0x40080764
  301. I (60) boot: ESP-IDF v4.0-dev-763-g2c55fae6c-dirty 2nd stage bootloader
  302. I (60) boot: compile time 19:15:54
  303. I (62) boot: Enabling RNG early entropy source...
  304. I (67) boot: SPI Speed : 40MHz
  305. I (72) boot: SPI Mode : DIO
  306. I (76) boot: SPI Flash Size : 4MB
  307. E (80) flash_parts: partition 0 invalid magic number 0x94f6
  308. E (86) boot: Failed to verify partition table
  309. E (91) boot: load partition table error!
  310. 3. In case the bootloader & partition table are encrypted but application is re-updated with plaintext application image the bootloader will fail load the new application and following type of failure will be displayed:
  311. ::
  312. rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
  313. configsip: 0, SPIWP:0xee
  314. clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
  315. mode:DIO, clock div:2
  316. load:0x3fff0018,len:4
  317. load:0x3fff001c,len:8452
  318. load:0x40078000,len:13616
  319. load:0x40080400,len:6664
  320. entry 0x40080764
  321. I (56) boot: ESP-IDF v4.0-dev-850-gc4447462d-dirty 2nd stage bootloader
  322. I (56) boot: compile time 15:37:14
  323. I (58) boot: Enabling RNG early entropy source...
  324. I (64) boot: SPI Speed : 40MHz
  325. I (68) boot: SPI Mode : DIO
  326. I (72) boot: SPI Flash Size : 4MB
  327. I (76) boot: Partition Table:
  328. I (79) boot: ## Label Usage Type ST Offset Length
  329. I (87) boot: 0 nvs WiFi data 01 02 0000a000 00006000
  330. I (94) boot: 1 phy_init RF data 01 01 00010000 00001000
  331. I (102) boot: 2 factory factory app 00 00 00020000 00100000
  332. I (109) boot: End of partition table
  333. E (113) esp_image: image at 0x20000 has invalid magic byte
  334. W (120) esp_image: image at 0x20000 has invalid SPI mode 108
  335. W (126) esp_image: image at 0x20000 has invalid SPI size 11
  336. E (132) boot: Factory app partition is not bootable
  337. E (138) boot: No bootable app partitions in the partition table
  338. Key Points About Flash Encryption
  339. ---------------------------------
  340. - The contents of the flash are encrypted using AES-256. The flash encryption key is stored in eFuse internal to the chip, and is (by default) protected from software access.
  341. - The `flash encryption algorithm` is AES-256, where the key is "tweaked" with the offset address of each 32 byte block of flash. This means every 32 byte block (two consecutive 16 byte AES blocks) is encrypted with a unique key derived from the flash encryption key.
  342. - Flash access is transparent via the flash cache mapping feature of ESP32 - any flash regions which are mapped to the address space will be transparently decrypted when read.
  343. It may be desirable for some data partitions to remain unencrypted for ease of access, or to use flash-friendly update algorithms that are ineffective if the data is encrypted. NVS partitions for non-volatile storage cannot be encrypted since NVS library is not directly compatible with flash encryption. Refer to :ref:`NVS Encryption <nvs_encryption>` for more details.
  344. - If flash encryption may be enabled, the programmer must take certain precautions when writing code that :ref:`uses encrypted flash <using-encrypted-flash>`.
  345. - If secure boot is enabled, reflashing the bootloader of an encrypted device requires a "Reflashable" secure boot digest (see :ref:`flash-encryption-and-secure-boot`).
  346. .. note:: The bootloader app binary ``bootloader.bin`` may become too large when both secure boot and flash encryption are enabled. See :ref:`secure-boot-bootloader-size`.
  347. .. important::
  348. Do not interrupt power to the ESP32 while the first boot encryption pass is running. If power is interrupted, the flash contents will be corrupted and require flashing with unencrypted data again. A reflash like this will not count towards the flashing limit.
  349. .. _using-encrypted-flash:
  350. Using Encrypted Flash
  351. ---------------------
  352. ESP32 app code can check if flash encryption is currently enabled by calling :cpp:func:`esp_flash_encryption_enabled`. Also, device can identify the flash encryption mode by calling :cpp:func:`esp_get_flash_encryption_mode`.
  353. Once flash encryption is enabled, some care needs to be taken when accessing flash contents from code.
  354. Scope of Flash Encryption
  355. ^^^^^^^^^^^^^^^^^^^^^^^^^
  356. Whenever the ``FLASH_CRYPT_CNT`` eFuse is set to a value with an odd number of bits set, all flash content which is accessed via the MMU's flash cache is transparently decrypted. This includes:
  357. - Executable application code in flash (IROM).
  358. - All read-only data stored in flash (DROM).
  359. - Any data accessed via :cpp:func:`spi_flash_mmap`.
  360. - The software bootloader image when it is read by the ROM bootloader.
  361. .. important::
  362. The MMU flash cache unconditionally decrypts all data. Data which is stored unencrypted in the flash will be "transparently decrypted" via the flash cache and appear to software like random garbage.
  363. Reading Encrypted Flash
  364. ^^^^^^^^^^^^^^^^^^^^^^^
  365. To read data without using a flash cache MMU mapping, we recommend using the partition read function :cpp:func:`esp_partition_read`. When using this function, data will only be decrypted when it is read from an encrypted partition. Other partitions will be read unencrypted. In this way, software can access encrypted and non-encrypted flash in the same way.
  366. Data which is read via other SPI read APIs are not decrypted:
  367. - Data read via :cpp:func:`spi_flash_read` is not decrypted.
  368. - Data read via ROM function :cpp:func:`SPIRead` is not decrypted (this function is not supported in esp-idf apps).
  369. - Data stored using the Non-Volatile Storage (NVS) API is always stored and read decrypted from the perspective of flash encryption. It is up to the library to provide encryption feature if required. Refer to :ref:`NVS Encryption <nvs_encryption>` for more details.
  370. Writing Encrypted Flash
  371. ^^^^^^^^^^^^^^^^^^^^^^^
  372. Where possible, we recommend using the partition write function ``esp_partition_write``. When using this function, data will only be encrypted when writing to encrypted partitions. Data will be written to other partitions unencrypted. In this way, software can access encrypted and non-encrypted flash in the same way.
  373. The ``esp_spi_flash_write`` function will write data when the write_encrypted parameter is set to true. Otherwise, data will be written unencrypted.
  374. The ROM function ``esp_rom_spiflash_write_encrypted`` will write encrypted data to flash, the ROM function ``SPIWrite`` will write unencrypted to flash. (these function are not supported in esp-idf apps).
  375. Because data is encrypted in blocks, the minimum write size for encrypted data is 16 bytes (and the alignment is 16 bytes).
  376. .. _updating-encrypted-flash:
  377. Updating Encrypted Flash
  378. ------------------------
  379. .. _updating-encrypted-flash-ota:
  380. OTA Updates
  381. ^^^^^^^^^^^
  382. OTA updates to encrypted partitions will automatically write encrypted, as long as the ``esp_partition_write`` function is used.
  383. .. _updating-encrypted-flash-serial:
  384. Disabling Flash Encryption
  385. --------------------------
  386. If you've accidentally enabled flash encryption for some reason, the next flash of plaintext data will soft-brick the ESP32 (the device will reboot continuously, printing the error ``flash read err, 1000``).
  387. If flash encryption is enabled in Development mode, you can disable flash encryption again by writing ``FLASH_CRYPT_CNT`` eFuse. This can only be done three times per chip.
  388. - First, open :ref:`project-configuration-menu` and disable :ref:`Enable flash encryption boot <CONFIG_SECURE_FLASH_ENC_ENABLED>` under "Security Features".
  389. - Exit menuconfig and save the new configuration.
  390. - Run ``idf.py menuconfig`` again and double-check you really disabled this option! *If this option is left enabled, the bootloader will immediately re-enable encryption when it boots*.
  391. - Run ``idf.py flash`` to build and flash a new bootloader and app, without flash encryption enabled.
  392. - Run ``espefuse.py`` (in ``components/esptool_py/esptool``) to disable the FLASH_CRYPT_CNT::
  393. espefuse.py burn_efuse FLASH_CRYPT_CNT
  394. Reset the ESP32 and flash encryption should be disabled, the bootloader will boot as normal.
  395. .. _flash-encryption-limitations:
  396. Limitations of Flash Encryption
  397. -------------------------------
  398. Flash encryption prevents plaintext readout of the encrypted flash, to protect firmware against unauthorised readout and modification. It is important to understand the limitations of the flash encryption system:
  399. - Flash encryption is only as strong as the key. For this reason, we recommend keys are generated on the device during first boot (default behaviour). If generating keys off-device, ensure proper procedure is followed and don't share the same key between all production devices.
  400. - Not all data is stored encrypted. If storing data on flash, check if the method you are using (library, API, etc.) supports flash encryption.
  401. - Flash encryption does not prevent an attacker from understanding the high-level layout of the flash. This is because the same AES key is used for every pair of adjacent 16 byte AES blocks. When these adjacent 16 byte blocks contain identical content (such as empty or padding areas), these blocks will encrypt to produce matching pairs of encrypted blocks. This may allow an attacker to make high-level comparisons between encrypted devices (i.e. to tell if two devices are probably running the same firmware version).
  402. - For the same reason, an attacker can always tell when a pair of adjacent 16 byte blocks (32 byte aligned) contain two identical 16 byte sequences. Keep this in mind if storing sensitive data on the flash, design your flash storage so this doesn't happen (using a counter byte or some other non-identical value every 16 bytes is sufficient). :ref:`NVS Encryption <nvs_encryption>` deals with this and is suitable for many uses.
  403. - Flash encryption alone may not prevent an attacker from modifying the firmware of the device. To prevent unauthorised firmware from running on the device, use flash encryption in combination with :doc:`Secure Boot <secure-boot>`.
  404. .. _flash-encryption-and-secure-boot:
  405. Flash Encryption and Secure Boot
  406. ---------------------------------
  407. It is recommended to use flash encryption and secure boot together. However, if Secure Boot is enabled then additional restrictions apply to reflashing the device:
  408. - :ref:`updating-encrypted-flash-ota` are not restricted (provided the new app is signed correctly with the Secure Boot signing key).
  409. - :ref:`Plaintext serial flash updates <updating-encrypted-flash-serial>` are only possible if the :ref:`Reflashable <CONFIG_SECURE_BOOTLOADER_MODE>` Secure Boot mode is selected and a Secure Boot key was pre-generated and burned to the ESP32 (refer to :ref:`Secure Boot <secure-boot-reflashable>` docs.). In this configuration, ``idf.py bootloader`` will produce a pre-digested bootloader and secure boot digest file for flashing at offset 0x0. When following the plaintext serial reflashing steps it is necessary to re-flash this file before flashing other plaintext data.
  410. - :ref:`Reflashing via Pregenerated Flash Encryption Key <pregenerated-flash-encryption-key>` is still possible, provided the bootloader is not reflashed. Reflashing the bootloader requires the same :ref:`Reflashable <CONFIG_SECURE_BOOTLOADER_MODE>` option to be enabled in the Secure Boot config.
  411. .. _flash-encryption-advanced-features:
  412. Flash Encryption Advanced Features
  413. ----------------------------------
  414. The following information is useful for advanced use of flash encryption:
  415. Encrypted Partition Flag
  416. ^^^^^^^^^^^^^^^^^^^^^^^^
  417. Some partitions are encrypted by default. Otherwise, it is possible to mark any partition as requiring encryption:
  418. In the :doc:`partition table <../api-guides/partition-tables>` description CSV files, there is a field for flags.
  419. Usually left blank, if you write "encrypted" in this field then the partition will be marked as encrypted in the partition table, and data written here will be treated as encrypted (same as an app partition)::
  420. # Name, Type, SubType, Offset, Size, Flags
  421. nvs, data, nvs, 0x9000, 0x6000
  422. phy_init, data, phy, 0xf000, 0x1000
  423. factory, app, factory, 0x10000, 1M
  424. secret_data, 0x40, 0x01, 0x20000, 256K, encrypted
  425. - None of the default partition tables include any encrypted data partitions.
  426. - It is not necessary to mark "app" partitions as encrypted, they are always treated as encrypted.
  427. - The "encrypted" flag does nothing if flash encryption is not enabled.
  428. - It is possible to mark the optional ``phy`` partition with ``phy_init`` data as encrypted, if you wish to protect this data from physical access readout or modification.
  429. - It is not possible to mark the ``nvs`` partition as encrypted.
  430. .. _uart-bootloader-encryption:
  431. Enabling UART Bootloader Encryption/Decryption
  432. ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
  433. By default, on first boot the flash encryption process will burn eFuses ``DISABLE_DL_ENCRYPT``, ``DISABLE_DL_DECRYPT`` and ``DISABLE_DL_CACHE``:
  434. - ``DISABLE_DL_ENCRYPT`` disables the flash encryption operations when running in UART bootloader boot mode.
  435. - ``DISABLE_DL_DECRYPT`` disables transparent flash decryption when running in UART bootloader mode, even if FLASH_CRYPT_CNT is set to enable it in normal operation.
  436. - ``DISABLE_DL_CACHE`` disables the entire MMU flash cache when running in UART bootloader mode.
  437. It is possible to burn only some of these eFuses, and write-protect the rest (with unset value 0) before the first boot, in order to preserve them. For example::
  438. espefuse.py --port PORT burn_efuse DISABLE_DL_DECRYPT
  439. espefuse.py --port PORT write_protect_efuse DISABLE_DL_ENCRYPT
  440. (Note that all 3 of these eFuses are disabled via one write protect bit, so write protecting one will write protect all of them. For this reason, it's necessary to set any bits before write-protecting.)
  441. .. important::
  442. Write protecting these eFuses to keep them unset is not currently very useful, as ``esptool.py`` does not support reading encrypted flash.
  443. .. important::
  444. If ``DISABLE_DL_DECRYPT`` is left unset (0) this effectively makes flash encryption useless, as an attacker with physical access can use UART bootloader mode (with custom stub code) to read out the flash contents.
  445. .. _setting-flash-crypt-config:
  446. Setting FLASH_CRYPT_CONFIG
  447. ^^^^^^^^^^^^^^^^^^^^^^^^^^
  448. The ``FLASH_CRYPT_CONFIG`` eFuse determines the number of bits in the flash encryption key which are "tweaked" with the block offset. See :ref:`flash-encryption-algorithm` for details.
  449. First boot of the bootloader always sets this value to the maximum `0xF`.
  450. It is possible to write these eFuse manually, and write protect it before first boot in order to select different tweak values. This is not recommended.
  451. It is strongly recommended to never write protect ``FLASH_CRYPT_CONFIG`` when it the value is zero. If this eFuse is set to zero, no bits in the flash encryption key are tweaked and the flash encryption algorithm is equivalent to AES ECB mode.
  452. Technical Details
  453. -----------------
  454. The following sections provide some reference information about the operation of flash encryption.
  455. .. _flash-encryption-algorithm:
  456. Flash Encryption Algorithm
  457. ^^^^^^^^^^^^^^^^^^^^^^^^^^
  458. - AES-256 operates on 16 byte blocks of data. The flash encryption engine encrypts and decrypts data in 32 byte blocks, two AES blocks in series.
  459. - The main flash encryption key is stored in eFuse (BLOCK1) and by default is protected from further writes or software readout.
  460. - AES-256 key size is 256 bits (32 bytes), read from eFuse block 1. The hardware AES engine uses the key in reversed byte order to the order stored in the eFuse block.
  461. - If ``CODING_SCHEME`` eFuse is set to 0 (default "None" Coding Scheme) then the eFuse key block is 256 bits and the key is stored as-is (in reversed byte order).
  462. - If ``CODING_SCHEME`` eFuse is set to 1 (3/4 Encoding) then the eFuse key block is 192 bits (in reversed byte order), so overall entropy is reduced. The hardware flash encryption still operates on a 256-bit key, after being read (and un-reversed), the key is extended by as ``key = key[0:255] + key[64:127]``.
  463. - AES algorithm is used inverted in flash encryption, so the flash encryption "encrypt" operation is AES decrypt and the "decrypt" operation is AES encrypt. This is for performance reasons and does not alter the effectiveness of the algorithm.
  464. - Each 32 byte block (two adjacent 16 byte AES blocks) is encrypted with a unique key. The key is derived from the main flash encryption key in eFuse, XORed with the offset of this block in the flash (a "key tweak").
  465. - The specific tweak depends on the setting of ``FLASH_CRYPT_CONFIG`` eFuse. This is a 4 bit eFuse, where each bit enables XORing of a particular range of the key bits:
  466. - Bit 1, bits 0-66 of the key are XORed.
  467. - Bit 2, bits 67-131 of the key are XORed.
  468. - Bit 3, bits 132-194 of the key are XORed.
  469. - Bit 4, bits 195-256 of the key are XORed.
  470. It is recommended that ``FLASH_CRYPT_CONFIG`` is always left to set the default value `0xF`, so that all key bits are XORed with the block offset. See :ref:`setting-flash-crypt-config` for details.
  471. - The high 19 bits of the block offset (bit 5 to bit 23) are XORed with the main flash encryption key. This range is chosen for two reasons: the maximum flash size is 16MB (24 bits), and each block is 32 bytes so the least significant 5 bits are always zero.
  472. - There is a particular mapping from each of the 19 block offset bits to the 256 bits of the flash encryption key, to determine which bit is XORed with which. See the variable ``_FLASH_ENCRYPTION_TWEAK_PATTERN`` in the ``espsecure.py`` source code for the complete mapping.
  473. - To see the full flash encryption algorithm implemented in Python, refer to the `_flash_encryption_operation()` function in the ``espsecure.py`` source code.