bt.c 18 KB

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  1. // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. // http://www.apache.org/licenses/LICENSE-2.0
  7. //
  8. // Unless required by applicable law or agreed to in writing, software
  9. // distributed under the License is distributed on an "AS IS" BASIS,
  10. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  11. // See the License for the specific language governing permissions and
  12. // limitations under the License.
  13. #include <stddef.h>
  14. #include <stdlib.h>
  15. #include <stdio.h>
  16. #include <string.h>
  17. #include "esp_heap_caps_init.h"
  18. #include "freertos/FreeRTOS.h"
  19. #include "freertos/task.h"
  20. #include "freertos/queue.h"
  21. #include "freertos/semphr.h"
  22. #include "freertos/xtensa_api.h"
  23. #include "freertos/portmacro.h"
  24. #include "xtensa/core-macros.h"
  25. #include "esp_types.h"
  26. #include "esp_system.h"
  27. #include "esp_task.h"
  28. #include "esp_intr.h"
  29. #include "esp_attr.h"
  30. #include "esp_phy_init.h"
  31. #include "bt.h"
  32. #include "esp_err.h"
  33. #include "esp_log.h"
  34. #include "esp_pm.h"
  35. #include "esp_ipc.h"
  36. #include "driver/periph_ctrl.h"
  37. #if CONFIG_BT_ENABLED
  38. #define BTDM_LOG_TAG "BTDM_INIT"
  39. #define BTDM_INIT_PERIOD (5000) /* ms */
  40. /* Bluetooth system and controller config */
  41. #define BTDM_CFG_BT_DATA_RELEASE (1<<0)
  42. #define BTDM_CFG_HCI_UART (1<<1)
  43. #define BTDM_CFG_CONTROLLER_RUN_APP_CPU (1<<2)
  44. /* Other reserved for future */
  45. /* not for user call, so don't put to include file */
  46. extern void btdm_osi_funcs_register(void *osi_funcs);
  47. extern int btdm_controller_init(uint32_t config_mask, esp_bt_controller_config_t *config_opts);
  48. extern int btdm_controller_deinit(void);
  49. extern int btdm_controller_enable(esp_bt_mode_t mode);
  50. extern int btdm_controller_disable(esp_bt_mode_t mode);
  51. extern uint8_t btdm_controller_get_mode(void);
  52. extern void btdm_rf_bb_init(void);
  53. /* VHCI function interface */
  54. typedef struct vhci_host_callback {
  55. void (*notify_host_send_available)(void); /*!< callback used to notify that the host can send packet to controller */
  56. int (*notify_host_recv)(uint8_t *data, uint16_t len); /*!< callback used to notify that the controller has a packet to send to the host*/
  57. } vhci_host_callback_t;
  58. extern bool API_vhci_host_check_send_available(void);
  59. extern void API_vhci_host_send_packet(uint8_t *data, uint16_t len);
  60. extern void API_vhci_host_register_callback(const vhci_host_callback_t *callback);
  61. extern int ble_txpwr_set(int power_type, int power_level);
  62. extern int ble_txpwr_get(int power_type);
  63. extern char _bss_start_btdm;
  64. extern char _bss_end_btdm;
  65. extern char _data_start_btdm;
  66. extern char _data_end_btdm;
  67. extern uint32_t _data_start_btdm_rom;
  68. extern uint32_t _data_end_btdm_rom;
  69. #define BT_DEBUG(...)
  70. #define BT_API_CALL_CHECK(info, api_call, ret) \
  71. do{\
  72. esp_err_t __err = (api_call);\
  73. if ((ret) != __err) {\
  74. BT_DEBUG("%s %d %s ret=%d\n", __FUNCTION__, __LINE__, (info), __err);\
  75. return __err;\
  76. }\
  77. } while(0)
  78. #define OSI_FUNCS_TIME_BLOCKING 0xffffffff
  79. typedef struct {
  80. esp_bt_mode_t mode;
  81. intptr_t start;
  82. intptr_t end;
  83. } btdm_dram_available_region_t;
  84. /* the mode column will be modifid by release function to indicate the available region */
  85. static btdm_dram_available_region_t btdm_dram_available_region[] = {
  86. //following is .data
  87. {ESP_BT_MODE_BTDM, 0x3ffae6e0, 0x3ffaff10},
  88. //following is memory which HW will use
  89. {ESP_BT_MODE_BTDM, 0x3ffb0000, 0x3ffb09a8},
  90. {ESP_BT_MODE_BLE, 0x3ffb09a8, 0x3ffb1ddc},
  91. {ESP_BT_MODE_BTDM, 0x3ffb1ddc, 0x3ffb2730},
  92. {ESP_BT_MODE_CLASSIC_BT, 0x3ffb2730, 0x3ffb8000},
  93. //following is .bss
  94. {ESP_BT_MODE_BTDM, 0x3ffb8000, 0x3ffbbb28},
  95. {ESP_BT_MODE_CLASSIC_BT, 0x3ffbbb28, 0x3ffbdb28},
  96. {ESP_BT_MODE_BTDM, 0x3ffbdb28, 0x3ffc0000},
  97. };
  98. struct osi_funcs_t {
  99. xt_handler (*_set_isr)(int n, xt_handler f, void *arg);
  100. void (*_ints_on)(unsigned int mask);
  101. void (*_interrupt_disable)(void);
  102. void (*_interrupt_restore)(void);
  103. void (*_task_yield)(void);
  104. void (*_task_yield_from_isr)(void);
  105. void *(*_semphr_create)(uint32_t max, uint32_t init);
  106. void (*_semphr_delete)(void *semphr);
  107. int32_t (*_semphr_take_from_isr)(void *semphr, void *hptw);
  108. int32_t (*_semphr_give_from_isr)(void *semphr, void *hptw);
  109. int32_t (*_semphr_take)(void *semphr, uint32_t block_time_ms);
  110. int32_t (*_semphr_give)(void *semphr);
  111. void *(*_mutex_create)(void);
  112. void (*_mutex_delete)(void *mutex);
  113. int32_t (*_mutex_lock)(void *mutex);
  114. int32_t (*_mutex_unlock)(void *mutex);
  115. void *(* _queue_create)(uint32_t queue_len, uint32_t item_size);
  116. void (* _queue_delete)(void *queue);
  117. int32_t (* _queue_send)(void *queue, void *item, uint32_t block_time_ms);
  118. int32_t (* _queue_send_from_isr)(void *queue, void *item, void *hptw);
  119. int32_t (* _queue_recv)(void *queue, void *item, uint32_t block_time_ms);
  120. int32_t (* _queue_recv_from_isr)(void *queue, void *item, void *hptw);
  121. int32_t (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  122. void (* _task_delete)(void *task_handle);
  123. bool (* _is_in_isr)(void);
  124. int (* _cause_sw_intr_to_core)(int core_id, int intr_no);
  125. void *(* _malloc)(uint32_t size);
  126. void (* _free)(void *p);
  127. int32_t (* _read_efuse_mac)(uint8_t mac[6]);
  128. void (* _srand)(unsigned int seed);
  129. int (* _rand)(void);
  130. };
  131. /* Static variable declare */
  132. static bool btdm_bb_init_flag = false;
  133. static esp_bt_controller_status_t btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  134. static portMUX_TYPE global_int_mux = portMUX_INITIALIZER_UNLOCKED;
  135. #ifdef CONFIG_PM_ENABLE
  136. static esp_pm_lock_handle_t s_pm_lock;
  137. #endif
  138. static void IRAM_ATTR interrupt_disable(void)
  139. {
  140. portENTER_CRITICAL(&global_int_mux);
  141. }
  142. static void IRAM_ATTR interrupt_restore(void)
  143. {
  144. portEXIT_CRITICAL(&global_int_mux);
  145. }
  146. static void IRAM_ATTR task_yield_from_isr(void)
  147. {
  148. portYIELD_FROM_ISR();
  149. }
  150. static void *IRAM_ATTR semphr_create_wrapper(uint32_t max, uint32_t init)
  151. {
  152. return (void *)xSemaphoreCreateCounting(max, init);
  153. }
  154. static void IRAM_ATTR semphr_delete_wrapper(void *semphr)
  155. {
  156. vSemaphoreDelete(semphr);
  157. }
  158. static int32_t IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw)
  159. {
  160. return (int32_t)xSemaphoreTakeFromISR(semphr, hptw);
  161. }
  162. static int32_t IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw)
  163. {
  164. return (int32_t)xSemaphoreGiveFromISR(semphr, hptw);
  165. }
  166. static int32_t IRAM_ATTR semphr_take_wrapper(void *semphr, uint32_t block_time_ms)
  167. {
  168. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  169. return (int32_t)xSemaphoreTake(semphr, portMAX_DELAY);
  170. } else {
  171. return (int32_t)xSemaphoreTake(semphr, block_time_ms / portTICK_PERIOD_MS);
  172. }
  173. }
  174. static int32_t IRAM_ATTR semphr_give_wrapper(void *semphr)
  175. {
  176. return (int32_t)xSemaphoreGive(semphr);
  177. }
  178. static void *IRAM_ATTR mutex_create_wrapper(void)
  179. {
  180. return (void *)xSemaphoreCreateMutex();
  181. }
  182. static void IRAM_ATTR mutex_delete_wrapper(void *mutex)
  183. {
  184. vSemaphoreDelete(mutex);
  185. }
  186. static int32_t IRAM_ATTR mutex_lock_wrapper(void *mutex)
  187. {
  188. return (int32_t)xSemaphoreTake(mutex, portMAX_DELAY);
  189. }
  190. static int32_t IRAM_ATTR mutex_unlock_wrapper(void *mutex)
  191. {
  192. return (int32_t)xSemaphoreGive(mutex);
  193. }
  194. static void *IRAM_ATTR queue_create_wrapper(uint32_t queue_len, uint32_t item_size)
  195. {
  196. return (void *)xQueueCreate(queue_len, item_size);
  197. }
  198. static void IRAM_ATTR queue_delete_wrapper(void *queue)
  199. {
  200. vQueueDelete(queue);
  201. }
  202. static int32_t IRAM_ATTR queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms)
  203. {
  204. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  205. return (int32_t)xQueueSend(queue, item, portMAX_DELAY);
  206. } else {
  207. return (int32_t)xQueueSend(queue, item, block_time_ms / portTICK_PERIOD_MS);
  208. }
  209. }
  210. static int32_t IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw)
  211. {
  212. return (int32_t)xQueueSendFromISR(queue, item, hptw);
  213. }
  214. static int32_t IRAM_ATTR queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms)
  215. {
  216. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  217. return (int32_t)xQueueReceive(queue, item, portMAX_DELAY);
  218. } else {
  219. return (int32_t)xQueueReceive(queue, item, block_time_ms / portTICK_PERIOD_MS);
  220. }
  221. }
  222. static int32_t IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw)
  223. {
  224. return (int32_t)xQueueReceiveFromISR(queue, item, hptw);
  225. }
  226. static int32_t IRAM_ATTR task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
  227. {
  228. return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
  229. }
  230. static void IRAM_ATTR task_delete_wrapper(void *task_handle)
  231. {
  232. vTaskDelete(task_handle);
  233. }
  234. static bool IRAM_ATTR is_in_isr_wrapper(void)
  235. {
  236. return (bool)xPortInIsrContext();
  237. }
  238. static void IRAM_ATTR cause_sw_intr(void *arg)
  239. {
  240. /* just convert void * to int, because the width is the same */
  241. uint32_t intr_no = (uint32_t)arg;
  242. XTHAL_SET_INTSET((1<<intr_no));
  243. }
  244. static int IRAM_ATTR cause_sw_intr_to_core_wrapper(int core_id, int intr_no)
  245. {
  246. esp_err_t err = ESP_OK;
  247. if (xPortGetCoreID() == core_id) {
  248. cause_sw_intr((void *)intr_no);
  249. } else {
  250. err = esp_ipc_call(core_id, cause_sw_intr, (void *)intr_no);
  251. }
  252. return err;
  253. }
  254. static int32_t IRAM_ATTR read_mac_wrapper(uint8_t mac[6])
  255. {
  256. return esp_read_mac(mac, ESP_MAC_BT);
  257. }
  258. static void IRAM_ATTR srand_wrapper(unsigned int seed)
  259. {
  260. /* empty function */
  261. }
  262. static int IRAM_ATTR rand_wrapper(void)
  263. {
  264. return (int)esp_random();
  265. }
  266. static struct osi_funcs_t osi_funcs = {
  267. ._set_isr = xt_set_interrupt_handler,
  268. ._ints_on = xt_ints_on,
  269. ._interrupt_disable = interrupt_disable,
  270. ._interrupt_restore = interrupt_restore,
  271. ._task_yield = vPortYield,
  272. ._task_yield_from_isr = task_yield_from_isr,
  273. ._semphr_create = semphr_create_wrapper,
  274. ._semphr_delete = semphr_delete_wrapper,
  275. ._semphr_take_from_isr = semphr_take_from_isr_wrapper,
  276. ._semphr_give_from_isr = semphr_give_from_isr_wrapper,
  277. ._semphr_take = semphr_take_wrapper,
  278. ._semphr_give = semphr_give_wrapper,
  279. ._mutex_create = mutex_create_wrapper,
  280. ._mutex_delete = mutex_delete_wrapper,
  281. ._mutex_lock = mutex_lock_wrapper,
  282. ._mutex_unlock = mutex_unlock_wrapper,
  283. ._queue_create = queue_create_wrapper,
  284. ._queue_delete = queue_delete_wrapper,
  285. ._queue_send = queue_send_wrapper,
  286. ._queue_send_from_isr = queue_send_from_isr_wrapper,
  287. ._queue_recv = queue_recv_wrapper,
  288. ._queue_recv_from_isr = queue_recv_from_isr_wrapper,
  289. ._task_create = task_create_wrapper,
  290. ._task_delete = task_delete_wrapper,
  291. ._is_in_isr = is_in_isr_wrapper,
  292. ._cause_sw_intr_to_core = cause_sw_intr_to_core_wrapper,
  293. ._malloc = malloc,
  294. ._free = free,
  295. ._read_efuse_mac = read_mac_wrapper,
  296. ._srand = srand_wrapper,
  297. ._rand = rand_wrapper,
  298. };
  299. bool esp_vhci_host_check_send_available(void)
  300. {
  301. return API_vhci_host_check_send_available();
  302. }
  303. void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
  304. {
  305. API_vhci_host_send_packet(data, len);
  306. }
  307. void esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
  308. {
  309. API_vhci_host_register_callback((const vhci_host_callback_t *)callback);
  310. }
  311. static uint32_t btdm_config_mask_load(void)
  312. {
  313. uint32_t mask = 0x0;
  314. if (btdm_dram_available_region[0].mode == ESP_BT_MODE_BLE) {
  315. mask |= BTDM_CFG_BT_DATA_RELEASE;
  316. }
  317. #if CONFIG_BTDM_CONTROLLER_HCI_MODE_UART_H4
  318. mask |= BTDM_CFG_HCI_UART;
  319. #endif
  320. #if CONFIG_BTDM_CONTROLLER_PINNED_TO_CORE == 1
  321. mask |= BTDM_CFG_CONTROLLER_RUN_APP_CPU;
  322. #endif
  323. return mask;
  324. }
  325. static void btdm_controller_mem_init(void)
  326. {
  327. /* initialise .bss, .data and .etc section */
  328. memcpy(&_data_start_btdm, (void *)_data_start_btdm_rom, &_data_end_btdm - &_data_start_btdm);
  329. ESP_LOGD(BTDM_LOG_TAG, ".data initialise [0x%08x] <== [0x%08x]\n", (uint32_t)&_data_start_btdm, _data_start_btdm_rom);
  330. for (int i = 1; i < sizeof(btdm_dram_available_region)/sizeof(btdm_dram_available_region_t); i++) {
  331. if (btdm_dram_available_region[i].mode != ESP_BT_MODE_IDLE) {
  332. memset((void *)btdm_dram_available_region[i].start, 0x0, btdm_dram_available_region[i].end - btdm_dram_available_region[i].start);
  333. ESP_LOGD(BTDM_LOG_TAG, ".bss initialise [0x%08x] - [0x%08x]\n", btdm_dram_available_region[i].start, btdm_dram_available_region[i].end);
  334. }
  335. }
  336. }
  337. esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
  338. {
  339. bool update = true;
  340. intptr_t mem_start, mem_end;
  341. //get the mode which can be released, skip the mode which is running
  342. mode &= ~btdm_controller_get_mode();
  343. if (mode == 0x0) {
  344. return ESP_ERR_INVALID_ARG;
  345. }
  346. //already relesed
  347. if (!(mode & btdm_dram_available_region[0].mode)) {
  348. return ESP_ERR_INVALID_STATE;
  349. }
  350. for (int i = 0; i < sizeof(btdm_dram_available_region)/sizeof(btdm_dram_available_region_t); i++) {
  351. //skip the share mode, idle mode and other mode
  352. if (btdm_dram_available_region[i].mode == ESP_BT_MODE_IDLE
  353. || (mode & btdm_dram_available_region[i].mode) != btdm_dram_available_region[i].mode) {
  354. //clear the bit of the mode which will be released
  355. btdm_dram_available_region[i].mode &= ~mode;
  356. continue;
  357. } else {
  358. //clear the bit of the mode which will be released
  359. btdm_dram_available_region[i].mode &= ~mode;
  360. }
  361. if (update) {
  362. mem_start = btdm_dram_available_region[i].start;
  363. mem_end = btdm_dram_available_region[i].end;
  364. update = false;
  365. }
  366. if (i < sizeof(btdm_dram_available_region)/sizeof(btdm_dram_available_region_t) - 1) {
  367. mem_end = btdm_dram_available_region[i].end;
  368. if (btdm_dram_available_region[i+1].mode != ESP_BT_MODE_IDLE
  369. && (mode & btdm_dram_available_region[i+1].mode) == btdm_dram_available_region[i+1].mode
  370. && mem_end == btdm_dram_available_region[i+1].start) {
  371. continue;
  372. } else {
  373. ESP_LOGD(BTDM_LOG_TAG, "Release DRAM [0x%08x] - [0x%08x]\n", mem_start, mem_end);
  374. ESP_ERROR_CHECK( heap_caps_add_region(mem_start, mem_end));
  375. update = true;
  376. }
  377. } else {
  378. mem_end = btdm_dram_available_region[i].end;
  379. ESP_LOGD(BTDM_LOG_TAG, "Release DRAM [0x%08x] - [0x%08x]\n", mem_start, mem_end);
  380. ESP_ERROR_CHECK( heap_caps_add_region(mem_start, mem_end));
  381. update = true;
  382. }
  383. }
  384. return ESP_OK;
  385. }
  386. esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
  387. {
  388. BaseType_t ret;
  389. uint32_t btdm_cfg_mask = 0;
  390. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
  391. return ESP_ERR_INVALID_STATE;
  392. }
  393. //if all the bt available memory was already released, cannot initialize bluetooth controller
  394. if (btdm_dram_available_region[0].mode == ESP_BT_MODE_IDLE) {
  395. return ESP_ERR_INVALID_STATE;
  396. }
  397. if (cfg == NULL) {
  398. return ESP_ERR_INVALID_ARG;
  399. }
  400. if (cfg->controller_task_prio != ESP_TASK_BT_CONTROLLER_PRIO
  401. || cfg->controller_task_stack_size < ESP_TASK_BT_CONTROLLER_STACK) {
  402. return ESP_ERR_INVALID_ARG;
  403. }
  404. #ifdef CONFIG_PM_ENABLE
  405. esp_err_t err = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "bt", &s_pm_lock);
  406. if (err != ESP_OK) {
  407. return err;
  408. }
  409. #endif
  410. btdm_osi_funcs_register(&osi_funcs);
  411. btdm_controller_mem_init();
  412. periph_module_enable(PERIPH_BT_MODULE);
  413. btdm_cfg_mask = btdm_config_mask_load();
  414. ret = btdm_controller_init(btdm_cfg_mask, cfg);
  415. if (ret) {
  416. #ifdef CONFIG_PM_ENABLE
  417. esp_pm_lock_delete(s_pm_lock);
  418. s_pm_lock = NULL;
  419. #endif
  420. return ESP_ERR_NO_MEM;
  421. }
  422. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  423. return ESP_OK;
  424. }
  425. esp_err_t esp_bt_controller_deinit(void)
  426. {
  427. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  428. return ESP_ERR_INVALID_STATE;
  429. }
  430. if (btdm_controller_deinit() != 0) {
  431. return ESP_ERR_NO_MEM;
  432. }
  433. periph_module_disable(PERIPH_BT_MODULE);
  434. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  435. #ifdef CONFIG_PM_ENABLE
  436. esp_pm_lock_delete(s_pm_lock);
  437. s_pm_lock = NULL;
  438. #endif
  439. return ESP_OK;
  440. }
  441. esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
  442. {
  443. int ret;
  444. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  445. return ESP_ERR_INVALID_STATE;
  446. }
  447. //check the mode is available mode
  448. if (mode & ~btdm_dram_available_region[0].mode) {
  449. return ESP_ERR_INVALID_ARG;
  450. }
  451. #ifdef CONFIG_PM_ENABLE
  452. esp_pm_lock_acquire(s_pm_lock);
  453. #endif
  454. esp_phy_load_cal_and_init();
  455. if (btdm_bb_init_flag == false) {
  456. btdm_bb_init_flag = true;
  457. btdm_rf_bb_init(); /* only initialise once */
  458. }
  459. ret = btdm_controller_enable(mode);
  460. if (ret) {
  461. return ESP_ERR_INVALID_STATE;
  462. }
  463. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
  464. return ESP_OK;
  465. }
  466. esp_err_t esp_bt_controller_disable(void)
  467. {
  468. int ret;
  469. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  470. return ESP_ERR_INVALID_STATE;
  471. }
  472. ret = btdm_controller_disable(btdm_controller_get_mode());
  473. if (ret < 0) {
  474. return ESP_ERR_INVALID_STATE;
  475. }
  476. if (ret == ESP_BT_MODE_IDLE) {
  477. esp_phy_rf_deinit();
  478. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  479. }
  480. #ifdef CONFIG_PM_ENABLE
  481. esp_pm_lock_release(s_pm_lock);
  482. #endif
  483. return ESP_OK;
  484. }
  485. esp_bt_controller_status_t esp_bt_controller_get_status(void)
  486. {
  487. return btdm_controller_status;
  488. }
  489. /* extra functions */
  490. esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
  491. {
  492. if (ble_txpwr_set(power_type, power_level) != 0) {
  493. return ESP_ERR_INVALID_ARG;
  494. }
  495. return ESP_OK;
  496. }
  497. esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
  498. {
  499. return (esp_power_level_t)ble_txpwr_get(power_type);
  500. }
  501. #endif /* CONFIG_BT_ENABLED */