Kconfig 38 KB

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  1. menu "ESP32-specific"
  2. choice ESP32_DEFAULT_CPU_FREQ_MHZ
  3. prompt "CPU frequency"
  4. default ESP32_DEFAULT_CPU_FREQ_160
  5. help
  6. CPU frequency to be set on application startup.
  7. config ESP32_DEFAULT_CPU_FREQ_80
  8. bool "80 MHz"
  9. config ESP32_DEFAULT_CPU_FREQ_160
  10. bool "160 MHz"
  11. config ESP32_DEFAULT_CPU_FREQ_240
  12. bool "240 MHz"
  13. endchoice
  14. config ESP32_DEFAULT_CPU_FREQ_MHZ
  15. int
  16. default 80 if ESP32_DEFAULT_CPU_FREQ_80
  17. default 160 if ESP32_DEFAULT_CPU_FREQ_160
  18. default 240 if ESP32_DEFAULT_CPU_FREQ_240
  19. config MEMMAP_SMP
  20. bool "Reserve memory for two cores"
  21. default "y"
  22. help
  23. The ESP32 contains two cores. If you plan to only use one, you can disable this item
  24. to save some memory. (ToDo: Make this automatically depend on unicore support)
  25. config SPIRAM_SUPPORT
  26. bool "Support for external, SPI-connected RAM"
  27. default "n"
  28. help
  29. This enables support for an external SPI RAM chip, connected in parallel with the
  30. main SPI flash chip.
  31. menu "SPI RAM config"
  32. depends on SPIRAM_SUPPORT
  33. config SPIRAM_BOOT_INIT
  34. bool "Initialize SPI RAM when booting the ESP32"
  35. default "y"
  36. help
  37. If this is enabled, the SPI RAM will be enabled during initial boot. Unless you
  38. have specific requirements, you'll want to leave this enabled so memory allocated
  39. during boot-up can also be placed in SPI RAM.
  40. choice SPIRAM_USE
  41. prompt "SPI RAM access method"
  42. default SPIRAM_USE_MALLOC
  43. help
  44. The SPI RAM can be accessed in multiple methods: by just having it available as an unmanaged
  45. memory region in the ESP32 memory map, by integrating it in the ESP32s heap as 'special' memory
  46. needing heap_caps_malloc to allocate, or by fully integrating it making malloc() also able to
  47. return SPI RAM pointers.
  48. config SPIRAM_USE_MEMMAP
  49. bool "Integrate RAM into ESP32 memory map"
  50. config SPIRAM_USE_CAPS_ALLOC
  51. bool "Make RAM allocatable using heap_caps_malloc(..., MALLOC_CAP_SPIRAM)"
  52. config SPIRAM_USE_MALLOC
  53. bool "Make RAM allocatable using malloc() as well"
  54. endchoice
  55. choice SPIRAM_TYPE
  56. prompt "Type of SPI RAM chip in use"
  57. default SPIRAM_TYPE_ESPPSRAM32
  58. config SPIRAM_TYPE_ESPPSRAM32
  59. bool "ESP-PSRAM32 or IS25WP032"
  60. endchoice
  61. config SPIRAM_SIZE
  62. int
  63. default 4194304 if SPIRAM_TYPE_ESPPSRAM32
  64. default 0
  65. choice SPIRAM_SPEED
  66. prompt "Set RAM clock speed"
  67. default SPIRAM_CACHE_SPEED_40M
  68. help
  69. Select the speed for the SPI RAM chip.
  70. If SPI RAM is enabled, we only support three combinations of SPI speed mode we supported now:
  71. 1. Flash SPI running at 40Mhz and RAM SPI running at 40Mhz
  72. 2. Flash SPI running at 80Mhz and RAM SPI running at 40Mhz
  73. 3. Flash SPI running at 80Mhz and RAM SPI running at 80Mhz
  74. Note: If the third mode(80Mhz+80Mhz) is enabled, the VSPI port will be occupied by the system.
  75. Application code should never touch VSPI hardware in this case. The option to select
  76. 80MHz will only be visible if the flash SPI speed is also 80MHz. (ESPTOOLPY_FLASHFREQ_80M is true)
  77. config SPIRAM_SPEED_40M
  78. bool "40MHz clock speed"
  79. config SPIRAM_SPEED_80M
  80. depends on ESPTOOLPY_FLASHFREQ_80M
  81. bool "80MHz clock speed"
  82. endchoice
  83. config SPIRAM_MEMTEST
  84. bool "Run memory test on SPI RAM initialization"
  85. default "y"
  86. help
  87. Runs a rudimentary memory test on initialization. Aborts when memory test fails. Disable this for
  88. slightly faster startop.
  89. config SPIRAM_CACHE_WORKAROUND
  90. bool "Enable workaround for bug in SPI RAM cache for Rev1 ESP32s"
  91. depends on SPIRAM_USE_MEMMAP || SPIRAM_USE_CAPS_ALLOC || SPIRAM_USE_MALLOC
  92. default "y"
  93. help
  94. Revision 1 of the ESP32 has a bug that can cause a write to PSRAM not to take place in some situations
  95. when the cache line needs to be fetched from external RAM and an interrupt occurs. This enables a
  96. fix in the compiler that makes sure the specific code that is vulnerable to this will not be emitted.
  97. This will also not use any bits of newlib that are located in ROM, opting for a version that is compiled
  98. with the workaround and located in flash instead.
  99. config SPIRAM_MALLOC_ALWAYSINTERNAL
  100. int "Maximum malloc() size, in bytes, to always put in internal memory"
  101. depends on SPIRAM_USE_MALLOC
  102. default 16384
  103. range 0 131072
  104. help
  105. If malloc() is capable of also allocating SPI-connected ram, its allocation strategy will prefer to allocate chunks less
  106. than this size in internal memory, while allocations larger than this will be done from external RAM.
  107. If allocation from the preferred region fails, an attempt is made to allocate from the non-preferred
  108. region instead, so malloc() will not suddenly fail when either internal or external memory is full.
  109. config WIFI_LWIP_ALLOCATION_FROM_SPIRAM_FIRST
  110. bool "Try to allocate memories of WiFi and LWIP in SPIRAM firstly. If failed, allocate internal memory"
  111. depends on SPIRAM_USE_CAPS_ALLOC || SPIRAM_USE_MALLOC
  112. default "n"
  113. help
  114. Try to allocate memories of WiFi and LWIP in SPIRAM firstly. If failed, try to allocate internal memory then.
  115. config SPIRAM_MALLOC_RESERVE_INTERNAL
  116. int "Reserve this amount of bytes for data that specifically needs to be in DMA or internal memory"
  117. depends on SPIRAM_USE_MALLOC
  118. default 32768
  119. range 0 131072
  120. help
  121. Because the external/internal RAM allocation strategy is not always perfect, it sometimes may happen
  122. that the internal memory is entirely filled up. This causes allocations that are specifically done in
  123. internal memory, for example the stack for new tasks or memory to service DMA or have memory that's
  124. also available when SPI cache is down, to fail. This option reserves a pool specifically for requests
  125. like that; the memory in this pool is not given out when a normal malloc() is called.
  126. Set this to 0 to disable this feature.
  127. Note that because FreeRTOS stacks are forced to internal memory, they will also use this memory pool;
  128. be sure to keep this in mind when adjusting this value.
  129. config SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
  130. bool "Allow external memory as an argument to xTaskCreateStatic"
  131. default n
  132. depends on SPIRAM_USE_MALLOC
  133. help
  134. Because some bits of the ESP32 code environment cannot be recompiled with the cache workaround, normally
  135. tasks cannot be safely run with their stack residing in external memory; for this reason xTaskCreate and
  136. friends always allocate stack in internal memory and xTaskCreateStatic will check if the memory passed
  137. to it is in internal memory. If you have a task that needs a large amount of stack and does not call on
  138. ROM code in any way (no direct calls, but also no Bluetooth/WiFi), you can try to disable this and use
  139. xTaskCreateStatic to create the tasks stack in external memory.
  140. endmenu
  141. config MEMMAP_TRACEMEM
  142. bool
  143. default "n"
  144. config MEMMAP_TRACEMEM_TWOBANKS
  145. bool
  146. default "n"
  147. config ESP32_TRAX
  148. bool "Use TRAX tracing feature"
  149. default "n"
  150. select MEMMAP_TRACEMEM
  151. help
  152. The ESP32 contains a feature which allows you to trace the execution path the processor
  153. has taken through the program. This is stored in a chunk of 32K (16K for single-processor)
  154. of memory that can't be used for general purposes anymore. Disable this if you do not know
  155. what this is.
  156. config ESP32_TRAX_TWOBANKS
  157. bool "Reserve memory for tracing both pro as well as app cpu execution"
  158. default "n"
  159. depends on ESP32_TRAX && MEMMAP_SMP
  160. select MEMMAP_TRACEMEM_TWOBANKS
  161. help
  162. The ESP32 contains a feature which allows you to trace the execution path the processor
  163. has taken through the program. This is stored in a chunk of 32K (16K for single-processor)
  164. of memory that can't be used for general purposes anymore. Disable this if you do not know
  165. what this is.
  166. # Memory to reverse for trace, used in linker script
  167. config TRACEMEM_RESERVE_DRAM
  168. hex
  169. default 0x8000 if MEMMAP_TRACEMEM && MEMMAP_TRACEMEM_TWOBANKS
  170. default 0x4000 if MEMMAP_TRACEMEM && !MEMMAP_TRACEMEM_TWOBANKS
  171. default 0x0
  172. choice ESP32_COREDUMP_TO_FLASH_OR_UART
  173. prompt "Core dump destination"
  174. default ESP32_ENABLE_COREDUMP_TO_NONE
  175. help
  176. Select place to store core dump: flash, uart or none (to disable core dumps generation).
  177. If core dump is configured to be stored in flash and custom partition table is used add
  178. corresponding entry to your CSV. For examples, please see predefined partition table CSV descriptions
  179. in the components/partition_table directory.
  180. config ESP32_ENABLE_COREDUMP_TO_FLASH
  181. bool "Flash"
  182. select ESP32_ENABLE_COREDUMP
  183. config ESP32_ENABLE_COREDUMP_TO_UART
  184. bool "UART"
  185. select ESP32_ENABLE_COREDUMP
  186. config ESP32_ENABLE_COREDUMP_TO_NONE
  187. bool "None"
  188. endchoice
  189. config ESP32_ENABLE_COREDUMP
  190. bool
  191. default F
  192. help
  193. Enables/disable core dump module.
  194. config ESP32_CORE_DUMP_UART_DELAY
  195. int "Core dump print to UART delay"
  196. depends on ESP32_ENABLE_COREDUMP_TO_UART
  197. default 0
  198. help
  199. Config delay (in ms) before printing core dump to UART.
  200. Delay can be interrupted by pressing Enter key.
  201. config ESP32_CORE_DUMP_LOG_LEVEL
  202. int "Core dump module logging level"
  203. depends on ESP32_ENABLE_COREDUMP
  204. default 1
  205. help
  206. Config core dump module logging level (0-5).
  207. choice NUMBER_OF_UNIVERSAL_MAC_ADDRESS
  208. bool "Number of universally administered (by IEEE) MAC address"
  209. default FOUR_UNIVERSAL_MAC_ADDRESS
  210. help
  211. Configure the number of universally administered (by IEEE) MAC addresses.
  212. During initialisation, MAC addresses for each network interface are generated or derived from a
  213. single base MAC address.
  214. If the number of universal MAC addresses is four, all four interfaces (WiFi station, WiFi softap,
  215. Bluetooth and Ethernet) receive a universally administered MAC address. These are generated
  216. sequentially by adding 0, 1, 2 and 3 (respectively) to the final octet of the base MAC address.
  217. If the number of universal MAC addresses is two, only two interfaces (WiFi station and Bluetooth)
  218. receive a universally administered MAC address. These are generated sequentially by adding 0
  219. and 1 (respectively) to the base MAC address. The remaining two interfaces (WiFi softap and Ethernet)
  220. receive local MAC addresses. These are derived from the universal WiFi station and Bluetooth MAC
  221. addresses, respectively.
  222. When using the default (Espressif-assigned) base MAC address, either setting can be used. When using
  223. a custom universal MAC address range, the correct setting will depend on the allocation of MAC
  224. addresses in this range (either 2 or 4 per device.)
  225. config TWO_UNIVERSAL_MAC_ADDRESS
  226. bool "Two"
  227. config FOUR_UNIVERSAL_MAC_ADDRESS
  228. bool "Four"
  229. endchoice
  230. config NUMBER_OF_UNIVERSAL_MAC_ADDRESS
  231. int
  232. default 2 if TWO_UNIVERSAL_MAC_ADDRESS
  233. default 4 if FOUR_UNIVERSAL_MAC_ADDRESS
  234. config SYSTEM_EVENT_QUEUE_SIZE
  235. int "System event queue size"
  236. default 32
  237. help
  238. Config system event queue size in different application.
  239. config SYSTEM_EVENT_TASK_STACK_SIZE
  240. int "Event loop task stack size"
  241. default 2048
  242. help
  243. Config system event task stack size in different application.
  244. config MAIN_TASK_STACK_SIZE
  245. int "Main task stack size"
  246. default 3584
  247. help
  248. Configure the "main task" stack size. This is the stack of the task
  249. which calls app_main(). If app_main() returns then this task is deleted
  250. and its stack memory is freed.
  251. config IPC_TASK_STACK_SIZE
  252. int "Inter-Processor Call (IPC) task stack size"
  253. default 1024
  254. range 512 65536 if !ESP32_APPTRACE_ENABLE
  255. range 2048 65536 if ESP32_APPTRACE_ENABLE
  256. help
  257. Configure the IPC tasks stack size. One IPC task runs on each core
  258. (in dual core mode), and allows for cross-core function calls.
  259. See IPC documentation for more details.
  260. The default stack size should be enough for most common use cases.
  261. It can be shrunk if you are sure that you do not use any custom
  262. IPC functionality.
  263. config TIMER_TASK_STACK_SIZE
  264. int "High-resolution timer task stack size"
  265. default 3584
  266. range 2048 65536
  267. help
  268. Configure the stack size of esp_timer/ets_timer task. This task is used
  269. to dispatch callbacks of timers created using ets_timer and esp_timer
  270. APIs. If you are seing stack overflow errors in timer task, increase
  271. this value.
  272. Note that this is not the same as FreeRTOS timer task. To configure
  273. FreeRTOS timer task size, see "FreeRTOS timer task stack size" option
  274. in "FreeRTOS" menu.
  275. choice NEWLIB_STDOUT_LINE_ENDING
  276. prompt "Line ending for UART output"
  277. default NEWLIB_STDOUT_LINE_ENDING_CRLF
  278. help
  279. This option allows configuring the desired line endings sent to UART
  280. when a newline ('\n', LF) appears on stdout.
  281. Three options are possible:
  282. CRLF: whenever LF is encountered, prepend it with CR
  283. LF: no modification is applied, stdout is sent as is
  284. CR: each occurence of LF is replaced with CR
  285. This option doesn't affect behavior of the UART driver (drivers/uart.h).
  286. config NEWLIB_STDOUT_LINE_ENDING_CRLF
  287. bool "CRLF"
  288. config NEWLIB_STDOUT_LINE_ENDING_LF
  289. bool "LF"
  290. config NEWLIB_STDOUT_LINE_ENDING_CR
  291. bool "CR"
  292. endchoice
  293. choice NEWLIB_STDIN_LINE_ENDING
  294. prompt "Line ending for UART input"
  295. default NEWLIB_STDIN_LINE_ENDING_CR
  296. help
  297. This option allows configuring which input sequence on UART produces
  298. a newline ('\n', LF) on stdin.
  299. Three options are possible:
  300. CRLF: CRLF is converted to LF
  301. LF: no modification is applied, input is sent to stdin as is
  302. CR: each occurence of CR is replaced with LF
  303. This option doesn't affect behavior of the UART driver (drivers/uart.h).
  304. config NEWLIB_STDIN_LINE_ENDING_CRLF
  305. bool "CRLF"
  306. config NEWLIB_STDIN_LINE_ENDING_LF
  307. bool "LF"
  308. config NEWLIB_STDIN_LINE_ENDING_CR
  309. bool "CR"
  310. endchoice
  311. config NEWLIB_NANO_FORMAT
  312. bool "Enable 'nano' formatting options for printf/scanf family"
  313. default n
  314. help
  315. ESP32 ROM contains parts of newlib C library, including printf/scanf family
  316. of functions. These functions have been compiled with so-called "nano"
  317. formatting option. This option doesn't support 64-bit integer formats and C99
  318. features, such as positional arguments.
  319. For more details about "nano" formatting option, please see newlib readme file,
  320. search for '--enable-newlib-nano-formatted-io':
  321. https://sourceware.org/newlib/README
  322. If this option is enabled, build system will use functions available in
  323. ROM, reducing the application binary size. Functions available in ROM run
  324. faster than functions which run from flash. Functions available in ROM can
  325. also run when flash instruction cache is disabled.
  326. If you need 64-bit integer formatting support or C99 features, keep this
  327. option disabled.
  328. choice CONSOLE_UART
  329. prompt "UART for console output"
  330. default CONSOLE_UART_DEFAULT
  331. help
  332. Select whether to use UART for console output (through stdout and stderr).
  333. - Default is to use UART0 on pins GPIO1(TX) and GPIO3(RX).
  334. - If "Custom" is selected, UART0 or UART1 can be chosen,
  335. and any pins can be selected.
  336. - If "None" is selected, there will be no console output on any UART, except
  337. for initial output from ROM bootloader. This output can be further suppressed by
  338. bootstrapping GPIO13 pin to low logic level.
  339. config CONSOLE_UART_DEFAULT
  340. bool "Default: UART0, TX=GPIO1, RX=GPIO3"
  341. config CONSOLE_UART_CUSTOM
  342. bool "Custom"
  343. config CONSOLE_UART_NONE
  344. bool "None"
  345. endchoice
  346. choice CONSOLE_UART_NUM
  347. prompt "UART peripheral to use for console output (0-1)"
  348. depends on CONSOLE_UART_CUSTOM
  349. default CONSOLE_UART_CUSTOM_NUM_0
  350. help
  351. Due of a ROM bug, UART2 is not supported for console output
  352. via ets_printf.
  353. config CONSOLE_UART_CUSTOM_NUM_0
  354. bool "UART0"
  355. config CONSOLE_UART_CUSTOM_NUM_1
  356. bool "UART1"
  357. endchoice
  358. config CONSOLE_UART_NUM
  359. int
  360. default 0 if CONSOLE_UART_DEFAULT || CONSOLE_UART_NONE
  361. default 0 if CONSOLE_UART_CUSTOM_NUM_0
  362. default 1 if CONSOLE_UART_CUSTOM_NUM_1
  363. config CONSOLE_UART_TX_GPIO
  364. int "UART TX on GPIO#"
  365. depends on CONSOLE_UART_CUSTOM
  366. range 0 33
  367. default 19
  368. config CONSOLE_UART_RX_GPIO
  369. int "UART RX on GPIO#"
  370. depends on CONSOLE_UART_CUSTOM
  371. range 0 39
  372. default 21
  373. config CONSOLE_UART_BAUDRATE
  374. int "UART console baud rate"
  375. depends on !CONSOLE_UART_NONE
  376. default 115200
  377. range 1200 4000000
  378. config ULP_COPROC_ENABLED
  379. bool "Enable Ultra Low Power (ULP) Coprocessor"
  380. default "n"
  381. help
  382. Set to 'y' if you plan to load a firmware for the coprocessor.
  383. If this option is enabled, further coprocessor configuration will appear in the Components menu.
  384. config ULP_COPROC_RESERVE_MEM
  385. int
  386. prompt "RTC slow memory reserved for coprocessor" if ULP_COPROC_ENABLED
  387. default 512 if ULP_COPROC_ENABLED
  388. range 32 8192 if ULP_COPROC_ENABLED
  389. default 0 if !ULP_COPROC_ENABLED
  390. range 0 0 if !ULP_COPROC_ENABLED
  391. help
  392. Bytes of memory to reserve for ULP coprocessor firmware & data.
  393. Data is reserved at the beginning of RTC slow memory.
  394. choice ESP32_PANIC
  395. prompt "Panic handler behaviour"
  396. default ESP32_PANIC_PRINT_REBOOT
  397. help
  398. If FreeRTOS detects unexpected behaviour or an unhandled exception, the panic handler is
  399. invoked. Configure the panic handlers action here.
  400. config ESP32_PANIC_PRINT_HALT
  401. bool "Print registers and halt"
  402. help
  403. Outputs the relevant registers over the serial port and halt the
  404. processor. Needs a manual reset to restart.
  405. config ESP32_PANIC_PRINT_REBOOT
  406. bool "Print registers and reboot"
  407. help
  408. Outputs the relevant registers over the serial port and immediately
  409. reset the processor.
  410. config ESP32_PANIC_SILENT_REBOOT
  411. bool "Silent reboot"
  412. help
  413. Just resets the processor without outputting anything
  414. config ESP32_PANIC_GDBSTUB
  415. bool "Invoke GDBStub"
  416. help
  417. Invoke gdbstub on the serial port, allowing for gdb to attach to it to do a postmortem
  418. of the crash.
  419. endchoice
  420. config ESP32_DEBUG_OCDAWARE
  421. bool "Make exception and panic handlers JTAG/OCD aware"
  422. default y
  423. help
  424. The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and
  425. instead of panicking, have the debugger stop on the offending instruction.
  426. config INT_WDT
  427. bool "Interrupt watchdog"
  428. default y
  429. help
  430. This watchdog timer can detect if the FreeRTOS tick interrupt has not been called for a certain time,
  431. either because a task turned off interrupts and did not turn them on for a long time, or because an
  432. interrupt handler did not return. It will try to invoke the panic handler first and failing that
  433. reset the SoC.
  434. config INT_WDT_TIMEOUT_MS
  435. int "Interrupt watchdog timeout (ms)"
  436. depends on INT_WDT
  437. default 300 if !SPIRAM_SUPPORT
  438. default 800 if SPIRAM_SUPPORT
  439. range 10 10000
  440. help
  441. The timeout of the watchdog, in miliseconds. Make this higher than the FreeRTOS tick rate.
  442. config INT_WDT_CHECK_CPU1
  443. bool "Also watch CPU1 tick interrupt"
  444. depends on INT_WDT && !FREERTOS_UNICORE
  445. default y
  446. help
  447. Also detect if interrupts on CPU 1 are disabled for too long.
  448. config TASK_WDT
  449. bool "Initialize Task Watchdog Timer on startup"
  450. default y
  451. help
  452. The Task Watchdog Timer can be used to make sure individual tasks are still
  453. running. Enabling this option will cause the Task Watchdog Timer to be
  454. initialized automatically at startup. The Task Watchdog timer can be
  455. initialized after startup as well (see Task Watchdog Timer API Reference)
  456. config TASK_WDT_PANIC
  457. bool "Invoke panic handler on Task Watchdog timeout"
  458. depends on TASK_WDT
  459. default n
  460. help
  461. If this option is enabled, the Task Watchdog Timer will be configured to
  462. trigger the panic handler when it times out. This can also be configured
  463. at run time (see Task Watchdog Timer API Reference)
  464. config TASK_WDT_TIMEOUT_S
  465. int "Task Watchdog timeout period (seconds)"
  466. depends on TASK_WDT
  467. range 1 60
  468. default 5
  469. help
  470. Timeout period configuration for the Task Watchdog Timer in seconds.
  471. This is also configurable at run time (see Task Watchdog Timer API Reference)
  472. config TASK_WDT_CHECK_IDLE_TASK_CPU0
  473. bool "Watch CPU0 Idle Task"
  474. depends on TASK_WDT
  475. default y
  476. help
  477. If this option is enabled, the Task Watchdog Timer will watch the CPU0
  478. Idle Task. Having the Task Watchdog watch the Idle Task allows for detection
  479. of CPU starvation as the Idle Task not being called is usually a symptom of
  480. CPU starvation. Starvation of the Idle Task is detrimental as FreeRTOS household
  481. tasks depend on the Idle Task getting some runtime every now and then.
  482. config TASK_WDT_CHECK_IDLE_TASK_CPU1
  483. bool "Watch CPU1 Idle Task"
  484. depends on TASK_WDT && !FREERTOS_UNICORE
  485. default y
  486. help
  487. If this option is enabled, the Task Wtachdog Timer will wach the CPU1
  488. Idle Task.
  489. #The brownout detector code is disabled (by making it depend on a nonexisting symbol) because the current revision of ESP32
  490. #silicon has a bug in the brown-out detector, rendering it unusable for resetting the CPU.
  491. config BROWNOUT_DET
  492. bool "Hardware brownout detect & reset"
  493. default y
  494. help
  495. The ESP32 has a built-in brownout detector which can detect if the voltage is lower than
  496. a specific value. If this happens, it will reset the chip in order to prevent unintended
  497. behaviour.
  498. choice BROWNOUT_DET_LVL_SEL
  499. prompt "Brownout voltage level"
  500. depends on BROWNOUT_DET
  501. default BROWNOUT_DET_LVL_SEL_25
  502. help
  503. The brownout detector will reset the chip when the supply voltage is approximately
  504. below this level. Note that there may be some variation of brownout voltage level
  505. between each ESP32 chip.
  506. #The voltage levels here are estimates, more work needs to be done to figure out the exact voltages
  507. #of the brownout threshold levels.
  508. config BROWNOUT_DET_LVL_SEL_0
  509. bool "2.43V +/- 0.05"
  510. config BROWNOUT_DET_LVL_SEL_1
  511. bool "2.48V +/- 0.05"
  512. config BROWNOUT_DET_LVL_SEL_2
  513. bool "2.58V +/- 0.05"
  514. config BROWNOUT_DET_LVL_SEL_3
  515. bool "2.62V +/- 0.05"
  516. config BROWNOUT_DET_LVL_SEL_4
  517. bool "2.67V +/- 0.05"
  518. config BROWNOUT_DET_LVL_SEL_5
  519. bool "2.70V +/- 0.05"
  520. config BROWNOUT_DET_LVL_SEL_6
  521. bool "2.77V +/- 0.05"
  522. config BROWNOUT_DET_LVL_SEL_7
  523. bool "2.80V +/- 0.05"
  524. endchoice
  525. config BROWNOUT_DET_LVL
  526. int
  527. default 0 if BROWNOUT_DET_LVL_SEL_0
  528. default 1 if BROWNOUT_DET_LVL_SEL_1
  529. default 2 if BROWNOUT_DET_LVL_SEL_2
  530. default 3 if BROWNOUT_DET_LVL_SEL_3
  531. default 4 if BROWNOUT_DET_LVL_SEL_4
  532. default 5 if BROWNOUT_DET_LVL_SEL_5
  533. default 6 if BROWNOUT_DET_LVL_SEL_6
  534. default 7 if BROWNOUT_DET_LVL_SEL_7
  535. choice ESP32_TIME_SYSCALL
  536. prompt "Timers used for gettimeofday function"
  537. default ESP32_TIME_SYSCALL_USE_RTC_FRC1
  538. help
  539. This setting defines which hardware timers are used to
  540. implement 'gettimeofday' and 'time' functions in C library.
  541. - If only FRC1 timer is used, gettimeofday will provide time at
  542. microsecond resolution. Time will not be preserved when going
  543. into deep sleep mode.
  544. - If both FRC1 and RTC timers are used, timekeeping will
  545. continue in deep sleep. Time will be reported at 1 microsecond
  546. resolution.
  547. - If only RTC timer is used, timekeeping will continue in
  548. deep sleep, but time will be measured at 6.(6) microsecond
  549. resolution. Also the gettimeofday function itself may take
  550. longer to run.
  551. - If no timers are used, gettimeofday and time functions
  552. return -1 and set errno to ENOSYS.
  553. - When RTC is used for timekeeping, two RTC_STORE registers are
  554. used to keep time in deep sleep mode.
  555. config ESP32_TIME_SYSCALL_USE_RTC
  556. bool "RTC"
  557. config ESP32_TIME_SYSCALL_USE_RTC_FRC1
  558. bool "RTC and FRC1"
  559. config ESP32_TIME_SYSCALL_USE_FRC1
  560. bool "FRC1"
  561. config ESP32_TIME_SYSCALL_USE_NONE
  562. bool "None"
  563. endchoice
  564. choice ESP32_RTC_CLOCK_SOURCE
  565. prompt "RTC clock source"
  566. default ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC
  567. help
  568. Choose which clock is used as RTC clock source.
  569. config ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC
  570. bool "Internal 150kHz RC oscillator"
  571. config ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL
  572. bool "External 32kHz crystal"
  573. endchoice
  574. config ESP32_RTC_CLK_CAL_CYCLES
  575. int "Number of cycles for RTC_SLOW_CLK calibration"
  576. default 1024
  577. range 0 125000
  578. help
  579. When the startup code initializes RTC_SLOW_CLK, it can perform
  580. calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
  581. frequency. This option sets the number of RTC_SLOW_CLK cycles measured
  582. by the calibration routine. Higher numbers increase calibration
  583. precision, which may be important for applications which spend a lot of
  584. time in deep sleep. Lower numbers reduce startup time.
  585. When this option is set to 0, clock calibration will not be performed at
  586. startup, and approximate clock frequencies will be assumed:
  587. - 150000 Hz if internal RC oscillator is used as clock source
  588. - 32768 Hz if the 32k crystal oscillator is used
  589. config ESP32_DEEP_SLEEP_WAKEUP_DELAY
  590. int "Extra delay in deep sleep wake stub (in us)"
  591. default 2000
  592. range 0 5000
  593. help
  594. When ESP32 exits deep sleep, the CPU and the flash chip are powered on
  595. at the same time. CPU will run deep sleep stub first, and then
  596. proceed to load code from flash. Some flash chips need sufficient
  597. time to pass between power on and first read operation. By default,
  598. without any extra delay, this time is approximately 900us, although
  599. some flash chip types need more than that.
  600. By default extra delay is set to 2000us. When optimizing startup time
  601. for applications which require it, this value may be reduced.
  602. If you are seeing "flash read err, 1000" message printed to the
  603. console after deep sleep reset, try increasing this value.
  604. choice ESP32_XTAL_FREQ_SEL
  605. prompt "Main XTAL frequency"
  606. default ESP32_XTAL_FREQ_40
  607. help
  608. ESP32 currently supports the following XTAL frequencies:
  609. - 26 MHz
  610. - 40 MHz
  611. Startup code can automatically estimate XTAL frequency. This feature
  612. uses the internal 8MHz oscillator as a reference. Because the internal
  613. oscillator frequency is temperature dependent, it is not recommended
  614. to use automatic XTAL frequency detection in applications which need
  615. to work at high ambient temperatures and use high-temperature
  616. qualified chips and modules.
  617. config ESP32_XTAL_FREQ_40
  618. bool "40 MHz"
  619. config ESP32_XTAL_FREQ_26
  620. bool "26 MHz"
  621. config ESP32_XTAL_FREQ_AUTO
  622. bool "Autodetect"
  623. endchoice
  624. # Keep these values in sync with rtc_xtal_freq_t enum in soc/rtc.h
  625. config ESP32_XTAL_FREQ
  626. int
  627. default 0 if ESP32_XTAL_FREQ_AUTO
  628. default 40 if ESP32_XTAL_FREQ_40
  629. default 26 if ESP32_XTAL_FREQ_26
  630. config DISABLE_BASIC_ROM_CONSOLE
  631. bool "Permanently disable BASIC ROM Console"
  632. default n
  633. help
  634. If set, the first time the app boots it will disable the BASIC ROM Console
  635. permanently (by burning an efuse).
  636. Otherwise, the BASIC ROM Console starts on reset if no valid bootloader is
  637. read from the flash.
  638. (Enabling secure boot also disables the BASIC ROM Console by default.)
  639. config NO_BLOBS
  640. bool "No Binary Blobs"
  641. depends on !BT_ENABLED
  642. default n
  643. help
  644. If enabled, this disables the linking of binary libraries in the application build. Note
  645. that after enabling this Wi-Fi/Bluetooth will not work.
  646. config ESP_TIMER_PROFILING
  647. bool "Enable esp_timer profiling features"
  648. default n
  649. help
  650. If enabled, esp_timer_dump will dump information such as number of times
  651. the timer was started, number of times the timer has triggered, and the
  652. total time it took for the callback to run.
  653. This option has some effect on timer performance and the amount of memory
  654. used for timer storage, and should only be used for debugging/testing
  655. purposes.
  656. endmenu # ESP32-Specific
  657. menu Wi-Fi
  658. config SW_COEXIST_ENABLE
  659. bool "Software controls WiFi/Bluetooth coexistence"
  660. depends on BT_ENABLED
  661. default n
  662. help
  663. If enabled, WiFi & Bluetooth coexistence is controlled by software rather than hardware.
  664. Recommended for heavy traffic scenarios. Both coexistence configuration options are
  665. automatically managed, no user intervention is required.
  666. config ESP32_WIFI_STATIC_RX_BUFFER_NUM
  667. int "Max number of WiFi static RX buffers"
  668. range 2 25
  669. default 10
  670. help
  671. Set the number of WiFi static RX buffers. Each buffer takes approximately 1.6KB of RAM.
  672. The static rx buffers are allocated when esp_wifi_init is called, they are not freed
  673. until esp_wifi_deinit is called.
  674. WiFi hardware use these buffers to receive all 802.11 frames.
  675. A higher number may allow higher throughput but increases memory use.
  676. config ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM
  677. int "Max number of WiFi dynamic RX buffers"
  678. range 0 128
  679. default 32
  680. help
  681. Set the number of WiFi dynamic RX buffers, 0 means unlimited RX buffers will be allocated
  682. (provided sufficient free RAM). The size of each dynamic RX buffer depends on the size of
  683. the received data frame.
  684. For each received data frame, the WiFi driver makes a copy to an RX buffer and then delivers
  685. it to the high layer TCP/IP stack. The dynamic RX buffer is freed after the higher layer has
  686. successfully received the data frame.
  687. For some applications, WiFi data frames may be received faster than the application can
  688. process them. In these cases we may run out of memory if RX buffer number is unlimited (0).
  689. If a dynamic RX buffer limit is set, it should be at least the number of static RX buffers.
  690. choice ESP32_WIFI_TX_BUFFER
  691. prompt "Type of WiFi TX buffers"
  692. default ESP32_WIFI_DYNAMIC_TX_BUFFER
  693. help
  694. Select type of WiFi TX buffers:
  695. If "Static" is selected, WiFi TX buffers are allocated when WiFi is initialized and released
  696. when WiFi is de-initialized. The size of each static TX buffer is fixed to about 1.6KB.
  697. If "Dynamic" is selected, each WiFi TX buffer is allocated as needed when a data frame is
  698. delivered to the Wifi driver from the TCP/IP stack. The buffer is freed after the data frame
  699. has been sent by the WiFi driver. The size of each dynamic TX buffer depends on the length
  700. of each data frame sent by the TCP/IP layer.
  701. If PSRAM is enabled, "Static" should be selected to guarantee enough WiFi TX buffers.
  702. If PSRAM is disabled, "Dynamic" should be selected to improve the utilization of RAM.
  703. config ESP32_WIFI_STATIC_TX_BUFFER
  704. bool "Static"
  705. config ESP32_WIFI_DYNAMIC_TX_BUFFER
  706. bool "Dynamic"
  707. depends on !SPIRAM_USE_MALLOC
  708. endchoice
  709. config ESP32_WIFI_TX_BUFFER_TYPE
  710. int
  711. default 0 if ESP32_WIFI_STATIC_TX_BUFFER
  712. default 1 if ESP32_WIFI_DYNAMIC_TX_BUFFER
  713. config ESP32_WIFI_STATIC_TX_BUFFER_NUM
  714. int "Max number of WiFi static TX buffers"
  715. depends on ESP32_WIFI_STATIC_TX_BUFFER
  716. range 6 64
  717. default 16
  718. help
  719. Set the number of WiFi static TX buffers. Each buffer takes approximately 1.6KB of RAM.
  720. The static RX buffers are allocated when esp_wifi_init() is called, they are not released
  721. until esp_wifi_deinit() is called.
  722. For each transmitted data frame from the higher layer TCP/IP stack, the WiFi driver makes a
  723. copy of it in a TX buffer. For some applications especially UDP applications, the upper
  724. layer can deliver frames faster than WiFi layer can transmit. In these cases, we may run out
  725. of TX buffers.
  726. config ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM
  727. int "Max number of WiFi dynamic TX buffers"
  728. depends on ESP32_WIFI_DYNAMIC_TX_BUFFER
  729. range 16 128
  730. default 32
  731. help
  732. Set the number of WiFi dynamic TX buffers. The size of each dynamic TX buffer is not fixed,
  733. it depends on the size of each transmitted data frame.
  734. For each transmitted frame from the higher layer TCP/IP stack, the WiFi driver makes a copy
  735. of it in a TX buffer. For some applications, especially UDP applications, the upper layer
  736. can deliver frames faster than WiFi layer can transmit. In these cases, we may run out of TX
  737. buffers.
  738. config ESP32_WIFI_AMPDU_TX_ENABLED
  739. bool "WiFi AMPDU TX"
  740. default y
  741. help
  742. Select this option to enable AMPDU TX feature
  743. config ESP32_WIFI_TX_BA_WIN
  744. int "WiFi AMPDU TX BA window size"
  745. depends on ESP32_WIFI_AMPDU_TX_ENABLED
  746. range 2 32
  747. default 6
  748. help
  749. Set the size of WiFi Block Ack TX window. Generally a bigger value means higher throughput but
  750. more memory. Most of time we should NOT change the default value unless special reason, e.g.
  751. test the maximum UDP TX throughput with iperf etc. For iperf test in shieldbox, the recommended
  752. value is 9~12.
  753. config ESP32_WIFI_AMPDU_RX_ENABLED
  754. bool "WiFi AMPDU RX"
  755. default y
  756. help
  757. Select this option to enable AMPDU RX feature
  758. config ESP32_WIFI_RX_BA_WIN
  759. int "WiFi AMPDU RX BA window size"
  760. depends on ESP32_WIFI_AMPDU_RX_ENABLED
  761. range 2 32
  762. default 6
  763. help
  764. Set the size of WiFi Block Ack RX window. Generally a bigger value means higher throughput but
  765. more memory. Most of time we should NOT change the default value unless special reason, e.g.
  766. test the maximum UDP RX throughput with iperf etc. For iperf test in shieldbox, the recommended
  767. value is 9~12.
  768. config ESP32_WIFI_NVS_ENABLED
  769. bool "WiFi NVS flash"
  770. default y
  771. help
  772. Select this option to enable WiFi NVS flash
  773. endmenu # Wi-Fi
  774. menu PHY
  775. config ESP32_PHY_CALIBRATION_AND_DATA_STORAGE
  776. bool "Do phy calibration and store calibration data in NVS"
  777. default y
  778. help
  779. If this option is enabled, NVS will be initialized and calibration data will be loaded from there.
  780. PHY calibration will be skipped on deep sleep wakeup. If calibration data is not found, full calibration
  781. will be performed and stored in NVS. In all other cases, only partial calibration will be performed.
  782. If unsure, choose 'y'.
  783. config ESP32_PHY_INIT_DATA_IN_PARTITION
  784. bool "Use a partition to store PHY init data"
  785. default n
  786. help
  787. If enabled, PHY init data will be loaded from a partition.
  788. When using a custom partition table, make sure that PHY data
  789. partition is included (type: 'data', subtype: 'phy').
  790. With default partition tables, this is done automatically.
  791. If PHY init data is stored in a partition, it has to be flashed there,
  792. otherwise runtime error will occur.
  793. If this option is not enabled, PHY init data will be embedded
  794. into the application binary.
  795. If unsure, choose 'n'.
  796. config ESP32_PHY_MAX_WIFI_TX_POWER
  797. int "Max WiFi TX power (dBm)"
  798. range 0 20
  799. default 20
  800. help
  801. Set maximum transmit power for WiFi radio. Actual transmit power for high
  802. data rates may be lower than this setting.
  803. config ESP32_PHY_MAX_TX_POWER
  804. int
  805. default ESP32_PHY_MAX_WIFI_TX_POWER
  806. endmenu # PHY
  807. menu "Power Management"
  808. config PM_ENABLE
  809. bool "Support for power management"
  810. default n
  811. help
  812. If enabled, application is compiled with support for power management.
  813. This option has run-time overhead (increased interrupt latency,
  814. longer time to enter idle state), and it also reduces accuracy of
  815. RTOS ticks and timers used for timekeeping.
  816. Enable this option if application uses power management APIs.
  817. config PM_DFS_INIT_AUTO
  818. bool "Enable dynamic frequency scaling (DFS) at startup"
  819. depends on PM_ENABLE
  820. default n
  821. help
  822. If enabled, startup code configures dynamic frequency scaling.
  823. Max CPU frequency is set to CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ setting,
  824. min frequency is set to XTAL frequency.
  825. If disabled, DFS will not be active until the application
  826. configures it using esp_pm_configure function.
  827. config PM_USE_RTC_TIMER_REF
  828. bool "Use RTC timer to prevent time drift (EXPERIMENTAL)"
  829. depends on PM_ENABLE && (ESP32_TIME_SYSCALL_USE_RTC || ESP32_TIME_SYSCALL_USE_RTC_FRC1)
  830. default n
  831. help
  832. When APB clock frequency changes, high-resolution timer (esp_timer)
  833. scale and base value need to be adjusted. Each adjustment may cause
  834. small error, and over time such small errors may cause time drift.
  835. If this option is enabled, RTC timer will be used as a reference to
  836. compensate for the drift.
  837. It is recommended that this option is only used if 32k XTAL is selected
  838. as RTC clock source.
  839. config PM_PROFILING
  840. bool "Enable profiling counters for PM locks"
  841. depends on PM_ENABLE
  842. default n
  843. help
  844. If enabled, esp_pm_* functions will keep track of the amount of time
  845. each of the power management locks has been held, and esp_pm_dump_locks
  846. function will print this information.
  847. This feature can be used to analyze which locks are preventing the chip
  848. from going into a lower power state, and see what time the chip spends
  849. in each power saving mode. This feature does incur some run-time
  850. overhead, so should typically be disabled in production builds.
  851. config PM_TRACE
  852. bool "Enable debug tracing of PM using GPIOs"
  853. depends on PM_ENABLE
  854. default n
  855. help
  856. If enabled, some GPIOs will be used to signal events such as RTOS ticks,
  857. frequency switching, entry/exit from idle state. Refer to pm_trace.c
  858. file for the list of GPIOs.
  859. This feature is intended to be used when analyzing/debugging behavior
  860. of power management implementation, and should be kept disabled in
  861. applications.
  862. endmenu # "Power Management"