test_intr_alloc.c 9.1 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. /*
  7. Tests for the interrupt allocator.
  8. */
  9. #include <stdio.h>
  10. #include "sdkconfig.h"
  11. #include "esp_types.h"
  12. #include "esp_rom_sys.h"
  13. #include "freertos/FreeRTOS.h"
  14. #include "freertos/task.h"
  15. #include "freertos/semphr.h"
  16. #include "freertos/queue.h"
  17. #include "unity.h"
  18. #include "esp_intr_alloc.h"
  19. #include "driver/gptimer.h"
  20. #include "soc/soc_caps.h"
  21. #include "soc/spi_periph.h"
  22. #include "hal/spi_ll.h"
  23. #include "esp_private/periph_ctrl.h"
  24. #include "esp_private/gptimer.h"
  25. static bool on_timer_alarm(gptimer_handle_t timer, const gptimer_alarm_event_data_t *edata, void *user_ctx)
  26. {
  27. volatile int *count = (volatile int *)user_ctx;
  28. (*count)++;
  29. return false;
  30. }
  31. static void timer_test(int flags)
  32. {
  33. static int count[SOC_TIMER_GROUP_TOTAL_TIMERS] = {0};
  34. gptimer_handle_t gptimers[SOC_TIMER_GROUP_TOTAL_TIMERS];
  35. intr_handle_t inth[SOC_TIMER_GROUP_TOTAL_TIMERS];
  36. gptimer_config_t config = {
  37. .clk_src = GPTIMER_CLK_SRC_DEFAULT,
  38. .direction = GPTIMER_COUNT_UP,
  39. .resolution_hz = 1000000,
  40. .flags.intr_shared = (flags & ESP_INTR_FLAG_SHARED) == ESP_INTR_FLAG_SHARED,
  41. };
  42. for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
  43. TEST_ESP_OK(gptimer_new_timer(&config, &gptimers[i]));
  44. }
  45. gptimer_alarm_config_t alarm_config = {
  46. .reload_count = 0,
  47. .alarm_count = 100000,
  48. .flags.auto_reload_on_alarm = true,
  49. };
  50. gptimer_event_callbacks_t cbs = {
  51. .on_alarm = on_timer_alarm,
  52. };
  53. for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
  54. TEST_ESP_OK(gptimer_register_event_callbacks(gptimers[i], &cbs, &count[i]));
  55. alarm_config.alarm_count += 10000 * i;
  56. TEST_ESP_OK(gptimer_set_alarm_action(gptimers[i], &alarm_config));
  57. TEST_ESP_OK(gptimer_enable(gptimers[i]));
  58. TEST_ESP_OK(gptimer_start(gptimers[i]));
  59. TEST_ESP_OK(gptimer_get_intr_handle(gptimers[i], &inth[i]));
  60. printf("Interrupts allocated: %d\r\n", esp_intr_get_intno(inth[i]));
  61. }
  62. vTaskDelay(1000 / portTICK_PERIOD_MS);
  63. printf("Timer values after 1 sec:");
  64. for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
  65. printf(" %d", count[i]);
  66. }
  67. printf("\r\n");
  68. for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
  69. TEST_ASSERT_NOT_EQUAL(0, count[i]);
  70. }
  71. printf("Disabling timers' interrupt...\r\n");
  72. for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
  73. esp_intr_disable(inth[i]);
  74. count[i] = 0;
  75. }
  76. vTaskDelay(1000 / portTICK_PERIOD_MS);
  77. printf("Timer values after 1 sec:");
  78. for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
  79. printf(" %d", count[i]);
  80. }
  81. printf("\r\n");
  82. for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
  83. TEST_ASSERT_EQUAL(0, count[i]);
  84. }
  85. for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
  86. TEST_ESP_OK(gptimer_stop(gptimers[i]));
  87. TEST_ESP_OK(gptimer_disable(gptimers[i]));
  88. TEST_ESP_OK(gptimer_del_timer(gptimers[i]));
  89. }
  90. }
  91. TEST_CASE("Intr_alloc test, private ints", "[intr_alloc]")
  92. {
  93. timer_test(0);
  94. }
  95. TEST_CASE("Intr_alloc test, shared ints", "[intr_alloc]")
  96. {
  97. timer_test(ESP_INTR_FLAG_SHARED);
  98. }
  99. typedef struct {
  100. bool flag1;
  101. bool flag2;
  102. bool flag3;
  103. bool flag4;
  104. } intr_alloc_test_ctx_t;
  105. void IRAM_ATTR int_handler1(void *arg)
  106. {
  107. intr_alloc_test_ctx_t *ctx = (intr_alloc_test_ctx_t *)arg;
  108. esp_rom_printf("handler 1 called.\n");
  109. if ( ctx->flag1 ) {
  110. ctx->flag3 = true;
  111. } else {
  112. ctx->flag1 = true;
  113. }
  114. #ifdef CONFIG_IDF_TARGET_ESP32
  115. spi_ll_clear_int_stat(&SPI2);
  116. #else
  117. spi_ll_clear_int_stat(&GPSPI2);
  118. #endif
  119. }
  120. void IRAM_ATTR int_handler2(void *arg)
  121. {
  122. intr_alloc_test_ctx_t *ctx = (intr_alloc_test_ctx_t *)arg;
  123. esp_rom_printf("handler 2 called.\n");
  124. if ( ctx->flag2 ) {
  125. ctx->flag4 = true;
  126. } else {
  127. ctx->flag2 = true;
  128. }
  129. }
  130. TEST_CASE("allocate 2 handlers for a same source and remove the later one", "[intr_alloc]")
  131. {
  132. intr_alloc_test_ctx_t ctx = {false, false, false, false };
  133. intr_handle_t handle1, handle2;
  134. // enable SPI2
  135. periph_module_enable(spi_periph_signal[1].module);
  136. esp_err_t r;
  137. r = esp_intr_alloc(spi_periph_signal[1].irq, ESP_INTR_FLAG_SHARED, int_handler1, &ctx, &handle1);
  138. TEST_ESP_OK(r);
  139. //try an invalid assign first
  140. r = esp_intr_alloc(spi_periph_signal[1].irq, 0, int_handler2, NULL, &handle2);
  141. TEST_ASSERT_EQUAL_INT(ESP_ERR_NOT_FOUND, r);
  142. //assign shared then
  143. r = esp_intr_alloc(spi_periph_signal[1].irq, ESP_INTR_FLAG_SHARED, int_handler2, &ctx, &handle2);
  144. TEST_ESP_OK(r);
  145. #ifdef CONFIG_IDF_TARGET_ESP32
  146. spi_ll_enable_int(&SPI2);
  147. #else
  148. spi_ll_enable_int(&GPSPI2);
  149. #endif
  150. printf("trigger first time.\n");
  151. #ifdef CONFIG_IDF_TARGET_ESP32
  152. spi_ll_set_int_stat(&SPI2);
  153. #else
  154. spi_ll_set_int_stat(&GPSPI2);
  155. #endif
  156. vTaskDelay(100);
  157. TEST_ASSERT( ctx.flag1 && ctx.flag2 );
  158. printf("remove intr 1.\n");
  159. r = esp_intr_free(handle2);
  160. printf("trigger second time.\n");
  161. #ifdef CONFIG_IDF_TARGET_ESP32
  162. spi_ll_set_int_stat(&SPI2);
  163. #else
  164. spi_ll_set_int_stat(&GPSPI2);
  165. #endif
  166. vTaskDelay(500);
  167. TEST_ASSERT( ctx.flag3 && !ctx.flag4 );
  168. printf("test passed.\n");
  169. esp_intr_free(handle1);
  170. }
  171. #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
  172. //IDF-5061
  173. static void dummy(void *arg)
  174. {
  175. }
  176. static IRAM_ATTR void dummy_iram(void *arg)
  177. {
  178. }
  179. static RTC_IRAM_ATTR void dummy_rtc(void *arg)
  180. {
  181. }
  182. TEST_CASE("Can allocate IRAM int only with an IRAM handler", "[intr_alloc]")
  183. {
  184. intr_handle_t ih;
  185. esp_err_t err = esp_intr_alloc(spi_periph_signal[1].irq,
  186. ESP_INTR_FLAG_IRAM, &dummy, NULL, &ih);
  187. TEST_ASSERT_EQUAL_INT(ESP_ERR_INVALID_ARG, err);
  188. err = esp_intr_alloc(spi_periph_signal[1].irq,
  189. ESP_INTR_FLAG_IRAM, &dummy_iram, NULL, &ih);
  190. TEST_ESP_OK(err);
  191. err = esp_intr_free(ih);
  192. TEST_ESP_OK(err);
  193. err = esp_intr_alloc(spi_periph_signal[1].irq,
  194. ESP_INTR_FLAG_IRAM, &dummy_rtc, NULL, &ih);
  195. TEST_ESP_OK(err);
  196. err = esp_intr_free(ih);
  197. TEST_ESP_OK(err);
  198. }
  199. #endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
  200. #ifndef CONFIG_FREERTOS_UNICORE
  201. void isr_free_task(void *param)
  202. {
  203. esp_err_t ret = ESP_FAIL;
  204. intr_handle_t *test_handle = (intr_handle_t *)param;
  205. if (*test_handle != NULL) {
  206. ret = esp_intr_free(*test_handle);
  207. if (ret == ESP_OK) {
  208. *test_handle = NULL;
  209. }
  210. }
  211. vTaskDelete(NULL);
  212. }
  213. void isr_alloc_free_test(void)
  214. {
  215. intr_handle_t test_handle = NULL;
  216. esp_err_t ret = esp_intr_alloc(spi_periph_signal[1].irq, 0, int_handler1, NULL, &test_handle);
  217. if (ret != ESP_OK) {
  218. printf("alloc isr handle fail\n");
  219. } else {
  220. printf("alloc isr handle on core %d\n", esp_intr_get_cpu(test_handle));
  221. }
  222. TEST_ASSERT(ret == ESP_OK);
  223. xTaskCreatePinnedToCore(isr_free_task, "isr_free_task", 1024 * 2, (void *)&test_handle, 10, NULL, !xPortGetCoreID());
  224. vTaskDelay(1000 / portTICK_PERIOD_MS);
  225. TEST_ASSERT(test_handle == NULL);
  226. printf("test passed\n");
  227. }
  228. TEST_CASE("alloc and free isr handle on different core", "[intr_alloc]")
  229. {
  230. isr_alloc_free_test();
  231. }
  232. #endif
  233. #if __XTENSA__
  234. static volatile int int_timer_ctr;
  235. void int_timer_handler(void *arg)
  236. {
  237. xthal_set_ccompare(1, xthal_get_ccount() + 8000000);
  238. int_timer_ctr++;
  239. }
  240. static void local_timer_test(void)
  241. {
  242. intr_handle_t ih;
  243. esp_err_t r;
  244. r = esp_intr_alloc(ETS_INTERNAL_TIMER1_INTR_SOURCE, 0, int_timer_handler, NULL, &ih);
  245. TEST_ASSERT(r == ESP_OK);
  246. printf("Int timer 1 intno %d\n", esp_intr_get_intno(ih));
  247. xthal_set_ccompare(1, xthal_get_ccount() + 8000000);
  248. int_timer_ctr = 0;
  249. vTaskDelay(1000 / portTICK_PERIOD_MS);
  250. printf("Timer val after 1 sec: %d\n", int_timer_ctr);
  251. TEST_ASSERT(int_timer_ctr != 0);
  252. printf("Disabling int\n");
  253. esp_intr_disable(ih);
  254. int_timer_ctr = 0;
  255. vTaskDelay(1000 / portTICK_PERIOD_MS);
  256. printf("Timer val after 1 sec: %d\n", int_timer_ctr);
  257. TEST_ASSERT(int_timer_ctr == 0);
  258. printf("Re-enabling\n");
  259. esp_intr_enable(ih);
  260. vTaskDelay(1000 / portTICK_PERIOD_MS);
  261. printf("Timer val after 1 sec: %d\n", int_timer_ctr);
  262. TEST_ASSERT(int_timer_ctr != 0);
  263. printf("Free int, re-alloc disabled\n");
  264. r = esp_intr_free(ih);
  265. TEST_ASSERT(r == ESP_OK);
  266. r = esp_intr_alloc(ETS_INTERNAL_TIMER1_INTR_SOURCE, ESP_INTR_FLAG_INTRDISABLED, int_timer_handler, NULL, &ih);
  267. TEST_ASSERT(r == ESP_OK);
  268. int_timer_ctr = 0;
  269. vTaskDelay(1000 / portTICK_PERIOD_MS);
  270. printf("Timer val after 1 sec: %d\n", int_timer_ctr);
  271. TEST_ASSERT(int_timer_ctr == 0);
  272. printf("Re-enabling\n");
  273. esp_intr_enable(ih);
  274. vTaskDelay(1000 / portTICK_PERIOD_MS);
  275. printf("Timer val after 1 sec: %d\n", int_timer_ctr);
  276. TEST_ASSERT(int_timer_ctr != 0);
  277. r = esp_intr_free(ih);
  278. TEST_ASSERT(r == ESP_OK);
  279. printf("Done.\n");
  280. }
  281. TEST_CASE("Intr_alloc test, CPU-local int source", "[intr_alloc]")
  282. {
  283. local_timer_test();
  284. }
  285. #endif // #if __XTENSA__