adc_hal_common.c 6.1 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include <sys/param.h>
  7. #include "sdkconfig.h"
  8. #include "soc/soc_caps.h"
  9. #include "hal/adc_hal_common.h"
  10. #include "hal/adc_ll.h"
  11. #include "hal/assert.h"
  12. /*---------------------------------------------------------------
  13. Controller Setting
  14. ---------------------------------------------------------------*/
  15. static adc_ll_controller_t get_controller(adc_unit_t unit, adc_hal_work_mode_t work_mode)
  16. {
  17. if (unit == ADC_UNIT_1) {
  18. switch (work_mode) {
  19. #if SOC_ULP_SUPPORTED
  20. case ADC_HAL_ULP_MODE:
  21. return ADC_LL_CTRL_ULP;
  22. #endif
  23. case ADC_HAL_SINGLE_READ_MODE:
  24. #if SOC_ADC_DIG_CTRL_SUPPORTED && !SOC_ADC_RTC_CTRL_SUPPORTED
  25. return ADC_LL_CTRL_DIG;
  26. #elif SOC_ADC_RTC_CTRL_SUPPORTED
  27. return ADC_LL_CTRL_RTC;
  28. #endif
  29. case ADC_HAL_CONTINUOUS_READ_MODE:
  30. return ADC_LL_CTRL_DIG;
  31. default:
  32. abort();
  33. }
  34. } else {
  35. switch (work_mode) {
  36. #if SOC_ULP_SUPPORTED
  37. case ADC_HAL_ULP_MODE:
  38. return ADC_LL_CTRL_ULP;
  39. #endif
  40. #if !SOC_ADC_ARBITER_SUPPORTED //No ADC2 arbiter on ESP32
  41. case ADC_HAL_SINGLE_READ_MODE:
  42. return ADC_LL_CTRL_RTC;
  43. case ADC_HAL_CONTINUOUS_READ_MODE:
  44. return ADC_LL_CTRL_DIG;
  45. case ADC_HAL_PWDET_MODE:
  46. return ADC_LL_CTRL_PWDET;
  47. default:
  48. abort();
  49. #else
  50. default:
  51. return ADC_LL_CTRL_ARB;
  52. #endif
  53. }
  54. }
  55. }
  56. void adc_hal_set_controller(adc_unit_t unit, adc_hal_work_mode_t work_mode)
  57. {
  58. adc_ll_controller_t ctrlr = get_controller(unit, work_mode);
  59. adc_ll_set_controller(unit, ctrlr);
  60. }
  61. /*---------------------------------------------------------------
  62. Arbiter
  63. ---------------------------------------------------------------*/
  64. #if SOC_ADC_ARBITER_SUPPORTED
  65. void adc_hal_arbiter_config(adc_arbiter_t *config)
  66. {
  67. adc_ll_set_arbiter_work_mode(config->mode);
  68. adc_ll_set_arbiter_priority(config->rtc_pri, config->dig_pri, config->pwdet_pri);
  69. }
  70. #endif // #if SOC_ADC_ARBITER_SUPPORTED
  71. /*---------------------------------------------------------------
  72. ADC calibration setting
  73. ---------------------------------------------------------------*/
  74. #if SOC_ADC_CALIBRATION_V1_SUPPORTED
  75. //For chips without RTC controller, Digital controller is used to trigger an ADC single read.
  76. #include "esp_rom_sys.h"
  77. void adc_hal_calibration_init(adc_unit_t adc_n)
  78. {
  79. adc_ll_calibration_init(adc_n);
  80. }
  81. static uint32_t s_previous_init_code[SOC_ADC_PERIPH_NUM] = {-1, -1};
  82. void adc_hal_set_calibration_param(adc_unit_t adc_n, uint32_t param)
  83. {
  84. if (param != s_previous_init_code[adc_n]) {
  85. adc_ll_set_calibration_param(adc_n, param);
  86. s_previous_init_code[adc_n] = param;
  87. }
  88. }
  89. static void cal_setup(adc_unit_t adc_n, adc_atten_t atten)
  90. {
  91. adc_hal_set_controller(adc_n, ADC_HAL_SINGLE_READ_MODE);
  92. adc_oneshot_ll_disable_all_unit();
  93. // Enableinternal connect GND (for calibration).
  94. adc_oneshot_ll_disable_channel(adc_n);
  95. /**
  96. * Note:
  97. * When controlled by RTC controller, when all channels are disabled, HW auto selects channel0 atten param.
  98. * When controlled by DIG controller, unit and channel are not related to attenuation
  99. */
  100. adc_oneshot_ll_set_atten(adc_n, 0, atten);
  101. adc_oneshot_ll_enable(adc_n);
  102. }
  103. static uint32_t read_cal_channel(adc_unit_t adc_n)
  104. {
  105. uint32_t event = (adc_n == ADC_UNIT_1) ? ADC_LL_EVENT_ADC1_ONESHOT_DONE : ADC_LL_EVENT_ADC2_ONESHOT_DONE;
  106. adc_oneshot_ll_clear_event(event);
  107. #if SOC_ADC_DIG_CTRL_SUPPORTED && !SOC_ADC_RTC_CTRL_SUPPORTED
  108. adc_oneshot_ll_start(false);
  109. esp_rom_delay_us(5);
  110. adc_oneshot_ll_start(true);
  111. #else
  112. adc_oneshot_ll_start(adc_n);
  113. #endif
  114. while(!adc_oneshot_ll_get_event(event));
  115. uint32_t read_val = -1;
  116. read_val = adc_oneshot_ll_get_raw_result(adc_n);
  117. if (adc_oneshot_ll_raw_check_valid(adc_n, read_val) == false) {
  118. return -1;
  119. }
  120. return read_val;
  121. }
  122. #define ADC_HAL_CAL_TIMES (10)
  123. #define ADC_HAL_CAL_OFFSET_RANGE (4096)
  124. uint32_t adc_hal_self_calibration(adc_unit_t adc_n, adc_atten_t atten, bool internal_gnd)
  125. {
  126. if (adc_n == ADC_UNIT_2) {
  127. adc_arbiter_t config = ADC_ARBITER_CONFIG_DEFAULT();
  128. adc_hal_arbiter_config(&config);
  129. }
  130. cal_setup(adc_n, atten);
  131. adc_ll_calibration_prepare(adc_n, internal_gnd);
  132. uint32_t code_list[ADC_HAL_CAL_TIMES] = {0};
  133. uint32_t code_sum = 0;
  134. uint32_t code_h = 0;
  135. uint32_t code_l = 0;
  136. uint32_t chk_code = 0;
  137. for (uint8_t rpt = 0 ; rpt < ADC_HAL_CAL_TIMES ; rpt ++) {
  138. code_h = ADC_HAL_CAL_OFFSET_RANGE;
  139. code_l = 0;
  140. chk_code = (code_h + code_l) / 2;
  141. adc_ll_set_calibration_param(adc_n, chk_code);
  142. uint32_t self_cal = read_cal_channel(adc_n);
  143. while (code_h - code_l > 1) {
  144. if (self_cal == 0) {
  145. code_h = chk_code;
  146. } else {
  147. code_l = chk_code;
  148. }
  149. chk_code = (code_h + code_l) / 2;
  150. adc_ll_set_calibration_param(adc_n, chk_code);
  151. self_cal = read_cal_channel(adc_n);
  152. if ((code_h - code_l == 1)) {
  153. chk_code += 1;
  154. adc_ll_set_calibration_param(adc_n, chk_code);
  155. self_cal = read_cal_channel(adc_n);
  156. }
  157. }
  158. code_list[rpt] = chk_code;
  159. code_sum += chk_code;
  160. }
  161. code_l = code_list[0];
  162. code_h = code_list[0];
  163. for (uint8_t i = 0 ; i < ADC_HAL_CAL_TIMES ; i++) {
  164. code_l = MIN(code_l, code_list[i]);
  165. code_h = MAX(code_h, code_list[i]);
  166. }
  167. chk_code = code_h + code_l;
  168. uint32_t ret = ((code_sum - chk_code) % (ADC_HAL_CAL_TIMES - 2) < 4)
  169. ? (code_sum - chk_code) / (ADC_HAL_CAL_TIMES - 2)
  170. : (code_sum - chk_code) / (ADC_HAL_CAL_TIMES - 2) + 1;
  171. adc_ll_calibration_finish(adc_n);
  172. return ret;
  173. return 0;
  174. }
  175. #endif //SOC_ADC_CALIBRATION_V1_SUPPORTED