systimer_hal.c 6.5 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include <sys/param.h>
  7. #include "soc/soc_caps.h"
  8. #include "hal/systimer_hal.h"
  9. #include "hal/systimer_ll.h"
  10. #include "hal/systimer_types.h"
  11. #include "hal/clk_gate_ll.h"
  12. #include "hal/assert.h"
  13. void systimer_hal_init(systimer_hal_context_t *hal)
  14. {
  15. hal->dev = &SYSTIMER;
  16. periph_ll_enable_clk_clear_rst(PERIPH_SYSTIMER_MODULE);
  17. systimer_ll_enable_clock(hal->dev, true);
  18. }
  19. uint64_t systimer_hal_get_counter_value(systimer_hal_context_t *hal, uint32_t counter_id)
  20. {
  21. uint32_t lo, lo_start, hi;
  22. /* Set the "update" bit and wait for acknowledgment */
  23. systimer_ll_counter_snapshot(hal->dev, counter_id);
  24. while (!systimer_ll_is_counter_value_valid(hal->dev, counter_id));
  25. /* Read LO, HI, then LO again, check that LO returns the same value.
  26. * This accounts for the case when an interrupt may happen between reading
  27. * HI and LO values, and this function may get called from the ISR.
  28. * In this case, the repeated read will return consistent values.
  29. */
  30. lo_start = systimer_ll_get_counter_value_low(hal->dev, counter_id);
  31. do {
  32. lo = lo_start;
  33. hi = systimer_ll_get_counter_value_high(hal->dev, counter_id);
  34. lo_start = systimer_ll_get_counter_value_low(hal->dev, counter_id);
  35. } while (lo_start != lo);
  36. systimer_counter_value_t result = {
  37. .lo = lo,
  38. .hi = hi
  39. };
  40. return result.val;
  41. }
  42. uint64_t systimer_hal_get_time(systimer_hal_context_t *hal, uint32_t counter_id)
  43. {
  44. return systimer_hal_get_counter_value(hal, counter_id) / SYSTIMER_LL_TICKS_PER_US;
  45. }
  46. #if SOC_SYSTIMER_ALARM_MISS_COMPENSATE
  47. void systimer_hal_set_alarm_target(systimer_hal_context_t *hal, uint32_t alarm_id, uint64_t target)
  48. {
  49. systimer_counter_value_t alarm = { .val = target * SYSTIMER_LL_TICKS_PER_US};
  50. systimer_ll_enable_alarm(hal->dev, alarm_id, false);
  51. systimer_ll_set_alarm_target(hal->dev, alarm_id, alarm.val);
  52. systimer_ll_apply_alarm_value(hal->dev, alarm_id);
  53. systimer_ll_enable_alarm(hal->dev, alarm_id, true);
  54. }
  55. #else
  56. void systimer_hal_set_alarm_target(systimer_hal_context_t *hal, uint32_t alarm_id, uint64_t timestamp)
  57. {
  58. int64_t offset = SYSTIMER_LL_TICKS_PER_US * 2;
  59. uint64_t now_time = systimer_hal_get_counter_value(hal, 0);
  60. systimer_counter_value_t alarm = { .val = MAX(timestamp * SYSTIMER_LL_TICKS_PER_US, now_time + offset) };
  61. do {
  62. systimer_ll_enable_alarm(hal->dev, alarm_id, false);
  63. systimer_ll_set_alarm_target(hal->dev, alarm_id, alarm.val);
  64. systimer_ll_enable_alarm(hal->dev, alarm_id, true);
  65. now_time = systimer_hal_get_counter_value(hal, 0);
  66. int64_t delta = (int64_t)alarm.val - (int64_t)now_time;
  67. if (delta <= 0 && !systimer_ll_is_alarm_int_fired(hal->dev, alarm_id)) {
  68. // new alarm is less than the counter and the interrupt flag is not set
  69. offset += -1 * delta + SYSTIMER_LL_TICKS_PER_US * 2;
  70. alarm.val = now_time + offset;
  71. } else {
  72. // finish if either (alarm > counter) or the interrupt flag is already set.
  73. break;
  74. }
  75. } while (1);
  76. }
  77. #endif
  78. void systimer_hal_set_alarm_period(systimer_hal_context_t *hal, uint32_t alarm_id, uint32_t period)
  79. {
  80. systimer_ll_enable_alarm(hal->dev, alarm_id, false);
  81. systimer_ll_set_alarm_period(hal->dev, alarm_id, period * SYSTIMER_LL_TICKS_PER_US);
  82. systimer_ll_apply_alarm_value(hal->dev, alarm_id);
  83. systimer_ll_enable_alarm(hal->dev, alarm_id, true);
  84. }
  85. uint64_t systimer_hal_get_alarm_value(systimer_hal_context_t *hal, uint32_t alarm_id)
  86. {
  87. return systimer_ll_get_alarm_target(hal->dev, alarm_id);
  88. }
  89. void systimer_hal_enable_alarm_int(systimer_hal_context_t *hal, uint32_t alarm_id)
  90. {
  91. systimer_ll_enable_alarm_int(hal->dev, alarm_id, true);
  92. }
  93. void systimer_hal_counter_value_advance(systimer_hal_context_t *hal, uint32_t counter_id, int64_t time_us)
  94. {
  95. systimer_counter_value_t new_count = { .val = systimer_hal_get_counter_value(hal, counter_id) + time_us * SYSTIMER_LL_TICKS_PER_US };
  96. systimer_ll_set_counter_value(hal->dev, counter_id, new_count.val);
  97. systimer_ll_apply_counter_value(hal->dev, counter_id);
  98. }
  99. void systimer_hal_enable_counter(systimer_hal_context_t *hal, uint32_t counter_id)
  100. {
  101. systimer_ll_enable_counter(hal->dev, counter_id, true);
  102. }
  103. void systimer_hal_select_alarm_mode(systimer_hal_context_t *hal, uint32_t alarm_id, systimer_alarm_mode_t mode)
  104. {
  105. switch (mode) {
  106. case SYSTIMER_ALARM_MODE_ONESHOT:
  107. systimer_ll_enable_alarm_oneshot(hal->dev, alarm_id);
  108. break;
  109. case SYSTIMER_ALARM_MODE_PERIOD:
  110. systimer_ll_enable_alarm_period(hal->dev, alarm_id);
  111. break;
  112. default:
  113. break;
  114. }
  115. }
  116. void systimer_hal_connect_alarm_counter(systimer_hal_context_t *hal, uint32_t alarm_id, uint32_t counter_id)
  117. {
  118. systimer_ll_connect_alarm_counter(hal->dev, alarm_id, counter_id);
  119. }
  120. void systimer_hal_counter_can_stall_by_cpu(systimer_hal_context_t *hal, uint32_t counter_id, uint32_t cpu_id, bool can)
  121. {
  122. systimer_ll_counter_can_stall_by_cpu(hal->dev, counter_id, cpu_id, can);
  123. }
  124. #if !SOC_SYSTIMER_FIXED_TICKS_US
  125. void systimer_hal_set_steps_per_tick(systimer_hal_context_t *hal, int clock_source, uint32_t steps)
  126. {
  127. /* Configure the counter:
  128. * - increment by 1 when running from PLL (80 ticks per microsecond),
  129. * - increment by 2 when running from XTAL (40 ticks per microsecond).
  130. * Note that if the APB frequency is derived from XTAL with divider != 1,
  131. * XTAL_STEP needs to be adjusted accordingly. For example, if
  132. * the APB frequency is XTAL/4 = 10 MHz, then XTAL_STEP should be set to 8.
  133. * This is handled in systimer_hal_on_apb_freq_update function.
  134. */
  135. switch (clock_source) {
  136. case 0:
  137. systimer_ll_set_step_for_xtal(hal->dev, steps);
  138. break;
  139. case 1:
  140. systimer_ll_set_step_for_pll(hal->dev, steps);
  141. default:
  142. break;
  143. }
  144. }
  145. void systimer_hal_on_apb_freq_update(systimer_hal_context_t *hal, uint32_t apb_ticks_per_us)
  146. {
  147. /* If this function was called when switching APB clock to PLL, don't need
  148. * do anything: the SYSTIMER_TIMER_PLL_STEP is already correct.
  149. * If this was called when switching APB clock to XTAL, need to adjust
  150. * XTAL_STEP value accordingly.
  151. */
  152. if (apb_ticks_per_us != SYSTIMER_LL_TICKS_PER_US) {
  153. HAL_ASSERT((SYSTIMER_LL_TICKS_PER_US % apb_ticks_per_us) == 0 && "TICK_PER_US should be divisible by APB frequency (in MHz)");
  154. systimer_ll_set_step_for_xtal(hal->dev, SYSTIMER_LL_TICKS_PER_US / apb_ticks_per_us);
  155. }
  156. }
  157. #endif