bt.c 35 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include <stddef.h>
  7. #include <stdlib.h>
  8. #include <stdio.h>
  9. #include <string.h>
  10. #include "esp_random.h"
  11. #include "esp_heap_caps.h"
  12. #include "esp_heap_caps_init.h"
  13. #include <esp_mac.h>
  14. #include "sdkconfig.h"
  15. #include "nimble/nimble_port.h"
  16. #include "nimble/nimble_port_freertos.h"
  17. #ifdef ESP_PLATFORM
  18. #include "esp_log.h"
  19. #endif
  20. #if CONFIG_SW_COEXIST_ENABLE
  21. #include "esp_coexist_internal.h"
  22. #endif
  23. #include "nimble/nimble_npl_os.h"
  24. #include "nimble/ble_hci_trans.h"
  25. #include "os/endian.h"
  26. #include "esp_bt.h"
  27. #include "esp_intr_alloc.h"
  28. #include "esp_sleep.h"
  29. #include "esp_pm.h"
  30. #include "esp_phy_init.h"
  31. #include "soc/syscon_reg.h"
  32. #include "soc/modem_clkrst_reg.h"
  33. #include "esp_private/periph_ctrl.h"
  34. #include "hci_uart.h"
  35. #include "bt_osi_mem.h"
  36. #ifdef CONFIG_BT_BLUEDROID_ENABLED
  37. #include "hci/hci_hal.h"
  38. #endif
  39. #include "freertos/FreeRTOS.h"
  40. #include "freertos/task.h"
  41. #include "esp_private/periph_ctrl.h"
  42. #include "esp_sleep.h"
  43. #include "soc/syscon_reg.h"
  44. #include "soc/dport_access.h"
  45. /* Macro definition
  46. ************************************************************************
  47. */
  48. #define NIMBLE_PORT_LOG_TAG "BLE_INIT"
  49. #define OSI_COEX_VERSION 0x00010006
  50. #define OSI_COEX_MAGIC_VALUE 0xFADEBEAD
  51. #define EXT_FUNC_VERSION 0x20221122
  52. #define EXT_FUNC_MAGIC_VALUE 0xA5A5A5A5
  53. #define BT_ASSERT_PRINT ets_printf
  54. #ifdef CONFIG_BT_BLUEDROID_ENABLED
  55. /* ACL_DATA_MBUF_LEADINGSPCAE: The leadingspace in user info header for ACL data */
  56. #define ACL_DATA_MBUF_LEADINGSPCAE 4
  57. #endif
  58. /* Types definition
  59. ************************************************************************
  60. */
  61. struct osi_coex_funcs_t {
  62. uint32_t _magic;
  63. uint32_t _version;
  64. void (* _coex_wifi_sleep_set)(bool sleep);
  65. int (* _coex_core_ble_conn_dyn_prio_get)(bool *low, bool *high);
  66. void (* _coex_schm_status_bit_set)(uint32_t type, uint32_t status);
  67. void (* _coex_schm_status_bit_clear)(uint32_t type, uint32_t status);
  68. };
  69. struct ext_funcs_t {
  70. uint32_t ext_version;
  71. int (*_esp_intr_alloc)(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle);
  72. int (*_esp_intr_free)(void **ret_handle);
  73. void *(* _malloc)(size_t size);
  74. void (*_free)(void *p);
  75. void (*_hal_uart_start_tx)(int);
  76. int (*_hal_uart_init_cbs)(int, hci_uart_tx_char, hci_uart_tx_done, hci_uart_rx_char, void *);
  77. int (*_hal_uart_config)(int, int32_t, uint8_t, uint8_t, uart_parity_t, uart_hw_flowcontrol_t);
  78. int (*_hal_uart_close)(int);
  79. void (*_hal_uart_blocking_tx)(int, uint8_t);
  80. int (*_hal_uart_init)(int, void *);
  81. int (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  82. void (* _task_delete)(void *task_handle);
  83. void (*_osi_assert)(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2);
  84. uint32_t (* _os_random)(void);
  85. int (* _ecc_gen_key_pair)(uint8_t *public, uint8_t *priv);
  86. int (* _ecc_gen_dh_key)(const uint8_t *remote_pub_key_x, const uint8_t *remote_pub_key_y, const uint8_t *local_priv_key, uint8_t *dhkey);
  87. void (* _esp_reset_rpa_moudle)(void);
  88. void (* _esp_bt_track_pll_cap)(void);
  89. uint32_t magic;
  90. };
  91. /* External functions or variables
  92. ************************************************************************
  93. */
  94. extern int ble_osi_coex_funcs_register(struct osi_coex_funcs_t *coex_funcs);
  95. extern int coex_core_ble_conn_dyn_prio_get(bool *low, bool *high);
  96. extern int ble_controller_init(esp_bt_controller_config_t *cfg);
  97. extern int ble_controller_deinit(void);
  98. extern int ble_controller_enable(uint8_t mode);
  99. extern int ble_controller_disable(void);
  100. extern int esp_register_ext_funcs (struct ext_funcs_t *);
  101. extern void esp_unregister_ext_funcs (void);
  102. extern int esp_ble_ll_set_public_addr(const uint8_t *addr);
  103. extern int esp_register_npl_funcs (struct npl_funcs_t *p_npl_func);
  104. extern void esp_unregister_npl_funcs (void);
  105. extern void npl_freertos_mempool_deinit(void);
  106. extern void bt_bb_v2_init_cmplx(uint8_t i);
  107. extern int os_msys_buf_alloc(void);
  108. extern uint32_t r_os_cputime_get32(void);
  109. extern uint32_t r_os_cputime_ticks_to_usecs(uint32_t ticks);
  110. extern void r_ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg, void *w_arg, uint32_t us_to_enabled);
  111. extern void r_ble_rtc_wake_up_state_clr(void);
  112. extern int os_msys_init(void);
  113. extern void os_msys_buf_free(void);
  114. extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
  115. const uint8_t *peer_pub_key_y,
  116. const uint8_t *our_priv_key, uint8_t *out_dhkey);
  117. extern int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv);
  118. extern int ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
  119. extern int ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
  120. extern int ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_count_info_t * npl_info);
  121. extern uint32_t _bt_bss_start;
  122. extern uint32_t _bt_bss_end;
  123. extern uint32_t _nimble_bss_start;
  124. extern uint32_t _nimble_bss_end;
  125. extern uint32_t _nimble_data_start;
  126. extern uint32_t _nimble_data_end;
  127. extern uint32_t _bt_data_start;
  128. extern uint32_t _bt_data_end;
  129. /* Local Function Declaration
  130. *********************************************************************
  131. */
  132. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status);
  133. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status);
  134. static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  135. static void task_delete_wrapper(void *task_handle);
  136. #if CONFIG_BT_LE_HCI_INTERFACE_USE_UART
  137. static void hci_uart_start_tx_wrapper(int uart_no);
  138. static int hci_uart_init_cbs_wrapper(int uart_no, hci_uart_tx_char tx_func,
  139. hci_uart_tx_done tx_done, hci_uart_rx_char rx_func, void *arg);
  140. static int hci_uart_config_wrapper(int uart_no, int32_t speed, uint8_t databits, uint8_t stopbits,
  141. uart_parity_t parity, uart_hw_flowcontrol_t flow_ctl);
  142. static int hci_uart_close_wrapper(int uart_no);
  143. static void hci_uart_blocking_tx_wrapper(int port, uint8_t data);
  144. static int hci_uart_init_wrapper(int uart_no, void *cfg);
  145. #endif
  146. static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle_in);
  147. static int esp_intr_free_wrapper(void **ret_handle);
  148. static void osi_assert_wrapper(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2);
  149. static uint32_t osi_random_wrapper(void);
  150. static void esp_reset_rpa_moudle(void);
  151. /* Local variable definition
  152. ***************************************************************************
  153. */
  154. /* Static variable declare */
  155. static DRAM_ATTR esp_bt_controller_status_t ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  156. /* This variable tells if BLE is running */
  157. static bool s_ble_active = false;
  158. #ifdef CONFIG_PM_ENABLE
  159. static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock = NULL;
  160. #define BTDM_MIN_TIMER_UNCERTAINTY_US (200)
  161. #endif /* #ifdef CONFIG_PM_ENABLE */
  162. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  163. #define BLE_RTC_DELAY_US (1100)
  164. #endif
  165. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  166. #define BLE_RTC_DELAY_US (0)
  167. static void ble_sleep_timer_callback(void *arg);
  168. static DRAM_ATTR esp_timer_handle_t s_ble_sleep_timer = NULL;
  169. #endif
  170. static const struct osi_coex_funcs_t s_osi_coex_funcs_ro = {
  171. ._magic = OSI_COEX_MAGIC_VALUE,
  172. ._version = OSI_COEX_VERSION,
  173. ._coex_wifi_sleep_set = NULL,
  174. ._coex_core_ble_conn_dyn_prio_get = NULL,
  175. ._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper,
  176. ._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper,
  177. };
  178. struct ext_funcs_t ext_funcs_ro = {
  179. .ext_version = EXT_FUNC_VERSION,
  180. ._esp_intr_alloc = esp_intr_alloc_wrapper,
  181. ._esp_intr_free = esp_intr_free_wrapper,
  182. ._malloc = bt_osi_mem_malloc_internal,
  183. ._free = bt_osi_mem_free,
  184. #if CONFIG_BT_LE_HCI_INTERFACE_USE_UART
  185. ._hal_uart_start_tx = hci_uart_start_tx_wrapper,
  186. ._hal_uart_init_cbs = hci_uart_init_cbs_wrapper,
  187. ._hal_uart_config = hci_uart_config_wrapper,
  188. ._hal_uart_close = hci_uart_close_wrapper,
  189. ._hal_uart_blocking_tx = hci_uart_blocking_tx_wrapper,
  190. ._hal_uart_init = hci_uart_init_wrapper,
  191. #endif //CONFIG_BT_LE_HCI_INTERFACE_USE_UART
  192. ._task_create = task_create_wrapper,
  193. ._task_delete = task_delete_wrapper,
  194. ._osi_assert = osi_assert_wrapper,
  195. ._os_random = osi_random_wrapper,
  196. ._ecc_gen_key_pair = ble_sm_alg_gen_key_pair,
  197. ._ecc_gen_dh_key = ble_sm_alg_gen_dhkey,
  198. ._esp_reset_rpa_moudle = esp_reset_rpa_moudle,
  199. .magic = EXT_FUNC_MAGIC_VALUE,
  200. };
  201. static void IRAM_ATTR esp_reset_rpa_moudle(void)
  202. {
  203. DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, BLE_RPA_REST_BIT);
  204. DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, BLE_RPA_REST_BIT);
  205. }
  206. static void IRAM_ATTR osi_assert_wrapper(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2)
  207. {
  208. BT_ASSERT_PRINT("BLE assert: line %d in function %s, param: 0x%x, 0x%x", ln, fn, param1, param2);
  209. assert(0);
  210. }
  211. static uint32_t IRAM_ATTR osi_random_wrapper(void)
  212. {
  213. return esp_random();
  214. }
  215. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
  216. {
  217. #if CONFIG_SW_COEXIST_ENABLE
  218. coex_schm_status_bit_set(type, status);
  219. #endif
  220. }
  221. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
  222. {
  223. #if CONFIG_SW_COEXIST_ENABLE
  224. coex_schm_status_bit_clear(type, status);
  225. #endif
  226. }
  227. #ifdef CONFIG_BT_BLUEDROID_ENABLED
  228. bool esp_vhci_host_check_send_available(void)
  229. {
  230. if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  231. return false;
  232. }
  233. return true;
  234. }
  235. /**
  236. * Allocates an mbuf for use by the nimble host.
  237. */
  238. static struct os_mbuf *ble_hs_mbuf_gen_pkt(uint16_t leading_space)
  239. {
  240. struct os_mbuf *om;
  241. int rc;
  242. om = os_msys_get_pkthdr(0, 0);
  243. if (om == NULL) {
  244. return NULL;
  245. }
  246. if (om->om_omp->omp_databuf_len < leading_space) {
  247. rc = os_mbuf_free_chain(om);
  248. assert(rc == 0);
  249. return NULL;
  250. }
  251. om->om_data += leading_space;
  252. return om;
  253. }
  254. /**
  255. * Allocates an mbuf suitable for an HCI ACL data packet.
  256. *
  257. * @return An empty mbuf on success; null on memory
  258. * exhaustion.
  259. */
  260. struct os_mbuf *ble_hs_mbuf_acl_pkt(void)
  261. {
  262. return ble_hs_mbuf_gen_pkt(4 + 1);
  263. }
  264. void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
  265. {
  266. if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  267. return;
  268. }
  269. if (*(data) == DATA_TYPE_COMMAND) {
  270. struct ble_hci_cmd *cmd = NULL;
  271. cmd = (struct ble_hci_cmd *) ble_hci_trans_buf_alloc(BLE_HCI_TRANS_BUF_CMD);
  272. memcpy((uint8_t *)cmd, data + 1, len - 1);
  273. ble_hci_trans_hs_cmd_tx((uint8_t *)cmd);
  274. }
  275. if (*(data) == DATA_TYPE_ACL) {
  276. struct os_mbuf *om = os_msys_get_pkthdr(len, ACL_DATA_MBUF_LEADINGSPCAE);
  277. assert(om);
  278. os_mbuf_append(om, &data[1], len - 1);
  279. ble_hci_trans_hs_acl_tx(om);
  280. }
  281. }
  282. esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
  283. {
  284. if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  285. return ESP_FAIL;
  286. }
  287. ble_hci_trans_cfg_hs(ble_hs_hci_rx_evt, NULL, ble_hs_rx_data, NULL);
  288. return ESP_OK;
  289. }
  290. #endif
  291. static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
  292. {
  293. return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
  294. }
  295. static void task_delete_wrapper(void *task_handle)
  296. {
  297. vTaskDelete(task_handle);
  298. }
  299. #ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
  300. static void hci_uart_start_tx_wrapper(int uart_no)
  301. {
  302. hci_uart_start_tx(uart_no);
  303. }
  304. static int hci_uart_init_cbs_wrapper(int uart_no, hci_uart_tx_char tx_func,
  305. hci_uart_tx_done tx_done, hci_uart_rx_char rx_func, void *arg)
  306. {
  307. int rc = -1;
  308. rc = hci_uart_init_cbs(uart_no, tx_func, tx_done, rx_func, arg);
  309. return rc;
  310. }
  311. static int hci_uart_config_wrapper(int port_num, int32_t baud_rate, uint8_t data_bits, uint8_t stop_bits,
  312. uart_parity_t parity, uart_hw_flowcontrol_t flow_ctl)
  313. {
  314. int rc = -1;
  315. rc = hci_uart_config(port_num, baud_rate, data_bits, stop_bits, parity, flow_ctl);
  316. return rc;
  317. }
  318. static int hci_uart_close_wrapper(int uart_no)
  319. {
  320. int rc = -1;
  321. rc = hci_uart_close(uart_no);
  322. return rc;
  323. }
  324. static void hci_uart_blocking_tx_wrapper(int port, uint8_t data)
  325. {
  326. //This function is nowhere to use.
  327. }
  328. static int hci_uart_init_wrapper(int uart_no, void *cfg)
  329. {
  330. //This function is nowhere to use.
  331. return 0;
  332. }
  333. #endif //CONFIG_BT_LE_HCI_INTERFACE_USE_UART
  334. static int ble_hci_unregistered_hook(void*, void*)
  335. {
  336. ESP_LOGD(NIMBLE_PORT_LOG_TAG,"%s ble hci rx_evt is not registered.",__func__);
  337. return 0;
  338. }
  339. static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle_in)
  340. {
  341. int rc = esp_intr_alloc(source, flags | ESP_INTR_FLAG_IRAM, handler, arg, (intr_handle_t *)ret_handle_in);
  342. return rc;
  343. }
  344. static int esp_intr_free_wrapper(void **ret_handle)
  345. {
  346. int rc = 0;
  347. rc = esp_intr_free((intr_handle_t) * ret_handle);
  348. *ret_handle = NULL;
  349. return rc;
  350. }
  351. IRAM_ATTR void controller_sleep_cb(uint32_t enable_tick, void *arg)
  352. {
  353. if (!s_ble_active) {
  354. return;
  355. }
  356. #ifdef CONFIG_PM_ENABLE
  357. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  358. uint32_t delta_tick;
  359. uint32_t us_to_sleep;
  360. uint32_t sleep_tick;
  361. uint32_t tick_invalid = *(uint32_t*)(arg);
  362. assert(arg != NULL);
  363. if (!tick_invalid) {
  364. sleep_tick = r_os_cputime_get32();
  365. // start a timer to wake up and acquire the pm_lock before modem_sleep awakes
  366. delta_tick = enable_tick - sleep_tick;
  367. if (delta_tick & 0x80000000) {
  368. return;
  369. }
  370. us_to_sleep = r_os_cputime_ticks_to_usecs(delta_tick);
  371. if (us_to_sleep <= BTDM_MIN_TIMER_UNCERTAINTY_US) {
  372. return;
  373. }
  374. esp_err_t err = esp_timer_start_once(s_ble_sleep_timer, us_to_sleep - BTDM_MIN_TIMER_UNCERTAINTY_US);
  375. if (err != ESP_OK) {
  376. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ESP timer start failed\n");
  377. return;
  378. }
  379. }
  380. #endif // CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  381. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  382. r_ble_rtc_wake_up_state_clr();
  383. #endif
  384. esp_pm_lock_release(s_pm_lock);
  385. #endif // CONFIG_PM_ENABLE
  386. esp_phy_disable();
  387. s_ble_active = false;
  388. }
  389. IRAM_ATTR void controller_wakeup_cb(void *arg)
  390. {
  391. if (s_ble_active) {
  392. return;
  393. }
  394. esp_phy_enable();
  395. // need to check if need to call pm lock here
  396. #ifdef CONFIG_PM_ENABLE
  397. esp_pm_lock_acquire(s_pm_lock);
  398. #endif //CONFIG_PM_ENABLE
  399. s_ble_active = true;
  400. }
  401. #ifdef CONFIG_PM_ENABLE
  402. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  403. static void ble_sleep_timer_callback(void * arg)
  404. {
  405. }
  406. #endif // CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  407. #endif // CONFIG_PM_ENABLE
  408. esp_err_t controller_sleep_init(void)
  409. {
  410. esp_err_t rc = 0;
  411. #ifdef CONFIG_BT_LE_SLEEP_ENABLE
  412. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "BLE modem sleep is enabled\n");
  413. r_ble_lll_rfmgmt_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0, 500 + BLE_RTC_DELAY_US);
  414. #ifdef CONFIG_PM_ENABLE
  415. esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_ON);
  416. #endif // CONFIG_PM_ENABLE
  417. #endif // CONFIG_BT_LE_SLEEP_ENABLE
  418. // enable light sleep
  419. #ifdef CONFIG_PM_ENABLE
  420. rc = esp_pm_lock_create(ESP_PM_CPU_FREQ_MAX, 0, "bt", &s_pm_lock);
  421. if (rc != ESP_OK) {
  422. goto error;
  423. }
  424. esp_pm_lock_acquire(s_pm_lock);
  425. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  426. esp_timer_create_args_t create_args = {
  427. .callback = ble_sleep_timer_callback,
  428. .arg = NULL,
  429. .name = "btSlp"
  430. };
  431. rc = esp_timer_create(&create_args, &s_ble_sleep_timer);
  432. if (rc != ESP_OK) {
  433. goto error;
  434. }
  435. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is ESP timer");
  436. #endif //CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  437. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  438. esp_sleep_enable_bt_wakeup();
  439. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is BLE timer");
  440. #endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  441. return rc;
  442. error:
  443. /*lock should release first and then delete*/
  444. if (s_pm_lock != NULL) {
  445. esp_pm_lock_release(s_pm_lock);
  446. esp_pm_lock_delete(s_pm_lock);
  447. s_pm_lock = NULL;
  448. }
  449. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  450. if (s_ble_sleep_timer != NULL) {
  451. esp_timer_stop(s_ble_sleep_timer);
  452. esp_timer_delete(s_ble_sleep_timer);
  453. s_ble_sleep_timer = NULL;
  454. }
  455. #endif // CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  456. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  457. esp_sleep_disable_bt_wakeup();
  458. #endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  459. #endif //CONFIG_PM_ENABLE
  460. return rc;
  461. }
  462. void controller_sleep_deinit(void)
  463. {
  464. #ifdef CONFIG_PM_ENABLE
  465. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  466. r_ble_rtc_wake_up_state_clr();
  467. esp_sleep_disable_bt_wakeup();
  468. #endif //CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
  469. esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_AUTO);
  470. /*lock should release first and then delete*/
  471. if (s_ble_active) {
  472. esp_pm_lock_release(s_pm_lock);
  473. }
  474. esp_pm_lock_delete(s_pm_lock);
  475. s_pm_lock = NULL;
  476. #ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  477. if (s_ble_sleep_timer != NULL) {
  478. esp_timer_stop(s_ble_sleep_timer);
  479. esp_timer_delete(s_ble_sleep_timer);
  480. s_ble_sleep_timer = NULL;
  481. }
  482. #endif //CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
  483. #endif //CONFIG_PM_ENABLE
  484. }
  485. void ble_rtc_clk_init(void)
  486. {
  487. // modem_clkrst_reg
  488. // LP_TIMER_SEL_XTAL32K -> 0
  489. // LP_TIMER_SEL_XTAL -> 1
  490. // LP_TIMER_SEL_8M -> 0
  491. // LP_TIMER_SEL_RTC_SLOW -> 0
  492. SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_XTAL32K_S);
  493. SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 1, MODEM_CLKRST_LP_TIMER_SEL_XTAL_S);
  494. SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_8M_S);
  495. SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_RTC_SLOW_S);
  496. #ifdef CONFIG_XTAL_FREQ_26
  497. // LP_TIMER_CLK_DIV_NUM -> 130
  498. SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM, 129, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_S);
  499. #else
  500. // LP_TIMER_CLK_DIV_NUM -> 250
  501. SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM, 249, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_S);
  502. #endif // CONFIG_XTAL_FREQ_26
  503. // MODEM_CLKRST_ETM_CLK_ACTIVE -> 1
  504. // MODEM_CLKRST_ETM_CLK_SEL -> 0
  505. SET_PERI_REG_BITS(MODEM_CLKRST_ETM_CLK_CONF_REG, 1, 1, MODEM_CLKRST_ETM_CLK_ACTIVE_S);
  506. SET_PERI_REG_BITS(MODEM_CLKRST_ETM_CLK_CONF_REG, 1, 0, MODEM_CLKRST_ETM_CLK_SEL_S);
  507. }
  508. esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
  509. {
  510. esp_err_t ret = ESP_OK;
  511. ble_npl_count_info_t npl_info;
  512. memset(&npl_info, 0, sizeof(ble_npl_count_info_t));
  513. if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
  514. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
  515. return ESP_ERR_INVALID_STATE;
  516. }
  517. if (!cfg) {
  518. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "cfg is NULL");
  519. return ESP_ERR_INVALID_ARG;
  520. }
  521. ble_rtc_clk_init();
  522. ret = esp_register_ext_funcs(&ext_funcs_ro);
  523. if (ret != ESP_OK) {
  524. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "register extend functions failed");
  525. return ret;
  526. }
  527. /* Initialize the function pointers for OS porting */
  528. npl_freertos_funcs_init();
  529. struct npl_funcs_t *p_npl_funcs = npl_freertos_funcs_get();
  530. if (!p_npl_funcs) {
  531. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl functions get failed");
  532. return ESP_ERR_INVALID_ARG;
  533. }
  534. ret = esp_register_npl_funcs(p_npl_funcs);
  535. if (ret != ESP_OK) {
  536. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl functions register failed");
  537. goto free_mem;
  538. }
  539. ble_get_npl_element_info(cfg, &npl_info);
  540. npl_freertos_set_controller_npl_info(&npl_info);
  541. if (npl_freertos_mempool_init() != 0) {
  542. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl mempool init failed");
  543. ret = ESP_ERR_INVALID_ARG;
  544. goto free_mem;
  545. }
  546. /* Initialize the global memory pool */
  547. ret = os_msys_buf_alloc();
  548. if (ret != ESP_OK) {
  549. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "os msys alloc failed");
  550. goto free_mem;
  551. }
  552. os_msys_init();
  553. #if CONFIG_BT_NIMBLE_ENABLED
  554. // ble_npl_eventq_init() need to use npl function in rom and must be called after esp_bt_controller_init()
  555. /* Initialize default event queue */
  556. ble_npl_eventq_init(nimble_port_get_dflt_eventq());
  557. #endif
  558. esp_phy_modem_init();
  559. periph_module_enable(PERIPH_BT_MODULE);
  560. // init phy
  561. esp_phy_enable();
  562. s_ble_active = true;
  563. // init bb
  564. bt_bb_v2_init_cmplx(1);
  565. if (ble_osi_coex_funcs_register((struct osi_coex_funcs_t *)&s_osi_coex_funcs_ro) != 0) {
  566. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "osi coex funcs reg failed");
  567. ret = ESP_ERR_INVALID_ARG;
  568. goto free_controller;
  569. }
  570. #if CONFIG_SW_COEXIST_ENABLE
  571. coex_init();
  572. #endif
  573. ret = ble_controller_init(cfg);
  574. if (ret != ESP_OK) {
  575. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_init failed %d", ret);
  576. goto free_controller;
  577. }
  578. ret = controller_sleep_init();
  579. if (ret != ESP_OK) {
  580. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "controller_sleep_init failed %d", ret);
  581. goto free_controller;
  582. }
  583. uint8_t mac[6];
  584. ESP_ERROR_CHECK(esp_read_mac((uint8_t *)mac, ESP_MAC_BT));
  585. swap_in_place(mac, 6);
  586. esp_ble_ll_set_public_addr(mac);
  587. ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  588. ble_hci_trans_cfg_hs((ble_hci_trans_rx_cmd_fn *)ble_hci_unregistered_hook,NULL,
  589. (ble_hci_trans_rx_acl_fn *)ble_hci_unregistered_hook,NULL);
  590. return ESP_OK;
  591. free_controller:
  592. controller_sleep_deinit();
  593. ble_controller_deinit();
  594. esp_phy_disable();
  595. esp_phy_modem_deinit();
  596. #if CONFIG_BT_NIMBLE_ENABLED
  597. ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
  598. #endif // CONFIG_BT_NIMBLE_ENABLED
  599. free_mem:
  600. os_msys_buf_free();
  601. npl_freertos_mempool_deinit();
  602. esp_unregister_npl_funcs();
  603. npl_freertos_funcs_deinit();
  604. esp_unregister_ext_funcs();
  605. return ret;
  606. }
  607. esp_err_t esp_bt_controller_deinit(void)
  608. {
  609. if ((ble_controller_status < ESP_BT_CONTROLLER_STATUS_INITED) || (ble_controller_status >= ESP_BT_CONTROLLER_STATUS_ENABLED)) {
  610. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
  611. return ESP_FAIL;
  612. }
  613. controller_sleep_deinit();
  614. if (s_ble_active) {
  615. esp_phy_disable();
  616. s_ble_active = false;
  617. }
  618. ble_controller_deinit();
  619. #if CONFIG_BT_NIMBLE_ENABLED
  620. /* De-initialize default event queue */
  621. ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
  622. #endif
  623. os_msys_buf_free();
  624. esp_unregister_npl_funcs();
  625. esp_unregister_ext_funcs();
  626. /* De-initialize npl functions */
  627. npl_freertos_funcs_deinit();
  628. npl_freertos_mempool_deinit();
  629. esp_phy_modem_deinit();
  630. ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  631. return ESP_OK;
  632. }
  633. esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
  634. {
  635. if (mode != ESP_BT_MODE_BLE) {
  636. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller mode");
  637. return ESP_FAIL;
  638. }
  639. if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  640. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
  641. return ESP_FAIL;
  642. }
  643. #if CONFIG_SW_COEXIST_ENABLE
  644. coex_enable();
  645. #endif
  646. if (ble_controller_enable(mode) != 0) {
  647. return ESP_FAIL;
  648. }
  649. ble_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
  650. return ESP_OK;
  651. }
  652. esp_err_t esp_bt_controller_disable(void)
  653. {
  654. if (ble_controller_status < ESP_BT_CONTROLLER_STATUS_ENABLED) {
  655. ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
  656. return ESP_FAIL;
  657. }
  658. if (ble_controller_disable() != 0) {
  659. return ESP_FAIL;
  660. }
  661. ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  662. return ESP_OK;
  663. }
  664. esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
  665. {
  666. ESP_LOGD(NIMBLE_PORT_LOG_TAG, "%s not implemented, return OK", __func__);
  667. return ESP_OK;
  668. }
  669. static esp_err_t try_heap_caps_add_region(intptr_t start, intptr_t end)
  670. {
  671. int ret = heap_caps_add_region(start, end);
  672. /* heap_caps_add_region() returns ESP_ERR_INVALID_SIZE if the memory region is
  673. * is too small to fit a heap. This cannot be termed as a fatal error and hence
  674. * we replace it by ESP_OK
  675. */
  676. if (ret == ESP_ERR_INVALID_SIZE) {
  677. return ESP_OK;
  678. }
  679. return ret;
  680. }
  681. esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
  682. {
  683. intptr_t mem_start, mem_end;
  684. if (mode == ESP_BT_MODE_BLE) {
  685. mem_start = (intptr_t)&_bt_bss_start;
  686. mem_end = (intptr_t)&_bt_bss_end;
  687. if (mem_start != mem_end) {
  688. ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release BT BSS [0x%08x] - [0x%08x]", mem_start, mem_end);
  689. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  690. }
  691. mem_start = (intptr_t)&_bt_data_start;
  692. mem_end = (intptr_t)&_bt_data_end;
  693. if (mem_start != mem_end) {
  694. ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release BT Data [0x%08x] - [0x%08x]", mem_start, mem_end);
  695. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  696. }
  697. mem_start = (intptr_t)&_nimble_bss_start;
  698. mem_end = (intptr_t)&_nimble_bss_end;
  699. if (mem_start != mem_end) {
  700. ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release NimBLE BSS [0x%08x] - [0x%08x]", mem_start, mem_end);
  701. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  702. }
  703. mem_start = (intptr_t)&_nimble_data_start;
  704. mem_end = (intptr_t)&_nimble_data_end;
  705. if (mem_start != mem_end) {
  706. ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release NimBLE Data [0x%08x] - [0x%08x]", mem_start, mem_end);
  707. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  708. }
  709. }
  710. return ESP_OK;
  711. }
  712. esp_bt_controller_status_t esp_bt_controller_get_status(void)
  713. {
  714. return ble_controller_status;
  715. }
  716. /* extra functions */
  717. esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
  718. {
  719. esp_err_t stat = ESP_FAIL;
  720. switch (power_type) {
  721. case ESP_BLE_PWR_TYPE_DEFAULT:
  722. case ESP_BLE_PWR_TYPE_ADV:
  723. case ESP_BLE_PWR_TYPE_SCAN:
  724. if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
  725. stat = ESP_OK;
  726. }
  727. break;
  728. case ESP_BLE_PWR_TYPE_CONN_HDL0:
  729. case ESP_BLE_PWR_TYPE_CONN_HDL1:
  730. case ESP_BLE_PWR_TYPE_CONN_HDL2:
  731. case ESP_BLE_PWR_TYPE_CONN_HDL3:
  732. case ESP_BLE_PWR_TYPE_CONN_HDL4:
  733. case ESP_BLE_PWR_TYPE_CONN_HDL5:
  734. case ESP_BLE_PWR_TYPE_CONN_HDL6:
  735. case ESP_BLE_PWR_TYPE_CONN_HDL7:
  736. case ESP_BLE_PWR_TYPE_CONN_HDL8:
  737. if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type, power_level) == 0) {
  738. stat = ESP_OK;
  739. }
  740. break;
  741. default:
  742. stat = ESP_ERR_NOT_SUPPORTED;
  743. break;
  744. }
  745. return stat;
  746. }
  747. esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type, uint16_t handle, esp_power_level_t power_level)
  748. {
  749. esp_err_t stat = ESP_FAIL;
  750. switch (power_type) {
  751. case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
  752. case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
  753. case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
  754. if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
  755. stat = ESP_OK;
  756. }
  757. break;
  758. case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
  759. case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
  760. if (ble_txpwr_set(power_type, handle, power_level) == 0) {
  761. stat = ESP_OK;
  762. }
  763. break;
  764. default:
  765. stat = ESP_ERR_NOT_SUPPORTED;
  766. break;
  767. }
  768. return stat;
  769. }
  770. esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
  771. {
  772. int tx_level = 0;
  773. switch (power_type) {
  774. case ESP_BLE_PWR_TYPE_ADV:
  775. case ESP_BLE_PWR_TYPE_SCAN:
  776. case ESP_BLE_PWR_TYPE_DEFAULT:
  777. tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
  778. break;
  779. case ESP_BLE_PWR_TYPE_CONN_HDL0:
  780. case ESP_BLE_PWR_TYPE_CONN_HDL1:
  781. case ESP_BLE_PWR_TYPE_CONN_HDL2:
  782. case ESP_BLE_PWR_TYPE_CONN_HDL3:
  783. case ESP_BLE_PWR_TYPE_CONN_HDL4:
  784. case ESP_BLE_PWR_TYPE_CONN_HDL5:
  785. case ESP_BLE_PWR_TYPE_CONN_HDL6:
  786. case ESP_BLE_PWR_TYPE_CONN_HDL7:
  787. case ESP_BLE_PWR_TYPE_CONN_HDL8:
  788. tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type);
  789. break;
  790. default:
  791. return ESP_PWR_LVL_INVALID;
  792. }
  793. if (tx_level < 0) {
  794. return ESP_PWR_LVL_INVALID;
  795. }
  796. return (esp_power_level_t)tx_level;
  797. }
  798. esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t power_type, uint16_t handle)
  799. {
  800. int tx_level = 0;
  801. switch (power_type) {
  802. case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
  803. case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
  804. case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
  805. tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
  806. break;
  807. case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
  808. case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
  809. tx_level = ble_txpwr_get(power_type, handle);
  810. break;
  811. default:
  812. return ESP_PWR_LVL_INVALID;
  813. }
  814. if (tx_level < 0) {
  815. return ESP_PWR_LVL_INVALID;
  816. }
  817. return (esp_power_level_t)tx_level;
  818. }
  819. #if (!CONFIG_BT_NIMBLE_ENABLED) && (CONFIG_BT_CONTROLLER_ENABLED == true)
  820. #define BLE_SM_KEY_ERR 0x17
  821. #if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  822. #include "mbedtls/aes.h"
  823. #if CONFIG_BT_LE_SM_SC
  824. #include "mbedtls/cipher.h"
  825. #include "mbedtls/entropy.h"
  826. #include "mbedtls/ctr_drbg.h"
  827. #include "mbedtls/cmac.h"
  828. #include "mbedtls/ecdh.h"
  829. #include "mbedtls/ecp.h"
  830. #endif
  831. #else
  832. #include "tinycrypt/aes.h"
  833. #include "tinycrypt/constants.h"
  834. #include "tinycrypt/utils.h"
  835. #if CONFIG_BT_LE_SM_SC
  836. #include "tinycrypt/cmac_mode.h"
  837. #include "tinycrypt/ecc_dh.h"
  838. #endif
  839. #endif
  840. #if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  841. #if CONFIG_BT_LE_SM_SC
  842. static mbedtls_ecp_keypair keypair;
  843. #endif
  844. #endif
  845. int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_key_y,
  846. const uint8_t *our_priv_key, uint8_t *out_dhkey)
  847. {
  848. uint8_t dh[32];
  849. uint8_t pk[64];
  850. uint8_t priv[32];
  851. int rc = BLE_SM_KEY_ERR;
  852. swap_buf(pk, peer_pub_key_x, 32);
  853. swap_buf(&pk[32], peer_pub_key_y, 32);
  854. swap_buf(priv, our_priv_key, 32);
  855. #if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  856. struct mbedtls_ecp_point pt = {0}, Q = {0};
  857. mbedtls_mpi z = {0}, d = {0};
  858. mbedtls_ctr_drbg_context ctr_drbg = {0};
  859. mbedtls_entropy_context entropy = {0};
  860. uint8_t pub[65] = {0};
  861. /* Hardcoded first byte of pub key for MBEDTLS_ECP_PF_UNCOMPRESSED */
  862. pub[0] = 0x04;
  863. memcpy(&pub[1], pk, 64);
  864. /* Initialize the required structures here */
  865. mbedtls_ecp_point_init(&pt);
  866. mbedtls_ecp_point_init(&Q);
  867. mbedtls_ctr_drbg_init(&ctr_drbg);
  868. mbedtls_entropy_init(&entropy);
  869. mbedtls_mpi_init(&d);
  870. mbedtls_mpi_init(&z);
  871. /* Below 3 steps are to validate public key on curve secp256r1 */
  872. if (mbedtls_ecp_group_load(&keypair.MBEDTLS_PRIVATE(grp), MBEDTLS_ECP_DP_SECP256R1) != 0) {
  873. goto exit;
  874. }
  875. if (mbedtls_ecp_point_read_binary(&keypair.MBEDTLS_PRIVATE(grp), &pt, pub, 65) != 0) {
  876. goto exit;
  877. }
  878. if (mbedtls_ecp_check_pubkey(&keypair.MBEDTLS_PRIVATE(grp), &pt) != 0) {
  879. goto exit;
  880. }
  881. /* Set PRNG */
  882. if ((rc = mbedtls_ctr_drbg_seed(&ctr_drbg, mbedtls_entropy_func, &entropy,
  883. NULL, 0)) != 0) {
  884. goto exit;
  885. }
  886. /* Prepare point Q from pub key */
  887. if (mbedtls_ecp_point_read_binary(&keypair.MBEDTLS_PRIVATE(grp), &Q, pub, 65) != 0) {
  888. goto exit;
  889. }
  890. if (mbedtls_mpi_read_binary(&d, priv, 32) != 0) {
  891. goto exit;
  892. }
  893. rc = mbedtls_ecdh_compute_shared(&keypair.MBEDTLS_PRIVATE(grp), &z, &Q, &d,
  894. mbedtls_ctr_drbg_random, &ctr_drbg);
  895. if (rc != 0) {
  896. goto exit;
  897. }
  898. rc = mbedtls_mpi_write_binary(&z, dh, 32);
  899. if (rc != 0) {
  900. goto exit;
  901. }
  902. exit:
  903. mbedtls_ecp_point_free(&pt);
  904. mbedtls_mpi_free(&z);
  905. mbedtls_mpi_free(&d);
  906. mbedtls_ecp_point_free(&Q);
  907. mbedtls_entropy_free(&entropy);
  908. mbedtls_ctr_drbg_free(&ctr_drbg);
  909. if (rc != 0) {
  910. return BLE_SM_KEY_ERR;
  911. }
  912. #else
  913. if (uECC_valid_public_key(pk, &curve_secp256r1) < 0) {
  914. return BLE_SM_KEY_ERR;
  915. }
  916. rc = uECC_shared_secret(pk, priv, dh, &curve_secp256r1);
  917. if (rc == TC_CRYPTO_FAIL) {
  918. return BLE_SM_KEY_ERR;
  919. }
  920. #endif
  921. swap_buf(out_dhkey, dh, 32);
  922. return 0;
  923. }
  924. /* based on Core Specification 4.2 Vol 3. Part H 2.3.5.6.1 */
  925. static const uint8_t ble_sm_alg_dbg_priv_key[32] = {
  926. 0x3f, 0x49, 0xf6, 0xd4, 0xa3, 0xc5, 0x5f, 0x38, 0x74, 0xc9, 0xb3, 0xe3,
  927. 0xd2, 0x10, 0x3f, 0x50, 0x4a, 0xff, 0x60, 0x7b, 0xeb, 0x40, 0xb7, 0x99,
  928. 0x58, 0x99, 0xb8, 0xa6, 0xcd, 0x3c, 0x1a, 0xbd
  929. };
  930. #if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  931. static int mbedtls_gen_keypair(uint8_t *public_key, uint8_t *private_key)
  932. {
  933. int rc = BLE_SM_KEY_ERR;
  934. mbedtls_entropy_context entropy = {0};
  935. mbedtls_ctr_drbg_context ctr_drbg = {0};
  936. mbedtls_entropy_init(&entropy);
  937. mbedtls_ctr_drbg_init(&ctr_drbg);
  938. mbedtls_ecp_keypair_init(&keypair);
  939. if ((rc = mbedtls_ctr_drbg_seed(&ctr_drbg, mbedtls_entropy_func, &entropy,
  940. NULL, 0)) != 0) {
  941. goto exit;
  942. }
  943. if ((rc = mbedtls_ecp_gen_key(MBEDTLS_ECP_DP_SECP256R1, &keypair,
  944. mbedtls_ctr_drbg_random, &ctr_drbg)) != 0) {
  945. goto exit;
  946. }
  947. if ((rc = mbedtls_mpi_write_binary(&keypair.MBEDTLS_PRIVATE(d), private_key, 32)) != 0) {
  948. goto exit;
  949. }
  950. size_t olen = 0;
  951. uint8_t pub[65] = {0};
  952. if ((rc = mbedtls_ecp_point_write_binary(&keypair.MBEDTLS_PRIVATE(grp), &keypair.MBEDTLS_PRIVATE(Q), MBEDTLS_ECP_PF_UNCOMPRESSED,
  953. &olen, pub, 65)) != 0) {
  954. goto exit;
  955. }
  956. memcpy(public_key, &pub[1], 64);
  957. exit:
  958. mbedtls_ctr_drbg_free(&ctr_drbg);
  959. mbedtls_entropy_free(&entropy);
  960. if (rc != 0) {
  961. mbedtls_ecp_keypair_free(&keypair);
  962. return BLE_SM_KEY_ERR;
  963. }
  964. return 0;
  965. }
  966. #endif
  967. /**
  968. * pub: 64 bytes
  969. * priv: 32 bytes
  970. */
  971. int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv)
  972. {
  973. #if CONFIG_BT_LE_SM_SC_DEBUG_KEYS
  974. swap_buf(pub, ble_sm_alg_dbg_pub_key, 32);
  975. swap_buf(&pub[32], &ble_sm_alg_dbg_pub_key[32], 32);
  976. swap_buf(priv, ble_sm_alg_dbg_priv_key, 32);
  977. #else
  978. uint8_t pk[64];
  979. do {
  980. #if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
  981. if (mbedtls_gen_keypair(pk, priv) != 0) {
  982. return BLE_SM_KEY_ERR;
  983. }
  984. #else
  985. if (uECC_make_key(pk, priv, &curve_secp256r1) != TC_CRYPTO_SUCCESS) {
  986. return BLE_SM_KEY_ERR;
  987. }
  988. #endif
  989. /* Make sure generated key isn't debug key. */
  990. } while (memcmp(priv, ble_sm_alg_dbg_priv_key, 32) == 0);
  991. swap_buf(pub, pk, 32);
  992. swap_buf(&pub[32], &pk[32], 32);
  993. swap_in_place(priv, 32);
  994. #endif
  995. return 0;
  996. }
  997. #endif