sdio_slave.rst 11 KB

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  1. SDIO Card Slave Driver
  2. ======================
  3. Overview
  4. --------
  5. .. note:: At the moment, this code has been proven to work on the Wrover-Kit V3. Earlier versions of the Wrover-Kit
  6. and other development kits are electrically incompatible with this code. Functionality on other devboards is untested.
  7. The ESP32 SDIO Card peripherals (Host, Slave) shares two sets of pins as below table.
  8. The first set is usually occupied by SPI0 bus which is responsible for the SPI flash holding the code to run.
  9. This means SDIO slave driver can only runs on the second set of pins while SDIO host is not using it.
  10. +----------+-------+-------+
  11. | Pin Name | Slot1 | Slot2 |
  12. + +-------+-------+
  13. | | GPIO Number |
  14. +==========+=======+=======+
  15. | CLK | 6 | 14 |
  16. +----------+-------+-------+
  17. | CMD | 11 | 15 |
  18. +----------+-------+-------+
  19. | DAT0 | 7 | 2 |
  20. +----------+-------+-------+
  21. | DAT1 | 8 | 4 |
  22. +----------+-------+-------+
  23. | DAT2 | 9 | 12 |
  24. +----------+-------+-------+
  25. | DAT3 | 10 | 13 |
  26. +----------+-------+-------+
  27. The SDIO slave can run under 3 modes: SPI, 1-bit SD and 4-bit SD modes, which is detected automatically by the
  28. hardware. According to the SDIO specification, the host initialize the slave into SD mode by first sending CMD0 with
  29. DAT3 pin high, while initialize the slave into SPI mode by sending CMD0 with CS pin (the same pin as DAT3) low. After the
  30. initialization, the host can enable the 4-bit SD mode by writing CCCR register 0x07 by CMD52. All the bus detection
  31. process are handled by the slave peripheral.
  32. The host has to communicate with the slave by an ESP-slave-specific protocol. The slave driver offers 3 services over
  33. Function 1 access by CMD52 and CMD53: (1) a sending FIFO and a receiving FIFO, (2) 52 8-bit R/W registers shared by
  34. host and slave, (3) 16 interrupt sources (8 from host to slave, and 8 from slave to host).
  35. Terminology
  36. ^^^^^^^^^^^
  37. The SDIO slave driver uses the following terms:
  38. - Transfer: a transfer is always started by a command token from the host, and may contain a reply and several data
  39. blocks. ESP32 slave software is based on transfers.
  40. - Sending: slave to host transfers.
  41. - Receiving: host to slave transfers.
  42. .. note:: Register names in ESP Rechnical Reference Manual are oriented from the point of view of the host, i.e. 'rx'
  43. registers refer to sending, while 'tx' registers refer to receiving. We're not using `tx` or `rx` in the driver to
  44. avoid ambiguities.
  45. - FIFO: specific address in Function 1 that can be access by CMD53 to read/write large amount of data. The address is
  46. related to the length requested to read from/write to the slave in a single transfer:
  47. *requested length* = 0x1F800-address.
  48. - Ownership: When the driver takes ownership of a buffer, it means the driver can randomly read/write the buffer
  49. (mostly by the hardware). The application should not read/write the buffer until the ownership is returned to the
  50. application. If the application reads from a buffer owned by a receiving driver, the data read can be random; if
  51. the application writes to a buffer owned by a sending driver, the data sent may be corrupted.
  52. - Requested length: The length requested in one transfer determined by the FIFO address.
  53. - Transfer length: The length requested in one transfer determined by the CMD53 byte/block count field.
  54. .. note:: Requested length is different from the transfer length. ESP32 slave DMA base on the *requested length* rather
  55. than the *transfer length*. The *transfer length* should be no shorter than the *requested length*, and the rest
  56. part will be filled with 0 (sending) or discard (receiving).
  57. - Receiving buffer size: The buffer size is pre-defined between the host and the slave before communication starts.
  58. Slave application has to set the buffer size during initialization by the ``recv_buffer_size`` member of
  59. ``sdio_slave_config_t``.
  60. - Interrupts: the esp32 slave support interrupts in two directions: from host to slave (called slave interrupts below)
  61. and from slave to host (called host interrupts below). See more in :ref:`interrupts`.
  62. - Registers: specific address in Function 1 access by CMD52 or CMD53.
  63. ESP SDIO Slave Protocol
  64. ^^^^^^^^^^^^^^^^^^^^^^^
  65. The communication protocol slave used to communicate with the host is ESP32 specific, please refer to
  66. :doc:`esp_slave_protocol`, or example :example:`peripherals/sdio` for designing a host.
  67. .. toctree::
  68. :hidden:
  69. esp_slave_protocol
  70. .. _interrupts:
  71. Interrupts
  72. ^^^^^^^^^^
  73. There are interrupts from host to slave, and from slave to host to help communicating conveniently.
  74. Slave Interrupts
  75. """"""""""""""""
  76. The host can interrupt the slave by writing any one bit in the register 0x08D. Once any bit of the register is
  77. set, an interrupt is raised and the SDIO slave driver calls the callback function defined in the ``slave_intr_cb`` member
  78. in the ``sdio_slave_config_t`` structure.
  79. .. note:: The callback function is called in the ISR, do not use any delay, loop or spinlock in the callback.
  80. There's another set of functions can be used. You can call ``sdio_slave_wait_int`` to wait for an interrupt within a
  81. certain time, or call ``sdio_slave_clear_int`` to clear interrupts from host. The callback function can work with the
  82. wait functions perfectly.
  83. Host Interrupts
  84. """""""""""""""
  85. The slave can interrupt the host by an interrupt line (at certain time) which is level sensitive. When the host see the
  86. interrupt line pulled down, it may read the slave interrupt status register, to see the interrupt source. Host can clear
  87. interrupt bits, or choose to disable a interrupt source. The interrupt line will hold active until all the sources are
  88. cleared or disabled.
  89. There are several dedicated interrupt sources as well as general purpose sources. see ``sdio_slave_hostint_t`` for
  90. more information.
  91. Shared Registers
  92. ^^^^^^^^^^^^^^^^
  93. There are 52 8-bit R/W shared registers to share information between host and slave. The slave can write or read the
  94. registers at any time by ``sdio_slave_read_reg`` and ``sdio_slave_write_reg``. The host can access (R/W) the register by CMD52 or CMD53.
  95. Receiving FIFO
  96. ^^^^^^^^^^^^^^
  97. When the host is going to send the slave some packets, it has to check whether the slave is ready to receive by reading
  98. the buffer number of slave.
  99. To allow the host sending data to the slave, the application has to load buffers to the slave driver by the following steps:
  100. 1. Register the buffer by calling ``sdio_slave_recv_register_buf``, and get the handle of the registered buffer. The driver
  101. will allocate memory for the linked-list descriptor needed to link the buffer onto the hardware.
  102. 2. Load buffers onto the driver by passing the buffer handle to ``sdio_slave_recv_load_buf``.
  103. 3. Call ``sdio_slave_recv`` to get the received data. If non-blocking call is needed, set ``wait=0``.
  104. 4. Pass the handle of processed buffer back to the driver by ``sdio_recv_load_buf`` again.
  105. .. note:: To avoid overhead from copying data, the driver itself doesn't have any buffer inside, the application is
  106. responsible to offer new buffers in time. The DMA will automatically store received data to the buffer.
  107. Sending FIFO
  108. ^^^^^^^^^^^^
  109. Each time the slave has data to send, it raises an interrupt and the host will request for the packet length. There are
  110. two sending modes:
  111. - Stream Mode: when a buffer is loaded to the driver, the buffer length will be counted into the packet length requested
  112. by host in the incoming communications. Regardless previous packets are sent or not. This means the host can get data
  113. of several buffers in one transfer.
  114. - Packet Mode: the packet length is updated packet by packet, and only when previous packet is sent. This means that the
  115. host can only get data of one buffer in one transfer.
  116. .. note:: To avoid overhead from copying data, the driver itself doesn't have any buffer inside. Namely, the DMA takes
  117. data directly from the buffer provided by the application. The application should not touch the buffer until the
  118. sending is finished.
  119. The sending mode can be set in the ``sending_mode`` member of ``sdio_slave_config_t``, and the buffer numbers can be
  120. set in the ``send_queue_size``. All the buffers are restricted to be no larger than 4092 bytes. Though in the stream
  121. mode several buffers can be sent in one transfer, each buffer is still counted as one in the queue.
  122. The application can call ``sdio_slave_transmit`` to send packets. In this case the function returns when the transfer
  123. is sucessfully done, so the queue is not fully used. When higher effeciency is required, the application can use the
  124. following functions instead:
  125. 1. Pass buffer information (address, length, as well as an ``arg`` indicating the buffer) to ``sdio_slave_send_queue``.
  126. If non-blocking call is needed, set ``wait=0``. If the ``wait`` is not ``portMAX_DELAY`` (wait until success),
  127. application has to check the result to know whether the data is put in to the queue or discard.
  128. 2. Call ``sdio_slave_send_get_finished`` to get and deal with a finished transfer. A buffer should be keep unmodified
  129. until returned from ``sdio_slave_send_get_finished``. This means the buffer is actually sent to the host, rather
  130. than just staying in the queue.
  131. There are several ways to use the ``arg`` in the queue parameter:
  132. 1. Directly point ``arg`` to a dynamic-allocated buffer, and use the ``arg`` to free it when transfer finished.
  133. 2. Wrap transfer informations in a transfer structure, and point ``arg`` to the structure. You can use the
  134. structure to do more things like::
  135. typedef struct {
  136. uint8_t* buffer;
  137. size_t size;
  138. int id;
  139. }sdio_transfer_t;
  140. //and send as:
  141. sdio_transfer_t trans = {
  142. .buffer = ADDRESS_TO_SEND,
  143. .size = 8,
  144. .id = 3, //the 3rd transfer so far
  145. };
  146. sdio_slave_send_queue(trans.buffer, trans.size, &trans, portMAX_DELAY);
  147. //... maybe more transfers are sent here
  148. //and deal with finished transfer as:
  149. sdio_transfer_t* arg = NULL;
  150. sdio_slave_send_get_finished((void**)&arg, portMAX_DELAY);
  151. ESP_LOGI("tag", "(%d) successfully send %d bytes of %p", arg->id, arg->size, arg->buffer);
  152. some_post_callback(arg); //do more things
  153. 3. Working with the receiving part of this driver, point ``arg`` to the receive buffer handle of this buffer. So
  154. that we can directly use the buffer to receive data when it's sent::
  155. uint8_t buffer[256]={1,2,3,4,5,6,7,8};
  156. sdio_slave_buf_handle_t handle = sdio_slave_recv_register_buf(buffer);
  157. sdio_slave_send_queue(buffer, 8, handle, portMAX_DELAY);
  158. //... maybe more transfers are sent here
  159. //and load finished buffer to receive as
  160. sdio_slave_buf_handle_t handle = NULL;
  161. sdio_slave_send_get_finished((void**)&handle, portMAX_DELAY);
  162. sdio_slave_recv_load_buf(handle);
  163. More about this, see :example:`peripherals/sdio`.
  164. Application Example
  165. -------------------
  166. Slave/master communication: :example:`peripherals/sdio`.
  167. API Reference
  168. -------------
  169. .. include:: /_build/inc/sdio_slave.inc