can.c 39 KB

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  1. // Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. // http://www.apache.org/licenses/LICENSE-2.0
  7. //
  8. // Unless required by applicable law or agreed to in writing, software
  9. // distributed under the License is distributed on an "AS IS" BASIS,
  10. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  11. // See the License for the specific language governing permissions and
  12. // limitations under the License.
  13. #include "freertos/FreeRTOS.h"
  14. #include "freertos/portmacro.h"
  15. #include "freertos/task.h"
  16. #include "freertos/queue.h"
  17. #include "freertos/semphr.h"
  18. #include "esp_types.h"
  19. #include "esp_log.h"
  20. #include "esp_intr_alloc.h"
  21. #include "esp_pm.h"
  22. #include "soc/dport_reg.h"
  23. #include "soc/can_struct.h"
  24. #include "driver/gpio.h"
  25. #include "driver/periph_ctrl.h"
  26. #include "driver/can.h"
  27. /* ---------------------------- Definitions --------------------------------- */
  28. //Internal Macros
  29. #define CAN_CHECK(cond, ret_val) ({ \
  30. if (!(cond)) { \
  31. return (ret_val); \
  32. } \
  33. })
  34. #define CAN_CHECK_FROM_CRIT(cond, ret_val) ({ \
  35. if (!(cond)) { \
  36. CAN_EXIT_CRITICAL(); \
  37. return ret_val; \
  38. } \
  39. })
  40. #define CAN_SET_FLAG(var, mask) ((var) |= (mask))
  41. #define CAN_RESET_FLAG(var, mask) ((var) &= ~(mask))
  42. #define CAN_TAG "CAN"
  43. //Driver default config/values
  44. #define DRIVER_DEFAULT_EWL 96 //Default Error Warning Limit value
  45. #define DRIVER_DEFAULT_TEC 0 //TX Error Counter starting value
  46. #define DRIVER_DEFAULT_REC 0 //RX Error Counter starting value
  47. #define DRIVER_DEFAULT_CLKOUT_DIV 14 //APB CLK divided by two
  48. #define DRIVER_DEFAULT_INTERRUPTS 0xE7 //Exclude data overrun
  49. #define DRIVER_DEFAULT_ERR_PASS_CNT 128 //Error counter threshold for error passive
  50. //Command Bit Masks
  51. #define CMD_TX_REQ 0x01 //Transmission Request
  52. #define CMD_ABORT_TX 0x02 //Abort Transmission
  53. #define CMD_RELEASE_RX_BUFF 0x04 //Release Receive Buffer
  54. #define CMD_CLR_DATA_OVRN 0x08 //Clear Data Overrun
  55. #define CMD_SELF_RX_REQ 0x10 //Self Reception Request
  56. #define CMD_TX_SINGLE_SHOT 0x03 //Single Shot Transmission
  57. #define CMD_SELF_RX_SINGLE_SHOT 0x12 //Single Shot Self Reception
  58. //Control flags
  59. #define CTRL_FLAG_STOPPED 0x001 //CAN peripheral in stopped state
  60. #define CTRL_FLAG_RECOVERING 0x002 //Bus is undergoing bus recovery
  61. #define CTRL_FLAG_ERR_WARN 0x004 //TEC or REC is >= error warning limit
  62. #define CTRL_FLAG_ERR_PASSIVE 0x008 //TEC or REC is >= 128
  63. #define CTRL_FLAG_BUS_OFF 0x010 //Bus-off due to TEC >= 256
  64. #define CTRL_FLAG_TX_BUFF_OCCUPIED 0x020 //Transmit buffer is occupied
  65. #define CTRL_FLAG_SELF_TEST 0x040 //Configured to Self Test Mode
  66. #define CTRL_FLAG_LISTEN_ONLY 0x080 //Configured to Listen Only Mode
  67. //Constants use for frame formatting and parsing
  68. #define FRAME_MAX_LEN 13 //EFF with 8 bytes of data
  69. #define FRAME_MAX_DATA_LEN 8 //Max data bytes allowed in CAN2.0
  70. #define FRAME_EXTD_ID_LEN 4 //EFF ID requires 4 bytes (29bit)
  71. #define FRAME_STD_ID_LEN 2 //SFF ID requires 2 bytes (11bit)
  72. #define FRAME_INFO_LEN 1 //Frame info requires 1 byte
  73. #define ALERT_LOG_LEVEL_WARNING CAN_ALERT_ARB_LOST //Alerts above and including this level use ESP_LOGW
  74. #define ALERT_LOG_LEVEL_ERROR CAN_ALERT_TX_FAILED //Alerts above and including this level use ESP_LOGE
  75. /* ------------------ Typedefs, structures, and variables ------------------- */
  76. /* Formatted frame structure has identical layout as TX/RX buffer registers.
  77. This allows for direct copy to/from TX/RX buffer. The two reserved bits in TX
  78. buffer are used in the frame structure to store the self_reception and
  79. single_shot flags. */
  80. typedef union {
  81. struct {
  82. struct {
  83. uint8_t dlc: 4; //Data length code (0 to 8) of the frame
  84. uint8_t self_reception: 1; //This frame should be transmitted using self reception command
  85. uint8_t single_shot: 1; //This frame should be transmitted using single shot command
  86. uint8_t rtr: 1; //This frame is a remote transmission request
  87. uint8_t frame_format: 1; //Format of the frame (1 = extended, 0 = standard)
  88. };
  89. union {
  90. struct {
  91. uint8_t id[FRAME_STD_ID_LEN]; //11 bit standard frame identifier
  92. uint8_t data[FRAME_MAX_DATA_LEN]; //Data bytes (0 to 8)
  93. uint8_t reserved8[2];
  94. } standard;
  95. struct {
  96. uint8_t id[FRAME_EXTD_ID_LEN]; //29 bit extended frame identifier
  97. uint8_t data[FRAME_MAX_DATA_LEN]; //Data bytes (0 to 8)
  98. } extended;
  99. };
  100. };
  101. uint8_t bytes[FRAME_MAX_LEN];
  102. } can_frame_t;
  103. //Control structure for CAN driver
  104. typedef struct {
  105. //Control and status members
  106. uint32_t control_flags;
  107. uint32_t rx_missed_count;
  108. uint32_t tx_failed_count;
  109. uint32_t arb_lost_count;
  110. uint32_t bus_error_count;
  111. intr_handle_t isr_handle;
  112. //TX and RX
  113. QueueHandle_t tx_queue;
  114. QueueHandle_t rx_queue;
  115. int tx_msg_count;
  116. int rx_msg_count;
  117. //Alerts
  118. SemaphoreHandle_t alert_semphr;
  119. uint32_t alerts_enabled;
  120. uint32_t alerts_triggered;
  121. #ifdef CONFIG_PM_ENABLE
  122. //Power Management
  123. esp_pm_lock_handle_t pm_lock;
  124. #endif
  125. } can_obj_t;
  126. static can_obj_t *p_can_obj = NULL;
  127. static portMUX_TYPE can_spinlock = portMUX_INITIALIZER_UNLOCKED;
  128. #define CAN_ENTER_CRITICAL() portENTER_CRITICAL(&can_spinlock)
  129. #define CAN_EXIT_CRITICAL() portEXIT_CRITICAL(&can_spinlock)
  130. /* ------------------- Configuration Register Functions---------------------- */
  131. static inline esp_err_t can_enter_reset_mode()
  132. {
  133. /* Enter reset mode (required to write to configuration registers). Reset mode
  134. also prevents all CAN activity on the current module and is automatically
  135. set upon entering a BUS-OFF condition. */
  136. CAN.mode_reg.reset = 1; //Set reset mode bit
  137. CAN_CHECK(CAN.mode_reg.reset == 1, ESP_ERR_INVALID_STATE); //Check bit was set
  138. return ESP_OK;
  139. }
  140. static inline esp_err_t can_exit_reset_mode()
  141. {
  142. /* Exiting reset mode will return the CAN module to operating mode. Reset mode
  143. must also be exited in order to trigger BUS-OFF recovery sequence. */
  144. CAN.mode_reg.reset = 0; //Exit reset mode
  145. CAN_CHECK(CAN.mode_reg.reset == 0, ESP_ERR_INVALID_STATE); //Check bit was reset
  146. return ESP_OK;
  147. }
  148. static inline void can_config_pelican()
  149. {
  150. //Use PeliCAN address layout. Exposes extra registers
  151. CAN.clock_divider_reg.can_mode = 1;
  152. }
  153. static inline void can_config_mode(can_mode_t mode)
  154. {
  155. //Configure CAN mode of operation
  156. can_mode_reg_t mode_reg;
  157. mode_reg.val = CAN.mode_reg.val; //Get current value of mode register
  158. if (mode == CAN_MODE_NO_ACK) {
  159. mode_reg.self_test = 1;
  160. mode_reg.listen_only = 0;
  161. } else if (mode == CAN_MODE_LISTEN_ONLY) {
  162. mode_reg.self_test = 0;
  163. mode_reg.listen_only = 1;
  164. } else {
  165. //Default to normal operating mode
  166. mode_reg.self_test = 0;
  167. mode_reg.listen_only = 0;
  168. }
  169. CAN.mode_reg.val = mode_reg.val; //Write back modified value to register
  170. }
  171. static inline void can_config_interrupts(uint32_t interrupts)
  172. {
  173. //Enable interrupt sources
  174. CAN.interrupt_enable_reg.val = interrupts;
  175. }
  176. static inline void can_config_bus_timing(uint32_t brp, uint32_t sjw, uint32_t tseg_1, uint32_t tseg_2, bool triple_sampling)
  177. {
  178. /* Configure bus/bit timing of CAN peripheral.
  179. - BRP (even from 2 to 128) divide APB to CAN system clock (T_scl)
  180. - SJW (1 to 4) is number of T_scl to shorten/lengthen for bit synchronization
  181. - TSEG_1 (1 to 16) is number of T_scl in a bit time before sample point
  182. - TSEG_2 (1 to 8) is number of T_scl in a bit time after sample point
  183. - triple_sampling will cause each bit time to be sampled 3 times*/
  184. can_bus_tim_0_reg_t timing_reg_0;
  185. can_bus_tim_1_reg_t timing_reg_1;
  186. timing_reg_0.baud_rate_prescaler = (brp / 2) - 1;
  187. timing_reg_0.sync_jump_width = sjw - 1;
  188. timing_reg_1.time_seg_1 = tseg_1 - 1;
  189. timing_reg_1.time_seg_2 = tseg_2 - 1;
  190. timing_reg_1.sampling = triple_sampling;
  191. CAN.bus_timing_0_reg.val = timing_reg_0.val;
  192. CAN.bus_timing_1_reg.val = timing_reg_1.val;
  193. }
  194. static inline void can_config_error(int err_warn_lim, int rx_err_cnt, int tx_err_cnt)
  195. {
  196. /* Set error warning limit, RX error counter, and TX error counter. Note that
  197. forcibly setting RX/TX error counters will incur the expected status changes
  198. and interrupts as soon as reset mode exits. */
  199. if (err_warn_lim >= 0 && err_warn_lim <= UINT8_MAX) {
  200. //Defaults to 96 after hardware reset.
  201. CAN.error_warning_limit_reg.byte = err_warn_lim;
  202. }
  203. if (rx_err_cnt >= 0 && rx_err_cnt <= UINT8_MAX) {
  204. //Defaults to 0 after hardware reset.
  205. CAN.rx_error_counter_reg.byte = rx_err_cnt;
  206. }
  207. if (tx_err_cnt >= 0 && tx_err_cnt <= UINT8_MAX) {
  208. //Defaults to 0 after hardware reset, and 127 after BUS-OFF event
  209. CAN.tx_error_counter_reg.byte = tx_err_cnt;
  210. }
  211. }
  212. static inline void can_config_acceptance_filter(uint32_t code, uint32_t mask, bool single_filter)
  213. {
  214. //Set filter mode
  215. CAN.mode_reg.acceptance_filter = (single_filter) ? 1 : 0;
  216. //Swap code and mask to match big endian registers
  217. uint32_t code_swapped = __builtin_bswap32(code);
  218. uint32_t mask_swapped = __builtin_bswap32(mask);
  219. for (int i = 0; i < 4; i++) {
  220. CAN.acceptance_filter.code_reg[i].byte = ((code_swapped >> (i * 8)) & 0xFF);
  221. CAN.acceptance_filter.mask_reg[i].byte = ((mask_swapped >> (i * 8)) & 0xFF);
  222. }
  223. }
  224. static inline void can_config_clk_out(uint32_t divider)
  225. {
  226. /* Configure CLKOUT. CLKOUT is a pre-scaled version of APB CLK. Divider can be
  227. 1, or any even number from 2 to 14. Set to out of range value (0) to disable
  228. CLKOUT. */
  229. can_clk_div_reg_t clock_divider_reg;
  230. clock_divider_reg.val = CAN.clock_divider_reg.val;
  231. if (divider >= 2 && divider <= 14) {
  232. clock_divider_reg.clock_off = 0;
  233. clock_divider_reg.clock_divider = (divider / 2) - 1;
  234. } else if (divider == 1) {
  235. clock_divider_reg.clock_off = 0;
  236. clock_divider_reg.clock_divider = 7;
  237. } else {
  238. clock_divider_reg.clock_off = 1;
  239. clock_divider_reg.clock_divider = 0;
  240. }
  241. CAN.clock_divider_reg.val = clock_divider_reg.val;
  242. }
  243. /* ---------------------- Runtime Register Functions------------------------- */
  244. static inline void can_set_command(uint8_t commands)
  245. {
  246. CAN.command_reg.val = commands;
  247. }
  248. static void can_set_tx_buffer_and_transmit(can_frame_t *frame)
  249. {
  250. //Copy frame structure into TX buffer registers
  251. for (int i = 0; i < FRAME_MAX_LEN; i++) {
  252. CAN.tx_rx_buffer[i].val = frame->bytes[i];
  253. }
  254. //Set correct transmit command
  255. uint8_t command;
  256. if (frame->self_reception) {
  257. command = (frame->single_shot) ? CMD_SELF_RX_SINGLE_SHOT : CMD_SELF_RX_REQ;
  258. } else {
  259. command = (frame->single_shot) ? CMD_TX_SINGLE_SHOT : CMD_TX_REQ;
  260. }
  261. can_set_command(command);
  262. }
  263. static inline uint32_t can_get_status()
  264. {
  265. return CAN.status_reg.val;
  266. }
  267. static inline uint32_t can_get_interrupt_reason()
  268. {
  269. return CAN.interrupt_reg.val;
  270. }
  271. static inline uint32_t can_get_arbitration_lost_capture()
  272. {
  273. return CAN.arbitration_lost_captue_reg.val;
  274. //Todo: ALC read only to re-arm arb lost interrupt. Add function to decode ALC
  275. }
  276. static inline uint32_t can_get_error_code_capture()
  277. {
  278. return CAN.error_code_capture_reg.val;
  279. //Todo: ECC read only to re-arm bus error interrupt. Add function to decode ECC
  280. }
  281. static inline void can_get_error_counters(uint32_t *tx_error_cnt, uint32_t *rx_error_cnt)
  282. {
  283. if (tx_error_cnt != NULL) {
  284. *tx_error_cnt = CAN.tx_error_counter_reg.byte;
  285. }
  286. if (rx_error_cnt != NULL) {
  287. *rx_error_cnt = CAN.rx_error_counter_reg.byte;
  288. }
  289. }
  290. static inline void can_get_rx_buffer_and_clear(can_frame_t *frame)
  291. {
  292. //Copy RX buffer registers into frame structure
  293. for (int i = 0; i < FRAME_MAX_LEN; i++) {
  294. frame->bytes[i] = CAN.tx_rx_buffer[i].val;
  295. }
  296. //Clear RX buffer
  297. can_set_command(CMD_RELEASE_RX_BUFF);
  298. }
  299. static inline uint32_t can_get_rx_message_counter()
  300. {
  301. return CAN.rx_message_counter_reg.val;
  302. }
  303. /* -------------------- Interrupt and Alert Handlers ------------------------ */
  304. static void can_alert_handler(uint32_t alert_code, int *alert_req)
  305. {
  306. if (p_can_obj->alerts_enabled & alert_code) {
  307. //Signify alert has occurred
  308. CAN_SET_FLAG(p_can_obj->alerts_triggered, alert_code);
  309. *alert_req = 1;
  310. if (p_can_obj->alerts_enabled & CAN_ALERT_AND_LOG) {
  311. if (alert_code >= ALERT_LOG_LEVEL_ERROR) {
  312. ESP_EARLY_LOGE(CAN_TAG, "Alert %d", alert_code);
  313. } else if (alert_code >= ALERT_LOG_LEVEL_WARNING) {
  314. ESP_EARLY_LOGW(CAN_TAG, "Alert %d", alert_code);
  315. } else {
  316. ESP_EARLY_LOGI(CAN_TAG, "Alert %d", alert_code);
  317. }
  318. }
  319. }
  320. }
  321. static void can_intr_handler_err_warn(can_status_reg_t *status, BaseType_t *task_woken, int *alert_req)
  322. {
  323. if (status->bus) {
  324. if (status->error) {
  325. //Bus-Off condition. TEC should set and held at 127, REC should be 0, reset mode entered
  326. CAN_SET_FLAG(p_can_obj->control_flags, CTRL_FLAG_BUS_OFF);
  327. /* Note: REC is still allowed to increase during bus-off. REC > err_warn
  328. can prevent "bus recovery complete" interrupt from occurring. Set to
  329. listen only mode to freeze REC. */
  330. can_config_mode(CAN_MODE_LISTEN_ONLY);
  331. can_alert_handler(CAN_ALERT_BUS_OFF, alert_req);
  332. } else {
  333. //Bus-recovery in progress. TEC has dropped below error warning limit
  334. can_alert_handler(CAN_ALERT_RECOVERY_IN_PROGRESS, alert_req);
  335. }
  336. } else {
  337. if (status->error) {
  338. //TEC or REC surpassed error warning limit
  339. CAN_SET_FLAG(p_can_obj->control_flags, CTRL_FLAG_ERR_WARN);
  340. can_alert_handler(CAN_ALERT_ABOVE_ERR_WARN, alert_req);
  341. } else if (p_can_obj->control_flags & CTRL_FLAG_RECOVERING) {
  342. //Bus recovery complete.
  343. can_enter_reset_mode();
  344. //Reset and set flags to the equivalent of the stopped state
  345. CAN_RESET_FLAG(p_can_obj->control_flags, CTRL_FLAG_RECOVERING | CTRL_FLAG_ERR_WARN |
  346. CTRL_FLAG_ERR_PASSIVE | CTRL_FLAG_BUS_OFF |
  347. CTRL_FLAG_TX_BUFF_OCCUPIED);
  348. CAN_SET_FLAG(p_can_obj->control_flags, CTRL_FLAG_STOPPED);
  349. can_alert_handler(CAN_ALERT_BUS_RECOVERED, alert_req);
  350. } else {
  351. //TEC and REC are both below error warning
  352. CAN_RESET_FLAG(p_can_obj->control_flags, CTRL_FLAG_ERR_WARN);
  353. can_alert_handler(CAN_ALERT_BELOW_ERR_WARN, alert_req);
  354. }
  355. }
  356. }
  357. static void can_intr_handler_err_passive(int *alert_req)
  358. {
  359. uint32_t tec, rec;
  360. can_get_error_counters(&tec, &rec);
  361. if (tec >= DRIVER_DEFAULT_ERR_PASS_CNT || rec >= DRIVER_DEFAULT_ERR_PASS_CNT) {
  362. //Entered error passive
  363. CAN_SET_FLAG(p_can_obj->control_flags, CTRL_FLAG_ERR_PASSIVE);
  364. can_alert_handler(CAN_ALERT_ERR_PASS, alert_req);
  365. } else {
  366. //Returned to error active
  367. CAN_RESET_FLAG(p_can_obj->control_flags, CTRL_FLAG_ERR_PASSIVE);
  368. can_alert_handler(CAN_ALERT_ERR_ACTIVE, alert_req);
  369. }
  370. }
  371. static void can_intr_handler_bus_err(int *alert_req)
  372. {
  373. // ECC register is read to re-arm bus error interrupt. ECC is not used
  374. (void) can_get_error_code_capture();
  375. p_can_obj->bus_error_count++;
  376. can_alert_handler(CAN_ALERT_BUS_ERROR, alert_req);
  377. }
  378. static void can_intr_handler_arb_lost(int *alert_req)
  379. {
  380. //ALC register is read to re-arm arb lost interrupt. ALC is not used
  381. (void) can_get_arbitration_lost_capture();
  382. p_can_obj->arb_lost_count++;
  383. can_alert_handler(CAN_ALERT_ARB_LOST, alert_req);
  384. }
  385. static void can_intr_handler_rx(BaseType_t *task_woken, int *alert_req)
  386. {
  387. can_rx_msg_cnt_reg_t msg_count_reg;
  388. msg_count_reg.val = can_get_rx_message_counter();
  389. for (int i = 0; i < msg_count_reg.rx_message_counter; i++) {
  390. can_frame_t frame;
  391. can_get_rx_buffer_and_clear(&frame);
  392. //Copy frame into RX Queue
  393. if (xQueueSendFromISR(p_can_obj->rx_queue, &frame, task_woken) == pdTRUE) {
  394. p_can_obj->rx_msg_count++;
  395. } else {
  396. p_can_obj->rx_missed_count++;
  397. can_alert_handler(CAN_ALERT_RX_QUEUE_FULL, alert_req);
  398. }
  399. }
  400. }
  401. static void can_intr_handler_tx(can_status_reg_t *status, int *alert_req)
  402. {
  403. //Handle previously transmitted frame
  404. if (status->tx_complete) {
  405. can_alert_handler(CAN_ALERT_TX_SUCCESS, alert_req);
  406. } else {
  407. p_can_obj->tx_failed_count++;
  408. can_alert_handler(CAN_ALERT_TX_FAILED, alert_req);
  409. }
  410. //Update TX message count
  411. p_can_obj->tx_msg_count--;
  412. configASSERT(p_can_obj->tx_msg_count >= 0); //Sanity check
  413. //Check if there are more frames to transmit
  414. if (p_can_obj->tx_msg_count > 0 && p_can_obj->tx_queue != NULL) {
  415. can_frame_t frame;
  416. configASSERT(xQueueReceiveFromISR(p_can_obj->tx_queue, &frame, NULL) == pdTRUE);
  417. can_set_tx_buffer_and_transmit(&frame);
  418. } else {
  419. //No more frames to transmit
  420. CAN_RESET_FLAG(p_can_obj->control_flags, CTRL_FLAG_TX_BUFF_OCCUPIED);
  421. can_alert_handler(CAN_ALERT_TX_IDLE, alert_req);
  422. }
  423. }
  424. static void can_intr_handler_main(void *arg)
  425. {
  426. BaseType_t task_woken = pdFALSE;
  427. int alert_req = 0;
  428. can_status_reg_t status;
  429. can_intr_reg_t intr_reason;
  430. CAN_ENTER_CRITICAL();
  431. status.val = can_get_status();
  432. intr_reason.val = (p_can_obj != NULL) ? can_get_interrupt_reason() : 0; //Incase intr occurs whilst driver is being uninstalled
  433. //Handle error counter related interrupts
  434. if (intr_reason.err_warn) {
  435. //Triggers when Bus-Status or Error-status bits change
  436. can_intr_handler_err_warn(&status, &task_woken, &alert_req);
  437. }
  438. if (intr_reason.err_passive) {
  439. //Triggers when entering/returning error passive/active state
  440. can_intr_handler_err_passive(&alert_req);
  441. }
  442. //Handle other error interrupts
  443. if (intr_reason.bus_err) {
  444. //Triggers when an error (Bit, Stuff, CRC, Form, ACK) occurs on the CAN bus
  445. can_intr_handler_bus_err(&alert_req);
  446. }
  447. if (intr_reason.arb_lost) {
  448. //Triggers when arbitration is lost
  449. can_intr_handler_arb_lost(&alert_req);
  450. }
  451. //Todo: Check data overrun bug where interrupt does not trigger even when enabled
  452. //Handle TX/RX interrupts
  453. if (intr_reason.rx) {
  454. //Triggers when RX buffer has one or more frames. Disabled if RX Queue length = 0
  455. can_intr_handler_rx(&task_woken, &alert_req);
  456. }
  457. if (intr_reason.tx) {
  458. //Triggers when TX buffer becomes free after a transmission
  459. can_intr_handler_tx(&status, &alert_req);
  460. }
  461. /* Todo: Check possible bug where transmitting self reception request then
  462. clearing rx buffer will cancel the transmission. */
  463. CAN_EXIT_CRITICAL();
  464. if (p_can_obj->alert_semphr != NULL && alert_req) {
  465. //Give semaphore if alerts were triggered
  466. xSemaphoreGiveFromISR(p_can_obj->alert_semphr, &task_woken);
  467. }
  468. if (task_woken == pdTRUE) {
  469. portYIELD_FROM_ISR();
  470. }
  471. }
  472. /* ---------------------- Frame and GPIO functions ------------------------- */
  473. static void can_format_frame(uint32_t id, uint8_t dlc, const uint8_t *data, uint32_t flags, can_frame_t *tx_frame)
  474. {
  475. /* This function encodes a message into a frame structure. The frame structure has
  476. an identical layout to the TX buffer, allowing the frame structure to be directly
  477. copied into TX buffer. */
  478. //Set frame information
  479. tx_frame->dlc = dlc;
  480. tx_frame->rtr = (flags & CAN_MSG_FLAG_RTR) ? 1 : 0;
  481. tx_frame->frame_format = (flags & CAN_MSG_FLAG_EXTD) ? 1 : 0;
  482. tx_frame->self_reception = (flags & CAN_MSG_FLAG_SELF) ? 1 : 0;
  483. tx_frame->single_shot = (flags & CAN_MSG_FLAG_SS) ? 1 : 0;
  484. //Set ID
  485. int id_len = (flags & CAN_MSG_FLAG_EXTD) ? FRAME_EXTD_ID_LEN : FRAME_STD_ID_LEN;
  486. uint8_t *id_buffer = (flags & CAN_MSG_FLAG_EXTD) ? tx_frame->extended.id : tx_frame->standard.id;
  487. //Split ID into 4 or 2 bytes, and turn into big-endian with left alignment (<< 3 or 5)
  488. uint32_t id_temp = (flags & CAN_MSG_FLAG_EXTD) ? __builtin_bswap32((id & CAN_EXTD_ID_MASK) << 3) : //((id << 3) >> 8*(3-i))
  489. __builtin_bswap16((id & CAN_STD_ID_MASK) << 5); //((id << 5) >> 8*(1-i))
  490. for (int i = 0; i < id_len; i++) {
  491. id_buffer[i] = (id_temp >> (8 * i)) & 0xFF; //Copy big-endian ID byte by byte
  492. }
  493. //Set Data.
  494. uint8_t *data_buffer = (flags & CAN_MSG_FLAG_EXTD) ? tx_frame->extended.data : tx_frame->standard.data;
  495. for (int i = 0; (i < dlc) && (i < FRAME_MAX_DATA_LEN); i++) { //Handle case where dlc is > 8
  496. data_buffer[i] = data[i];
  497. }
  498. }
  499. static void can_parse_frame(can_frame_t *rx_frame, uint32_t *id, uint8_t *dlc, uint8_t *data, uint32_t *flags)
  500. {
  501. //This function decodes a frame structure into it's constituent components.
  502. //Copy frame information
  503. *dlc = rx_frame->dlc;
  504. *flags = 0;
  505. *flags |= (rx_frame->dlc > FRAME_MAX_DATA_LEN) ? CAN_MSG_FLAG_DLC_NON_COMP : 0;
  506. *flags |= (rx_frame->rtr) ? CAN_MSG_FLAG_RTR : 0;
  507. *flags |= (rx_frame->frame_format) ? CAN_MSG_FLAG_EXTD : 0;
  508. //Copy ID
  509. int id_len = (rx_frame->frame_format) ? FRAME_EXTD_ID_LEN : FRAME_STD_ID_LEN;
  510. uint8_t *id_buffer = (rx_frame->frame_format) ? rx_frame->extended.id : rx_frame->standard.id;
  511. uint32_t id_temp = 0;
  512. for (int i = 0; i < id_len; i++) {
  513. id_temp |= id_buffer[i] << (8 * i); //Copy big-endian ID byte by byte
  514. }
  515. //Revert endianness of 4 or 2 byte ID, and shift into 29 or 11 bit ID
  516. id_temp = (rx_frame->frame_format) ? (__builtin_bswap32(id_temp) >> 3) : //((byte[i] << 8*(3-i)) >> 3)
  517. (__builtin_bswap16(id_temp) >> 5); //((byte[i] << 8*(1-i)) >> 5)
  518. *id = id_temp & ((rx_frame->frame_format) ? CAN_EXTD_ID_MASK : CAN_STD_ID_MASK);
  519. //Copy data
  520. uint8_t *data_buffer = (rx_frame->frame_format) ? rx_frame->extended.data : rx_frame->standard.data;
  521. for (int i = 0; (i < rx_frame->dlc) && (i < FRAME_MAX_DATA_LEN); i++) {
  522. data[i] = data_buffer[i];
  523. }
  524. //Set remaining bytes of data to 0
  525. for (int i = rx_frame->dlc; i < FRAME_MAX_DATA_LEN; i++) {
  526. data[i] = 0;
  527. }
  528. }
  529. static void can_configure_gpio(gpio_num_t tx, gpio_num_t rx, gpio_num_t clkout, gpio_num_t bus_status)
  530. {
  531. //Set TX pin
  532. gpio_set_pull_mode(tx, GPIO_FLOATING);
  533. gpio_matrix_out(tx, CAN_TX_IDX, false, false);
  534. gpio_pad_select_gpio(tx);
  535. //Set RX pin
  536. gpio_set_pull_mode(rx, GPIO_FLOATING);
  537. gpio_matrix_in(rx, CAN_RX_IDX, false);
  538. gpio_pad_select_gpio(rx);
  539. gpio_set_direction(rx, GPIO_MODE_INPUT);
  540. //Configure output clock pin (Optional)
  541. if (clkout >= 0 && clkout < GPIO_NUM_MAX) {
  542. gpio_set_pull_mode(clkout, GPIO_FLOATING);
  543. gpio_matrix_out(clkout, CAN_CLKOUT_IDX, false, false);
  544. gpio_pad_select_gpio(clkout);
  545. }
  546. //Configure bus status pin (Optional)
  547. if (bus_status >= 0 && bus_status < GPIO_NUM_MAX) {
  548. gpio_set_pull_mode(bus_status, GPIO_FLOATING);
  549. gpio_matrix_out(bus_status, CAN_BUS_OFF_ON_IDX, false, false);
  550. gpio_pad_select_gpio(bus_status);
  551. }
  552. }
  553. /* ---------------------------- Public Functions ---------------------------- */
  554. esp_err_t can_driver_install(const can_general_config_t *g_config, const can_timing_config_t *t_config, const can_filter_config_t *f_config)
  555. {
  556. //Check arguments
  557. CAN_CHECK(g_config != NULL, ESP_ERR_INVALID_ARG);
  558. CAN_CHECK(t_config != NULL, ESP_ERR_INVALID_ARG);
  559. CAN_CHECK(f_config != NULL, ESP_ERR_INVALID_ARG);
  560. CAN_CHECK(g_config->rx_queue_len > 0, ESP_ERR_INVALID_ARG);
  561. CAN_CHECK(g_config->tx_io >= 0 && g_config->tx_io < GPIO_NUM_MAX, ESP_ERR_INVALID_ARG);
  562. CAN_CHECK(g_config->rx_io >= 0 && g_config->rx_io < GPIO_NUM_MAX, ESP_ERR_INVALID_ARG);
  563. esp_err_t ret;
  564. can_obj_t *p_can_obj_dummy;
  565. //Create a CAN object
  566. p_can_obj_dummy = calloc(1, sizeof(can_obj_t));
  567. CAN_CHECK(p_can_obj_dummy != NULL, ESP_ERR_NO_MEM);
  568. //Initialize queues, semaphores, and power management locks
  569. p_can_obj_dummy->tx_queue = (g_config->tx_queue_len > 0) ? xQueueCreate(g_config->tx_queue_len, sizeof(can_frame_t)) : NULL;
  570. p_can_obj_dummy->rx_queue = xQueueCreate(g_config->rx_queue_len, sizeof(can_frame_t));
  571. p_can_obj_dummy->alert_semphr = xSemaphoreCreateBinary();
  572. if ((g_config->tx_queue_len > 0 && p_can_obj_dummy->tx_queue == NULL) ||
  573. p_can_obj_dummy->rx_queue == NULL || p_can_obj_dummy->alert_semphr == NULL) {
  574. ret = ESP_ERR_NO_MEM;
  575. goto err;
  576. }
  577. #ifdef CONFIG_PM_ENABLE
  578. esp_err_t pm_err = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "can", &(p_can_obj_dummy->pm_lock));
  579. if (pm_err != ESP_OK ) {
  580. ret = pm_err;
  581. goto err;
  582. }
  583. #endif
  584. //Initialize flags and variables
  585. p_can_obj_dummy->control_flags = CTRL_FLAG_STOPPED;
  586. p_can_obj_dummy->control_flags |= (g_config->mode == CAN_MODE_NO_ACK) ? CTRL_FLAG_SELF_TEST : 0;
  587. p_can_obj_dummy->control_flags |= (g_config->mode == CAN_MODE_LISTEN_ONLY) ? CTRL_FLAG_LISTEN_ONLY : 0;
  588. p_can_obj_dummy->tx_msg_count = 0;
  589. p_can_obj_dummy->rx_msg_count = 0;
  590. p_can_obj_dummy->tx_failed_count = 0;
  591. p_can_obj_dummy->rx_missed_count = 0;
  592. p_can_obj_dummy->arb_lost_count = 0;
  593. p_can_obj_dummy->bus_error_count = 0;
  594. p_can_obj_dummy->alerts_enabled = g_config->alerts_enabled;
  595. p_can_obj_dummy->alerts_triggered = 0;
  596. //Initialize CAN peripheral registers, and allocate interrupt
  597. CAN_ENTER_CRITICAL();
  598. if (p_can_obj == NULL) {
  599. p_can_obj = p_can_obj_dummy;
  600. } else {
  601. //Check if driver is already installed
  602. CAN_EXIT_CRITICAL();
  603. ret = ESP_ERR_INVALID_STATE;
  604. goto err;
  605. }
  606. periph_module_enable(PERIPH_CAN_MODULE); //Enable APB CLK to CAN peripheral
  607. configASSERT(can_enter_reset_mode() == ESP_OK); //Must enter reset mode to write to config registers
  608. can_config_pelican(); //Use PeliCAN addresses
  609. /* Note: REC is allowed to increase even in reset mode. Listen only mode
  610. will freeze REC. The desired mode will be set when can_start() is called. */
  611. can_config_mode(CAN_MODE_LISTEN_ONLY);
  612. can_config_interrupts(DRIVER_DEFAULT_INTERRUPTS);
  613. can_config_bus_timing(t_config->brp, t_config->sjw, t_config->tseg_1, t_config->tseg_2, t_config->triple_sampling);
  614. can_config_error(DRIVER_DEFAULT_EWL, DRIVER_DEFAULT_REC, DRIVER_DEFAULT_TEC);
  615. can_config_acceptance_filter(f_config->acceptance_code, f_config->acceptance_mask, f_config->single_filter);
  616. can_config_clk_out(g_config->clkout_divider);
  617. //Allocate GPIO and Interrupts
  618. can_configure_gpio(g_config->tx_io, g_config->rx_io, g_config->clkout_io, g_config->bus_off_io);
  619. (void) can_get_interrupt_reason(); //Read interrupt reg to clear it before allocating ISR
  620. ESP_ERROR_CHECK(esp_intr_alloc(ETS_CAN_INTR_SOURCE, 0, can_intr_handler_main, NULL, &p_can_obj->isr_handle));
  621. //Todo: Allow interrupt to be registered to specified CPU
  622. CAN_EXIT_CRITICAL();
  623. #ifdef CONFIG_PM_ENABLE
  624. ESP_ERROR_CHECK(esp_pm_lock_acquire(p_can_obj->pm_lock)); //Acquire pm_lock to keep APB clock at 80MHz
  625. #endif
  626. return ESP_OK; //CAN module is still in reset mode, users need to call can_start() afterwards
  627. err:
  628. //Cleanup CAN object and return error
  629. if (p_can_obj_dummy != NULL) {
  630. if (p_can_obj_dummy->tx_queue != NULL) {
  631. vQueueDelete(p_can_obj_dummy->tx_queue);
  632. p_can_obj_dummy->tx_queue = NULL;
  633. }
  634. if (p_can_obj_dummy->rx_queue != NULL) {
  635. vQueueDelete(p_can_obj_dummy->rx_queue);
  636. p_can_obj_dummy->rx_queue = NULL;
  637. }
  638. if (p_can_obj_dummy->alert_semphr != NULL) {
  639. vSemaphoreDelete(p_can_obj_dummy->alert_semphr);
  640. p_can_obj_dummy->alert_semphr = NULL;
  641. }
  642. #ifdef CONFIG_PM_ENABLE
  643. if (p_can_obj_dummy->pm_lock != NULL) {
  644. ESP_ERROR_CHECK(esp_pm_lock_delete(p_can_obj_dummy->pm_lock));
  645. }
  646. #endif
  647. free(p_can_obj_dummy);
  648. }
  649. return ret;
  650. }
  651. esp_err_t can_driver_uninstall()
  652. {
  653. can_obj_t *p_can_obj_dummy;
  654. CAN_ENTER_CRITICAL();
  655. //Check state
  656. CAN_CHECK_FROM_CRIT(p_can_obj != NULL, ESP_ERR_INVALID_STATE);
  657. CAN_CHECK_FROM_CRIT(p_can_obj->control_flags & (CTRL_FLAG_STOPPED | CTRL_FLAG_BUS_OFF), ESP_ERR_INVALID_STATE);
  658. configASSERT(can_enter_reset_mode() == ESP_OK); //Enter reset mode to stop any CAN bus activity
  659. //Clear registers by reading
  660. (void) can_get_interrupt_reason();
  661. (void) can_get_arbitration_lost_capture();
  662. (void) can_get_error_code_capture();
  663. ESP_ERROR_CHECK(esp_intr_free(p_can_obj->isr_handle)); //Free interrupt
  664. periph_module_disable(PERIPH_CAN_MODULE); //Disable CAN peripheral
  665. p_can_obj_dummy = p_can_obj; //Use dummy to shorten critical section
  666. p_can_obj = NULL;
  667. CAN_EXIT_CRITICAL();
  668. //Delete queues, semaphores, and power management locks
  669. if (p_can_obj_dummy->tx_queue != NULL) {
  670. vQueueDelete(p_can_obj_dummy->tx_queue);
  671. }
  672. vQueueDelete(p_can_obj_dummy->rx_queue);
  673. vSemaphoreDelete(p_can_obj_dummy->alert_semphr);
  674. #ifdef CONFIG_PM_ENABLE
  675. //Release and delete power management lock
  676. ESP_ERROR_CHECK(esp_pm_lock_release(p_can_obj_dummy->pm_lock));
  677. ESP_ERROR_CHECK(esp_pm_lock_delete(p_can_obj_dummy->pm_lock));
  678. #endif
  679. free(p_can_obj_dummy); //Free can driver object
  680. return ESP_OK;
  681. }
  682. esp_err_t can_start()
  683. {
  684. //Check state
  685. CAN_ENTER_CRITICAL();
  686. CAN_CHECK_FROM_CRIT(p_can_obj != NULL, ESP_ERR_INVALID_STATE);
  687. CAN_CHECK_FROM_CRIT(p_can_obj->control_flags & CTRL_FLAG_STOPPED, ESP_ERR_INVALID_STATE);
  688. //Reset RX queue, and RX message count
  689. xQueueReset(p_can_obj->rx_queue);
  690. p_can_obj->rx_msg_count = 0;
  691. configASSERT(can_enter_reset_mode() == ESP_OK); //Should already be in bus-off mode, set again to make sure
  692. //Currently in listen only mode, need to set to mode specified by configuration
  693. can_mode_t mode;
  694. if (p_can_obj->control_flags & CTRL_FLAG_SELF_TEST) {
  695. mode = CAN_MODE_NO_ACK;
  696. } else if (p_can_obj->control_flags & CTRL_FLAG_LISTEN_ONLY) {
  697. mode = CAN_MODE_LISTEN_ONLY;
  698. } else {
  699. mode = CAN_MODE_NORMAL;
  700. }
  701. can_config_mode(mode); //Set mode
  702. (void) can_get_interrupt_reason(); //Clear interrupt register
  703. configASSERT(can_exit_reset_mode() == ESP_OK);
  704. CAN_RESET_FLAG(p_can_obj->control_flags, CTRL_FLAG_STOPPED);
  705. CAN_EXIT_CRITICAL();
  706. return ESP_OK;
  707. }
  708. esp_err_t can_stop()
  709. {
  710. //Check state
  711. CAN_ENTER_CRITICAL();
  712. CAN_CHECK_FROM_CRIT(p_can_obj != NULL, ESP_ERR_INVALID_STATE);
  713. CAN_CHECK_FROM_CRIT(!(p_can_obj->control_flags & (CTRL_FLAG_STOPPED | CTRL_FLAG_BUS_OFF)), ESP_ERR_INVALID_STATE);
  714. //Clear interrupts and reset flags
  715. configASSERT(can_enter_reset_mode() == ESP_OK);
  716. (void) can_get_interrupt_reason(); //Read interrupt register to clear interrupts
  717. can_config_mode(CAN_MODE_LISTEN_ONLY); //Set to listen only mode to freeze REC
  718. CAN_RESET_FLAG(p_can_obj->control_flags, CTRL_FLAG_TX_BUFF_OCCUPIED);
  719. CAN_SET_FLAG(p_can_obj->control_flags, CTRL_FLAG_STOPPED);
  720. //Reset TX Queue and message count
  721. if (p_can_obj->tx_queue != NULL) {
  722. xQueueReset(p_can_obj->tx_queue);
  723. }
  724. p_can_obj->tx_msg_count = 0;
  725. CAN_EXIT_CRITICAL();
  726. return ESP_OK;
  727. }
  728. esp_err_t can_transmit(const can_message_t *message, TickType_t ticks_to_wait)
  729. {
  730. //Check arguments
  731. CAN_CHECK(p_can_obj != NULL, ESP_ERR_INVALID_STATE);
  732. CAN_CHECK(message != NULL, ESP_ERR_INVALID_ARG);
  733. CAN_CHECK((message->data_length_code <= FRAME_MAX_DATA_LEN) || (message->flags & CAN_MSG_FLAG_DLC_NON_COMP), ESP_ERR_INVALID_ARG);
  734. CAN_ENTER_CRITICAL();
  735. //Check State
  736. CAN_CHECK_FROM_CRIT(!(p_can_obj->control_flags & CTRL_FLAG_LISTEN_ONLY), ESP_ERR_NOT_SUPPORTED);
  737. CAN_CHECK_FROM_CRIT(!(p_can_obj->control_flags & (CTRL_FLAG_STOPPED | CTRL_FLAG_BUS_OFF)), ESP_ERR_INVALID_STATE);
  738. //Format frame
  739. esp_err_t ret = ESP_FAIL;
  740. can_frame_t tx_frame;
  741. can_format_frame(message->identifier, message->data_length_code, message->data, message->flags, &tx_frame);
  742. //Check if frame can be sent immediately
  743. if ((p_can_obj->tx_msg_count == 0) && !(p_can_obj->control_flags & CTRL_FLAG_TX_BUFF_OCCUPIED)) {
  744. //No other frames waiting to transmit. Bypass queue and transmit immediately
  745. can_set_tx_buffer_and_transmit(&tx_frame);
  746. p_can_obj->tx_msg_count++;
  747. CAN_SET_FLAG(p_can_obj->control_flags, CTRL_FLAG_TX_BUFF_OCCUPIED);
  748. ret = ESP_OK;
  749. }
  750. CAN_EXIT_CRITICAL();
  751. if (ret != ESP_OK) {
  752. if (p_can_obj->tx_queue == NULL) {
  753. //TX Queue is disabled and TX buffer is occupied, message was not sent
  754. ret = ESP_FAIL;
  755. } else if (xQueueSend(p_can_obj->tx_queue, &tx_frame, ticks_to_wait) == pdTRUE) {
  756. //Copied to TX Queue
  757. CAN_ENTER_CRITICAL();
  758. if (p_can_obj->control_flags & (CTRL_FLAG_STOPPED | CTRL_FLAG_BUS_OFF)) {
  759. //TX queue was reset (due to stop/bus_off), remove copied frame from queue to prevent transmission
  760. configASSERT(xQueueReceive(p_can_obj->tx_queue, &tx_frame, 0) == pdTRUE);
  761. ret = ESP_ERR_INVALID_STATE;
  762. } else if ((p_can_obj->tx_msg_count == 0) && !(p_can_obj->control_flags & CTRL_FLAG_TX_BUFF_OCCUPIED)) {
  763. //TX buffer was freed during copy, manually trigger transmission
  764. configASSERT(xQueueReceive(p_can_obj->tx_queue, &tx_frame, 0) == pdTRUE);
  765. can_set_tx_buffer_and_transmit(&tx_frame);
  766. p_can_obj->tx_msg_count++;
  767. CAN_SET_FLAG(p_can_obj->control_flags, CTRL_FLAG_TX_BUFF_OCCUPIED);
  768. ret = ESP_OK;
  769. } else {
  770. //Frame was copied to queue, waiting to be transmitted
  771. p_can_obj->tx_msg_count++;
  772. ret = ESP_OK;
  773. }
  774. CAN_EXIT_CRITICAL();
  775. } else {
  776. //Timed out waiting for free space on TX queue
  777. ret = ESP_ERR_TIMEOUT;
  778. }
  779. }
  780. return ret;
  781. }
  782. esp_err_t can_receive(can_message_t *message, TickType_t ticks_to_wait)
  783. {
  784. //Check arguments and state
  785. CAN_CHECK(p_can_obj != NULL, ESP_ERR_INVALID_STATE);
  786. CAN_CHECK(message != NULL, ESP_ERR_INVALID_ARG);
  787. //Get frame from RX Queue or RX Buffer
  788. can_frame_t rx_frame;
  789. if (xQueueReceive(p_can_obj->rx_queue, &rx_frame, ticks_to_wait) != pdTRUE) {
  790. return ESP_ERR_TIMEOUT;
  791. }
  792. CAN_ENTER_CRITICAL();
  793. p_can_obj->rx_msg_count--;
  794. CAN_EXIT_CRITICAL();
  795. //Decode frame
  796. can_parse_frame(&rx_frame, &(message->identifier), &(message->data_length_code), message->data, &(message->flags));
  797. return ESP_OK;
  798. }
  799. esp_err_t can_read_alerts(uint32_t *alerts, TickType_t ticks_to_wait)
  800. {
  801. //Check arguments and state
  802. CAN_CHECK(p_can_obj != NULL, ESP_ERR_INVALID_STATE);
  803. CAN_CHECK(alerts != NULL, ESP_ERR_INVALID_ARG);
  804. //Wait for an alert to occur
  805. if (xSemaphoreTake(p_can_obj->alert_semphr, ticks_to_wait) == pdTRUE) {
  806. CAN_ENTER_CRITICAL();
  807. *alerts = p_can_obj->alerts_triggered;
  808. p_can_obj->alerts_triggered = 0; //Clear triggered alerts
  809. CAN_EXIT_CRITICAL();
  810. return ESP_OK;
  811. } else {
  812. *alerts = 0;
  813. return ESP_ERR_TIMEOUT;
  814. }
  815. }
  816. esp_err_t can_reconfigure_alerts(uint32_t alerts_enabled, uint32_t *current_alerts)
  817. {
  818. CAN_CHECK(p_can_obj != NULL, ESP_ERR_INVALID_STATE);
  819. CAN_ENTER_CRITICAL();
  820. uint32_t cur_alerts;
  821. cur_alerts = can_read_alerts(&cur_alerts, 0); //Clear any unhandled alerts
  822. p_can_obj->alerts_enabled = alerts_enabled; //Update enabled alerts
  823. CAN_EXIT_CRITICAL();
  824. if (current_alerts != NULL) {
  825. *current_alerts = cur_alerts;
  826. }
  827. return ESP_OK;
  828. }
  829. esp_err_t can_initiate_recovery()
  830. {
  831. CAN_ENTER_CRITICAL();
  832. //Check state
  833. CAN_CHECK_FROM_CRIT(p_can_obj != NULL, ESP_ERR_INVALID_STATE);
  834. CAN_CHECK_FROM_CRIT(p_can_obj->control_flags & CTRL_FLAG_BUS_OFF, ESP_ERR_INVALID_STATE);
  835. CAN_CHECK_FROM_CRIT(!(p_can_obj->control_flags & CTRL_FLAG_RECOVERING), ESP_ERR_INVALID_STATE);
  836. //Reset TX Queue/Counters
  837. if (p_can_obj->tx_queue != NULL) {
  838. xQueueReset(p_can_obj->tx_queue);
  839. }
  840. p_can_obj->tx_msg_count = 0;
  841. CAN_RESET_FLAG(p_can_obj->control_flags, CTRL_FLAG_TX_BUFF_OCCUPIED);
  842. CAN_SET_FLAG(p_can_obj->control_flags, CTRL_FLAG_RECOVERING);
  843. //Trigger start of recovery process
  844. configASSERT(can_exit_reset_mode() == ESP_OK);
  845. CAN_EXIT_CRITICAL();
  846. return ESP_OK;
  847. }
  848. esp_err_t can_get_status_info(can_status_info_t *status_info)
  849. {
  850. //Check parameters and state
  851. CAN_CHECK(p_can_obj != NULL, ESP_ERR_INVALID_STATE);
  852. CAN_CHECK(status_info != NULL, ESP_ERR_INVALID_ARG);
  853. CAN_ENTER_CRITICAL();
  854. uint32_t tec, rec;
  855. can_get_error_counters(&tec, &rec);
  856. status_info->tx_error_counter = tec;
  857. status_info->rx_error_counter = rec;
  858. status_info->msgs_to_tx = p_can_obj->tx_msg_count;
  859. status_info->msgs_to_rx = p_can_obj->rx_msg_count;
  860. status_info->tx_failed_count = p_can_obj->tx_failed_count;
  861. status_info->rx_missed_count = p_can_obj->rx_missed_count;
  862. status_info->arb_lost_count = p_can_obj->arb_lost_count;
  863. status_info->bus_error_count = p_can_obj->bus_error_count;
  864. if (p_can_obj->control_flags & CTRL_FLAG_RECOVERING) {
  865. status_info->state = CAN_STATE_RECOVERING;
  866. } else if (p_can_obj->control_flags & CTRL_FLAG_BUS_OFF) {
  867. status_info->state = CAN_STATE_BUS_OFF;
  868. } else if (p_can_obj->control_flags & CTRL_FLAG_STOPPED) {
  869. status_info->state = CAN_STATE_STOPPED;
  870. } else {
  871. status_info->state = CAN_STATE_RUNNING;
  872. }
  873. CAN_EXIT_CRITICAL();
  874. return ESP_OK;
  875. }